From: Samuel Holland <samuel@sholland.org>
To: u-boot@lists.denx.de, Jagan Teki <jagan@amarulasolutions.com>,
Andre Przywara <andre.przywara@arm.com>
Cc: Sean Anderson <seanga2@gmail.com>, Simon Glass <sjg@chromium.org>,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Samuel Holland <samuel@sholland.org>, Heiko Schocher <hs@denx.de>,
Joe Hershberger <joe.hershberger@ni.com>
Subject: [PATCH v2 05/23] pinctrl: sunxi: Add UART pinmuxes
Date: Thu, 17 Mar 2022 22:54:02 -0500 [thread overview]
Message-ID: <20220318035420.15058-6-samuel@sholland.org> (raw)
In-Reply-To: <20220318035420.15058-1-samuel@sholland.org>
This includes UART0 and R_UART (s_uart) on all supported platforms, plus
the additional UART configurations from arch/arm/mach-sunxi/board.c.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
(no changes since v1)
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 98 +++++++++++++++++++++++++++
1 file changed, 98 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 24b9647054..751b47d687 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -225,6 +225,11 @@ static int sunxi_pinctrl_probe(struct udevice *dev)
static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 5 }, /* PE0-PE1 */
+#endif
};
static const struct sunxi_pinctrl_desc __maybe_unused suniv_f1c100s_pinctrl_desc = {
@@ -237,6 +242,11 @@ static const struct sunxi_pinctrl_desc __maybe_unused suniv_f1c100s_pinctrl_desc
static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB22-PB23 */
+#endif
};
static const struct sunxi_pinctrl_desc __maybe_unused sun4i_a10_pinctrl_desc = {
@@ -249,6 +259,12 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun4i_a10_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB19-PB20 */
+#endif
+ { "uart1", 4 }, /* PG3-PG4 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun5i_a13_pinctrl_desc = {
@@ -261,6 +277,11 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun5i_a13_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH20-PH21 */
+#endif
};
static const struct sunxi_pinctrl_desc __maybe_unused sun6i_a31_pinctrl_desc = {
@@ -273,6 +294,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun6i_a31_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun6i_a31_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun6i_a31_r_pinctrl_desc = {
@@ -285,6 +307,11 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun6i_a31_r_pinctrl_desc =
static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB22-PB23 */
+#endif
};
static const struct sunxi_pinctrl_desc __maybe_unused sun7i_a20_pinctrl_desc = {
@@ -297,6 +324,11 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun7i_a20_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a23_pinctrl_desc = {
@@ -309,6 +341,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a23_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun8i_a23_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a23_r_pinctrl_desc = {
@@ -321,6 +354,13 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a23_r_pinctrl_desc =
static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 3 }, /* PB0-PB1 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a33_pinctrl_desc = {
@@ -333,6 +373,13 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a33_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB9-PB10 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a83t_pinctrl_desc = {
@@ -345,6 +392,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a83t_pinctrl_desc =
static const struct sunxi_pinctrl_function sun8i_a83t_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a83t_r_pinctrl_desc = {
@@ -357,6 +405,13 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a83t_r_pinctrl_desc
static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PA4-PA5 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PA0-PA1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_h3_pinctrl_desc = {
@@ -369,6 +424,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_h3_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun8i_h3_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_h3_r_pinctrl_desc = {
@@ -381,6 +437,13 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_h3_r_pinctrl_desc =
static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 3 }, /* PB8-PB9 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun8i_v3s_pinctrl_desc = {
@@ -393,6 +456,11 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_v3s_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH12-PH13 */
+#endif
};
static const struct sunxi_pinctrl_desc __maybe_unused sun9i_a80_pinctrl_desc = {
@@ -405,6 +473,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun9i_a80_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun9i_a80_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 3 }, /* PL0-PL1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun9i_a80_r_pinctrl_desc = {
@@ -417,6 +486,13 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun9i_a80_r_pinctrl_desc =
static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 4 }, /* PB8-PB9 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun50i_a64_pinctrl_desc = {
@@ -429,6 +505,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_a64_pinctrl_desc =
static const struct sunxi_pinctrl_function sun50i_a64_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun50i_a64_r_pinctrl_desc = {
@@ -441,6 +518,13 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_a64_r_pinctrl_desc
static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PA4-PA5 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PA0-PA1 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h5_pinctrl_desc = {
@@ -453,6 +537,12 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h5_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH0-PH1 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_pinctrl_desc = {
@@ -465,6 +555,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_pinctrl_desc = {
static const struct sunxi_pinctrl_function sun50i_h6_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_r_pinctrl_desc = {
@@ -477,6 +568,12 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_r_pinctrl_desc =
static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH0-PH1 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h616_pinctrl_desc = {
@@ -489,6 +586,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h616_pinctrl_desc =
static const struct sunxi_pinctrl_function sun50i_h616_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h616_r_pinctrl_desc = {
--
2.33.1
next prev parent reply other threads:[~2022-03-18 3:55 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-18 3:53 [PATCH v2 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
2022-03-18 3:53 ` [PATCH v2 01/23] sunxi: pinctrl: Create the driver skeleton Samuel Holland
2022-03-18 3:53 ` [PATCH v2 02/23] sunxi: pinctrl: Implement pin muxing functions Samuel Holland
2022-03-31 23:34 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 03/23] sunxi: pinctrl: Implement get_pin_muxing function Samuel Holland
2022-03-31 23:36 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 04/23] sunxi: pinctrl: Implement pin configuration Samuel Holland
2022-03-18 3:54 ` Samuel Holland [this message]
2022-03-31 23:18 ` [PATCH v2 05/23] pinctrl: sunxi: Add UART pinmuxes Andre Przywara
2022-03-18 3:54 ` [PATCH v2 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-31 23:59 ` Samuel Holland
2022-03-18 3:54 ` [PATCH v2 07/23] pinctrl: sunxi: Add sun4i EMAC pinmuxes Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 08/23] net: sunxi_emac: Remove non-DM pin setup Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 09/23] pinctrl: sunxi: Add sunxi GMAC pinmuxes Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 10/23] sunxi: Remove non-DM GMAC pin setup Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 11/23] pinctrl: sunxi: Add sun8i EMAC pinmuxes Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 12/23] net: sun8i_emac: Remove non-DM pin setup Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 13/23] pinctrl: sunxi: Add I2C pinmuxes Samuel Holland
2022-03-27 17:22 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 14/23] sunxi: Remove options and setup code for I2C2-I2C4 Samuel Holland
2022-03-18 3:54 ` [PATCH v2 15/23] sunxi: Remove non-DM I2C clock/pin setup from U-Boot Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-04-01 0:04 ` Samuel Holland
2022-03-18 3:54 ` [PATCH v2 16/23] i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 17/23] i2c: sun8i_rsb: " Samuel Holland
2022-03-20 7:17 ` Heinrich Schuchardt
2022-03-20 7:22 ` Heinrich Schuchardt
2022-03-31 23:20 ` Andre Przywara
2022-04-01 0:10 ` Samuel Holland
2022-03-18 3:54 ` [PATCH v2 18/23] pinctrl: sunxi: Add MMC pinmuxes Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 19/23] sunxi: Remove non-DM MMC pin setup Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 20/23] pinctrl: sunxi: Add the A64 PWM pinmux Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 21/23] pwm: sunxi: Remove non-DM pin setup Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 22/23] pinctrl: sunxi: Add SPI0 pinmuxes Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 23/23] spi: sun4i_spi: Remove non-DM pin setup Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-04-04 0:54 ` [PATCH v2 00/23] sunxi: Add and use a pinctrl driver Andre Przywara
2022-04-04 1:24 ` Samuel Holland
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