From: Andre Przywara <andre.przywara@arm.com>
To: Samuel Holland <samuel@sholland.org>
Cc: u-boot@lists.denx.de, Jagan Teki <jagan@amarulasolutions.com>,
Sean Anderson <seanga2@gmail.com>, Simon Glass <sjg@chromium.org>,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Heiko Schocher <hs@denx.de>,
Joe Hershberger <joe.hershberger@ni.com>
Subject: Re: [PATCH v2 18/23] pinctrl: sunxi: Add MMC pinmuxes
Date: Fri, 1 Apr 2022 00:20:58 +0100 [thread overview]
Message-ID: <20220401002058.610ef84c@slackpad.lan> (raw)
In-Reply-To: <20220318035420.15058-19-samuel@sholland.org>
On Thu, 17 Mar 2022 22:54:15 -0500
Samuel Holland <samuel@sholland.org> wrote:
> Pin lists and mux values were taken from the Linux drivers.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Compared against the respective manuals:
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre
> ---
>
> (no changes since v1)
>
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 54 +++++++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> index 3a2fbee324..14d40a016b 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> @@ -227,6 +227,8 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 3 }, /* PE11-PE12 */
> { "i2c1", 3 }, /* PD5-PD6 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 3 }, /* PC0-PC2 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -247,6 +249,14 @@ static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PB0-PB1 */
> { "i2c1", 2 }, /* PB18-PB19 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> +#if IS_ENABLED(CONFIG_MMC1_PINS_PH)
> + { "mmc1", 5 }, /* PH22-PH27 */
> +#else
> + { "mmc1", 4 }, /* PG0-PG5 */
> +#endif
> + { "mmc2", 3 }, /* PC6-PC15 */
> + { "mmc3", 2 }, /* PI4-PI9 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 4 }, /* PF2-PF4 */
> #else
> @@ -267,6 +277,9 @@ static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PB0-PB1 */
> { "i2c1", 2 }, /* PB15-PB16 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG3-PG8 */
> + { "mmc2", 3 }, /* PC6-PC15 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 4 }, /* PF2-PF4 */
> #else
> @@ -288,6 +301,10 @@ static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PH14-PH15 */
> { "i2c1", 2 }, /* PH16-PH17 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC6-PC15, PC24 */
> + { "mmc3", 4 }, /* PC6-PC15, PC24 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -323,6 +340,13 @@ static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PB0-PB1 */
> { "i2c1", 2 }, /* PB18-PB19 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> +#if IS_ENABLED(CONFIG_MMC1_PINS_PH)
> + { "mmc1", 5 }, /* PH22-PH27 */
> +#else
> + { "mmc1", 4 }, /* PG0-PG5 */
> +#endif
> + { "mmc2", 3 }, /* PC5-PC15, PC24 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 4 }, /* PF2-PF4 */
> #else
> @@ -342,6 +366,9 @@ static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PH2-PH3 */
> { "i2c1", 2 }, /* PH4-PH5 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC5-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #endif
> @@ -375,6 +402,9 @@ static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PH2-PH3 */
> { "i2c1", 2 }, /* PH4-PH5 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC5-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -397,6 +427,9 @@ static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PH0-PH1 */
> { "i2c1", 2 }, /* PH2-PH3 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC5-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -433,6 +466,9 @@ static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PA11-PA12 */
> { "i2c1", 3 }, /* PA18-PA19 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC5-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -469,6 +505,9 @@ static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PB6-PB7 */
> { "i2c1", 2 }, /* PB8-PB9 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 2 }, /* PC0-PC10 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -491,6 +530,9 @@ static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PH0-PH1 */
> { "i2c1", 2 }, /* PH2-PH3 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC6-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 4 }, /* PF2-PF4 */
> #else
> @@ -526,6 +568,9 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PH0-PH1 */
> { "i2c1", 2 }, /* PH2-PH3 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC1-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -562,6 +607,9 @@ static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PA11-PA12 */
> { "i2c1", 2 }, /* PA18-PA19 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC1-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -584,6 +632,9 @@ static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = {
> { "gpio_out", 1 },
> { "i2c0", 2 }, /* PD25-PD26 */
> { "i2c1", 4 }, /* PH5-PH6 */
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC1-PC14 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
> @@ -617,6 +668,9 @@ static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = {
> { "emac0", 2 }, /* PI0-PI16 */
> { "gpio_in", 0 },
> { "gpio_out", 1 },
> + { "mmc0", 2 }, /* PF0-PF5 */
> + { "mmc1", 2 }, /* PG0-PG5 */
> + { "mmc2", 3 }, /* PC0-PC16 */
> #if IS_ENABLED(CONFIG_UART0_PORT_F)
> { "uart0", 3 }, /* PF2-PF4 */
> #else
next prev parent reply other threads:[~2022-03-31 23:29 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-18 3:53 [PATCH v2 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
2022-03-18 3:53 ` [PATCH v2 01/23] sunxi: pinctrl: Create the driver skeleton Samuel Holland
2022-03-18 3:53 ` [PATCH v2 02/23] sunxi: pinctrl: Implement pin muxing functions Samuel Holland
2022-03-31 23:34 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 03/23] sunxi: pinctrl: Implement get_pin_muxing function Samuel Holland
2022-03-31 23:36 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 04/23] sunxi: pinctrl: Implement pin configuration Samuel Holland
2022-03-18 3:54 ` [PATCH v2 05/23] pinctrl: sunxi: Add UART pinmuxes Samuel Holland
2022-03-31 23:18 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-31 23:59 ` Samuel Holland
2022-03-18 3:54 ` [PATCH v2 07/23] pinctrl: sunxi: Add sun4i EMAC pinmuxes Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 08/23] net: sunxi_emac: Remove non-DM pin setup Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 09/23] pinctrl: sunxi: Add sunxi GMAC pinmuxes Samuel Holland
2022-03-31 23:19 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 10/23] sunxi: Remove non-DM GMAC pin setup Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 11/23] pinctrl: sunxi: Add sun8i EMAC pinmuxes Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 12/23] net: sun8i_emac: Remove non-DM pin setup Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 13/23] pinctrl: sunxi: Add I2C pinmuxes Samuel Holland
2022-03-27 17:22 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 14/23] sunxi: Remove options and setup code for I2C2-I2C4 Samuel Holland
2022-03-18 3:54 ` [PATCH v2 15/23] sunxi: Remove non-DM I2C clock/pin setup from U-Boot Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-04-01 0:04 ` Samuel Holland
2022-03-18 3:54 ` [PATCH v2 16/23] i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C Samuel Holland
2022-03-31 23:20 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 17/23] i2c: sun8i_rsb: " Samuel Holland
2022-03-20 7:17 ` Heinrich Schuchardt
2022-03-20 7:22 ` Heinrich Schuchardt
2022-03-31 23:20 ` Andre Przywara
2022-04-01 0:10 ` Samuel Holland
2022-03-18 3:54 ` [PATCH v2 18/23] pinctrl: sunxi: Add MMC pinmuxes Samuel Holland
2022-03-31 23:20 ` Andre Przywara [this message]
2022-03-18 3:54 ` [PATCH v2 19/23] sunxi: Remove non-DM MMC pin setup Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 20/23] pinctrl: sunxi: Add the A64 PWM pinmux Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 21/23] pwm: sunxi: Remove non-DM pin setup Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 22/23] pinctrl: sunxi: Add SPI0 pinmuxes Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-03-18 3:54 ` [PATCH v2 23/23] spi: sun4i_spi: Remove non-DM pin setup Samuel Holland
2022-03-31 23:21 ` Andre Przywara
2022-04-04 0:54 ` [PATCH v2 00/23] sunxi: Add and use a pinctrl driver Andre Przywara
2022-04-04 1:24 ` Samuel Holland
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