From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
David Airlie <airlied@linux.ie>,
Thierry Reding <thierry.reding@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
Alexander Kaplan <alex@nextthing.co>,
Wynter Woods <wynter@nextthing.co>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Rob Clark <robdclark@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Subject: [PATCH 17/19] ARM: sun5i: dt: Add display blocks to the DTSI
Date: Fri, 30 Oct 2015 15:21:03 +0100 [thread overview]
Message-ID: <1446214865-3972-18-git-send-email-maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <1446214865-3972-1-git-send-email-maxime.ripard@free-electrons.com>
The TCON and Display Engines are the two most important members of the
display pipeline.
With this alone, we can already use the display to an RGB interface.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun5i.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 426db76c0fe6..a67f4bdf5bcc 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -481,6 +481,20 @@
#size-cells = <0>;
};
+ tcon: lcd-controller@01c0c000 {
+ compatible = "allwinner,sun4i-a10-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <44>;
+ clocks = <&ahb_gates 36>,
+ <&tcon_ch0_clk>,
+ <&tcon_ch1_clk>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon-pixel-clock";
+ status = "disabled";
+ };
+
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
@@ -767,5 +781,31 @@
interrupts = <82>, <83>;
clocks = <&ahb_gates 28>;
};
+
+ de: display-engine@01e00000 {
+ compatible = "allwinner,sun5i-a13-display-engine";
+ reg = <0x01e00000 0x20000>,
+ <0x01e60000 0x10000>;
+ reg-names = "frontend0",
+ "backend0";
+ interrupts = <47>;
+ interrupt-names = "engine0";
+ clocks = <&ahb_gates 46>, <&de_fe_clk>,
+ <&dram_gates 25>, <&ahb_gates 44>,
+ <&de_be_clk>, <&dram_gates 26>;
+ clock-names = "frontend0-bus", "frontend0-mod",
+ "frontend0-ram", "backend0-bus",
+ "backend0-mod", "backend0-ram";
+ resets = <&de_fe_clk>,
+ <&de_be_clk>;
+ reset-names = "frontend0",
+ "backend0";
+
+ allwinner,tcon = <&tcon>;
+
+ assigned-clocks = <&de_be_clk>;
+ assigned-clock-rates = <300000000>;
+ status = "disabled";
+ };
};
};
--
2.6.2
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Mike Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Laurent Pinchart
<laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
Alexander Kaplan <alex-MflLfwwFzuz+yO7R74ARew@public.gmane.org>,
Wynter Woods <wynter-MflLfwwFzuz+yO7R74ARew@public.gmane.org>,
Boris Brezillon
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Thomas Petazzoni
<thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Rob Clark <robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Daniel Vetter <daniel-/w4YWyX8dFk@public.gmane.org>,
Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Subject: [PATCH 17/19] ARM: sun5i: dt: Add display blocks to the DTSI
Date: Fri, 30 Oct 2015 15:21:03 +0100 [thread overview]
Message-ID: <1446214865-3972-18-git-send-email-maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <1446214865-3972-1-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The TCON and Display Engines are the two most important members of the
display pipeline.
With this alone, we can already use the display to an RGB interface.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm/boot/dts/sun5i.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 426db76c0fe6..a67f4bdf5bcc 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -481,6 +481,20 @@
#size-cells = <0>;
};
+ tcon: lcd-controller@01c0c000 {
+ compatible = "allwinner,sun4i-a10-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <44>;
+ clocks = <&ahb_gates 36>,
+ <&tcon_ch0_clk>,
+ <&tcon_ch1_clk>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon-pixel-clock";
+ status = "disabled";
+ };
+
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
@@ -767,5 +781,31 @@
interrupts = <82>, <83>;
clocks = <&ahb_gates 28>;
};
+
+ de: display-engine@01e00000 {
+ compatible = "allwinner,sun5i-a13-display-engine";
+ reg = <0x01e00000 0x20000>,
+ <0x01e60000 0x10000>;
+ reg-names = "frontend0",
+ "backend0";
+ interrupts = <47>;
+ interrupt-names = "engine0";
+ clocks = <&ahb_gates 46>, <&de_fe_clk>,
+ <&dram_gates 25>, <&ahb_gates 44>,
+ <&de_be_clk>, <&dram_gates 26>;
+ clock-names = "frontend0-bus", "frontend0-mod",
+ "frontend0-ram", "backend0-bus",
+ "backend0-mod", "backend0-ram";
+ resets = <&de_fe_clk>,
+ <&de_be_clk>;
+ reset-names = "frontend0",
+ "backend0";
+
+ allwinner,tcon = <&tcon>;
+
+ assigned-clocks = <&de_be_clk>;
+ assigned-clock-rates = <300000000>;
+ status = "disabled";
+ };
};
};
--
2.6.2
WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 17/19] ARM: sun5i: dt: Add display blocks to the DTSI
Date: Fri, 30 Oct 2015 15:21:03 +0100 [thread overview]
Message-ID: <1446214865-3972-18-git-send-email-maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <1446214865-3972-1-git-send-email-maxime.ripard@free-electrons.com>
The TCON and Display Engines are the two most important members of the
display pipeline.
With this alone, we can already use the display to an RGB interface.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun5i.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 426db76c0fe6..a67f4bdf5bcc 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -481,6 +481,20 @@
#size-cells = <0>;
};
+ tcon: lcd-controller at 01c0c000 {
+ compatible = "allwinner,sun4i-a10-tcon";
+ reg = <0x01c0c000 0x1000>;
+ interrupts = <44>;
+ clocks = <&ahb_gates 36>,
+ <&tcon_ch0_clk>,
+ <&tcon_ch1_clk>;
+ clock-names = "ahb",
+ "tcon-ch0",
+ "tcon-ch1";
+ clock-output-names = "tcon-pixel-clock";
+ status = "disabled";
+ };
+
mmc0: mmc at 01c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
@@ -767,5 +781,31 @@
interrupts = <82>, <83>;
clocks = <&ahb_gates 28>;
};
+
+ de: display-engine at 01e00000 {
+ compatible = "allwinner,sun5i-a13-display-engine";
+ reg = <0x01e00000 0x20000>,
+ <0x01e60000 0x10000>;
+ reg-names = "frontend0",
+ "backend0";
+ interrupts = <47>;
+ interrupt-names = "engine0";
+ clocks = <&ahb_gates 46>, <&de_fe_clk>,
+ <&dram_gates 25>, <&ahb_gates 44>,
+ <&de_be_clk>, <&dram_gates 26>;
+ clock-names = "frontend0-bus", "frontend0-mod",
+ "frontend0-ram", "backend0-bus",
+ "backend0-mod", "backend0-ram";
+ resets = <&de_fe_clk>,
+ <&de_be_clk>;
+ reset-names = "frontend0",
+ "backend0";
+
+ allwinner,tcon = <&tcon>;
+
+ assigned-clocks = <&de_be_clk>;
+ assigned-clock-rates = <300000000>;
+ status = "disabled";
+ };
};
};
--
2.6.2
next prev parent reply other threads:[~2015-10-30 14:22 UTC|newest]
Thread overview: 167+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-30 14:20 [PATCH 00/19] drm: Add Allwinner A10 display engine support Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 01/19] clk: sunxi: Add display clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 21:29 ` Stephen Boyd
2015-10-30 21:29 ` Stephen Boyd
2015-11-06 23:39 ` Maxime Ripard
2015-11-06 23:39 ` Maxime Ripard
2015-11-06 23:39 ` Maxime Ripard
2015-11-12 20:31 ` Stephen Boyd
2015-11-12 20:31 ` Stephen Boyd
2015-11-19 15:42 ` Maxime Ripard
2015-11-19 15:42 ` Maxime Ripard
2015-11-19 15:42 ` Maxime Ripard
2015-10-31 10:28 ` Chen-Yu Tsai
2015-10-31 10:28 ` Chen-Yu Tsai
2015-10-31 10:28 ` Chen-Yu Tsai
2015-11-06 19:42 ` Maxime Ripard
2015-11-06 19:42 ` Maxime Ripard
2015-11-06 19:42 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 02/19] clk: sunxi: Add PLL3 clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 21:32 ` Stephen Boyd
2015-10-30 21:32 ` Stephen Boyd
2015-10-30 21:32 ` Stephen Boyd
2015-10-30 14:20 ` [PATCH 03/19] clk: sunxi: Add TCON channel0 clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-31 10:19 ` Chen-Yu Tsai
2015-10-31 10:19 ` Chen-Yu Tsai
2015-11-06 22:11 ` Maxime Ripard
2015-11-06 22:11 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 21:37 ` Stephen Boyd
2015-10-30 21:37 ` Stephen Boyd
2015-11-07 0:11 ` Maxime Ripard
2015-11-07 0:11 ` Maxime Ripard
2015-11-07 0:11 ` Maxime Ripard
2015-10-31 9:53 ` Chen-Yu Tsai
2015-10-31 9:53 ` Chen-Yu Tsai
2015-10-31 9:53 ` Chen-Yu Tsai
2015-11-07 0:01 ` Maxime Ripard
2015-11-07 0:01 ` Maxime Ripard
2015-11-07 0:01 ` Maxime Ripard
2015-11-09 3:36 ` Chen-Yu Tsai
2015-11-09 3:36 ` Chen-Yu Tsai
2015-11-09 3:36 ` Chen-Yu Tsai
2015-11-19 15:35 ` Maxime Ripard
2015-11-19 15:35 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 05/19] clk: sunxi: add DRAM gates Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-11-09 4:18 ` Chen-Yu Tsai
2015-11-09 4:18 ` Chen-Yu Tsai
2015-11-09 4:18 ` Chen-Yu Tsai
2015-11-13 8:08 ` Chen-Yu Tsai
2015-11-13 8:08 ` Chen-Yu Tsai
2015-11-13 8:08 ` Chen-Yu Tsai
2015-11-19 15:43 ` Maxime Ripard
2015-11-19 15:43 ` Maxime Ripard
2015-11-19 15:43 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 06/19] clk: sunxi: Add Allwinner R8 AHB gates support Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 16:01 ` Chen-Yu Tsai
2015-10-30 16:01 ` Chen-Yu Tsai
2015-10-30 16:01 ` Chen-Yu Tsai
2015-10-30 16:33 ` Hans de Goede
2015-10-30 16:33 ` Hans de Goede
2015-10-30 16:33 ` Hans de Goede
2015-10-30 14:20 ` [PATCH 07/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 17:32 ` Thierry Reding
2015-10-30 17:32 ` Thierry Reding
2015-10-30 17:32 ` Thierry Reding
2015-11-07 0:44 ` Maxime Ripard
2015-11-07 0:44 ` Maxime Ripard
2015-11-07 0:44 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 08/19] drm: Add Allwinner A10 Display Engine support Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:44 ` Daniel Vetter
2015-10-30 14:44 ` Daniel Vetter
2015-11-11 22:14 ` Maxime Ripard
2015-11-11 22:14 ` Maxime Ripard
2015-11-11 22:14 ` Maxime Ripard
2015-11-16 15:04 ` Daniel Vetter
2015-11-16 15:04 ` Daniel Vetter
2015-11-16 15:04 ` Daniel Vetter
2015-10-30 14:20 ` [PATCH 09/19] drm: sun4i: Add DT bindings documentation Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 16:40 ` Rob Herring
2015-10-30 16:40 ` Rob Herring
2015-10-30 16:40 ` Rob Herring
2015-10-30 17:37 ` Thierry Reding
2015-10-30 17:37 ` Thierry Reding
2015-10-30 17:37 ` Thierry Reding
2015-10-30 17:37 ` Thierry Reding
2015-11-01 14:28 ` Rob Herring
2015-11-01 14:28 ` Rob Herring
2015-11-01 14:28 ` Rob Herring
2015-11-01 14:28 ` Rob Herring
2015-11-06 22:32 ` Maxime Ripard
2015-11-06 22:32 ` Maxime Ripard
2015-11-06 22:32 ` Maxime Ripard
2015-11-06 22:32 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 10/19] drm: sun4i: Add RGB output Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 11/19] drm: sun4i: Add composite output Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-11-02 2:53 ` [linux-sunxi] " Jonathan Liu
2015-11-02 2:53 ` Jonathan Liu
2015-11-02 2:53 ` Jonathan Liu
2015-11-07 0:35 ` [linux-sunxi] " Maxime Ripard
2015-11-07 0:35 ` Maxime Ripard
2015-11-07 0:35 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 12/19] drm: sun4i: tv: Add PAL output standard Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 13/19] drm: sun4i: tv: Add NTSC " Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 14/19] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-11-09 4:24 ` Chen-Yu Tsai
2015-11-09 4:24 ` Chen-Yu Tsai
2015-11-09 4:24 ` Chen-Yu Tsai
2015-10-30 14:21 ` [PATCH 15/19] ARM: sun5i: dt: Add display and TCON clocks Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 16/19] ARM: sun5i: dt: Add DRAM gates Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard [this message]
2015-10-30 14:21 ` [PATCH 17/19] ARM: sun5i: dt: Add display blocks to the DTSI Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 18/19] ARM: sun5i: r8: Add AHB gates " Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 19/19] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 15:20 ` Chen-Yu Tsai
2015-10-30 15:20 ` Chen-Yu Tsai
2015-11-06 19:37 ` Maxime Ripard
2015-11-06 19:37 ` Maxime Ripard
2015-11-06 19:37 ` Maxime Ripard
2015-10-30 14:52 ` [PATCH 00/19] drm: Add Allwinner A10 display engine support Daniel Vetter
2015-10-30 14:52 ` Daniel Vetter
2015-10-30 14:52 ` Daniel Vetter
2015-11-12 5:12 ` Maxime Ripard
2015-11-12 5:12 ` Maxime Ripard
2015-11-12 5:12 ` Maxime Ripard
2015-10-30 15:02 ` Stefan Monnier
2015-11-09 3:43 ` Chen-Yu Tsai
2015-11-09 3:43 ` Chen-Yu Tsai
2015-11-09 3:43 ` Chen-Yu Tsai
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