From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
David Airlie <airlied@linux.ie>,
Thierry Reding <thierry.reding@gmail.com>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
linux-sunxi <linux-sunxi@googlegroups.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Hans de Goede <hdegoede@redhat.com>,
Alexander Kaplan <alex@nextthing.co>,
Wynter Woods <wynter@nextthing.co>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Rob Clark <robdclark@gmail.com>, Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 03/19] clk: sunxi: Add TCON channel0 clock
Date: Fri, 6 Nov 2015 14:11:22 -0800 [thread overview]
Message-ID: <20151106221122.GL6114@lukather> (raw)
In-Reply-To: <CAGb2v66hjH_GpkXpHdpCM+mUv-CgvqxJNFzsoRJ5MWp04b+jew@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 676 bytes --]
Hi,
On Sat, Oct 31, 2015 at 06:19:59PM +0800, Chen-Yu Tsai wrote:
> > +#define SUN4I_A10_TCON_CH0_RESET_SHIFT 29
>
> This is sun5i specific.
>
> A10s manual says bit 30 is the LCD reset, while bit 29 is the TV
> encoder reset. A13/R8 don't mention TCON_CH0 clock. A10/A20 have no
> separate TV encoder reset.
>
> Please rename the clock.
This thing with the A10s is odd, the channel 0 is only used for the
LCD interface, and not the tv encoder (and both the A13 and R8 do have
a TCON).
But you're right, I've fixed it.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/19] clk: sunxi: Add TCON channel0 clock
Date: Fri, 6 Nov 2015 14:11:22 -0800 [thread overview]
Message-ID: <20151106221122.GL6114@lukather> (raw)
In-Reply-To: <CAGb2v66hjH_GpkXpHdpCM+mUv-CgvqxJNFzsoRJ5MWp04b+jew@mail.gmail.com>
Hi,
On Sat, Oct 31, 2015 at 06:19:59PM +0800, Chen-Yu Tsai wrote:
> > +#define SUN4I_A10_TCON_CH0_RESET_SHIFT 29
>
> This is sun5i specific.
>
> A10s manual says bit 30 is the LCD reset, while bit 29 is the TV
> encoder reset. A13/R8 don't mention TCON_CH0 clock. A10/A20 have no
> separate TV encoder reset.
>
> Please rename the clock.
This thing with the A10s is odd, the channel 0 is only used for the
LCD interface, and not the tv encoder (and both the A13 and R8 do have
a TCON).
But you're right, I've fixed it.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2015-11-06 22:11 UTC|newest]
Thread overview: 167+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-30 14:20 [PATCH 00/19] drm: Add Allwinner A10 display engine support Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 01/19] clk: sunxi: Add display clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 21:29 ` Stephen Boyd
2015-10-30 21:29 ` Stephen Boyd
2015-11-06 23:39 ` Maxime Ripard
2015-11-06 23:39 ` Maxime Ripard
2015-11-06 23:39 ` Maxime Ripard
2015-11-12 20:31 ` Stephen Boyd
2015-11-12 20:31 ` Stephen Boyd
2015-11-19 15:42 ` Maxime Ripard
2015-11-19 15:42 ` Maxime Ripard
2015-11-19 15:42 ` Maxime Ripard
2015-10-31 10:28 ` Chen-Yu Tsai
2015-10-31 10:28 ` Chen-Yu Tsai
2015-10-31 10:28 ` Chen-Yu Tsai
2015-11-06 19:42 ` Maxime Ripard
2015-11-06 19:42 ` Maxime Ripard
2015-11-06 19:42 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 02/19] clk: sunxi: Add PLL3 clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 21:32 ` Stephen Boyd
2015-10-30 21:32 ` Stephen Boyd
2015-10-30 21:32 ` Stephen Boyd
2015-10-30 14:20 ` [PATCH 03/19] clk: sunxi: Add TCON channel0 clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-31 10:19 ` Chen-Yu Tsai
2015-10-31 10:19 ` Chen-Yu Tsai
2015-11-06 22:11 ` Maxime Ripard [this message]
2015-11-06 22:11 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 21:37 ` Stephen Boyd
2015-10-30 21:37 ` Stephen Boyd
2015-11-07 0:11 ` Maxime Ripard
2015-11-07 0:11 ` Maxime Ripard
2015-11-07 0:11 ` Maxime Ripard
2015-10-31 9:53 ` Chen-Yu Tsai
2015-10-31 9:53 ` Chen-Yu Tsai
2015-10-31 9:53 ` Chen-Yu Tsai
2015-11-07 0:01 ` Maxime Ripard
2015-11-07 0:01 ` Maxime Ripard
2015-11-07 0:01 ` Maxime Ripard
2015-11-09 3:36 ` Chen-Yu Tsai
2015-11-09 3:36 ` Chen-Yu Tsai
2015-11-09 3:36 ` Chen-Yu Tsai
2015-11-19 15:35 ` Maxime Ripard
2015-11-19 15:35 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 05/19] clk: sunxi: add DRAM gates Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-11-09 4:18 ` Chen-Yu Tsai
2015-11-09 4:18 ` Chen-Yu Tsai
2015-11-09 4:18 ` Chen-Yu Tsai
2015-11-13 8:08 ` Chen-Yu Tsai
2015-11-13 8:08 ` Chen-Yu Tsai
2015-11-13 8:08 ` Chen-Yu Tsai
2015-11-19 15:43 ` Maxime Ripard
2015-11-19 15:43 ` Maxime Ripard
2015-11-19 15:43 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 06/19] clk: sunxi: Add Allwinner R8 AHB gates support Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 16:01 ` Chen-Yu Tsai
2015-10-30 16:01 ` Chen-Yu Tsai
2015-10-30 16:01 ` Chen-Yu Tsai
2015-10-30 16:33 ` Hans de Goede
2015-10-30 16:33 ` Hans de Goede
2015-10-30 16:33 ` Hans de Goede
2015-10-30 14:20 ` [PATCH 07/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 17:32 ` Thierry Reding
2015-10-30 17:32 ` Thierry Reding
2015-10-30 17:32 ` Thierry Reding
2015-11-07 0:44 ` Maxime Ripard
2015-11-07 0:44 ` Maxime Ripard
2015-11-07 0:44 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 08/19] drm: Add Allwinner A10 Display Engine support Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:44 ` Daniel Vetter
2015-10-30 14:44 ` Daniel Vetter
2015-11-11 22:14 ` Maxime Ripard
2015-11-11 22:14 ` Maxime Ripard
2015-11-11 22:14 ` Maxime Ripard
2015-11-16 15:04 ` Daniel Vetter
2015-11-16 15:04 ` Daniel Vetter
2015-11-16 15:04 ` Daniel Vetter
2015-10-30 14:20 ` [PATCH 09/19] drm: sun4i: Add DT bindings documentation Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 16:40 ` Rob Herring
2015-10-30 16:40 ` Rob Herring
2015-10-30 16:40 ` Rob Herring
2015-10-30 17:37 ` Thierry Reding
2015-10-30 17:37 ` Thierry Reding
2015-10-30 17:37 ` Thierry Reding
2015-10-30 17:37 ` Thierry Reding
2015-11-01 14:28 ` Rob Herring
2015-11-01 14:28 ` Rob Herring
2015-11-01 14:28 ` Rob Herring
2015-11-01 14:28 ` Rob Herring
2015-11-06 22:32 ` Maxime Ripard
2015-11-06 22:32 ` Maxime Ripard
2015-11-06 22:32 ` Maxime Ripard
2015-11-06 22:32 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 10/19] drm: sun4i: Add RGB output Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 11/19] drm: sun4i: Add composite output Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-11-02 2:53 ` [linux-sunxi] " Jonathan Liu
2015-11-02 2:53 ` Jonathan Liu
2015-11-02 2:53 ` Jonathan Liu
2015-11-07 0:35 ` [linux-sunxi] " Maxime Ripard
2015-11-07 0:35 ` Maxime Ripard
2015-11-07 0:35 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 12/19] drm: sun4i: tv: Add PAL output standard Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 13/19] drm: sun4i: tv: Add NTSC " Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:20 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 14/19] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-11-09 4:24 ` Chen-Yu Tsai
2015-11-09 4:24 ` Chen-Yu Tsai
2015-11-09 4:24 ` Chen-Yu Tsai
2015-10-30 14:21 ` [PATCH 15/19] ARM: sun5i: dt: Add display and TCON clocks Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 16/19] ARM: sun5i: dt: Add DRAM gates Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 17/19] ARM: sun5i: dt: Add display blocks to the DTSI Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 18/19] ARM: sun5i: r8: Add AHB gates " Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` [PATCH 19/19] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 14:21 ` Maxime Ripard
2015-10-30 15:20 ` Chen-Yu Tsai
2015-10-30 15:20 ` Chen-Yu Tsai
2015-11-06 19:37 ` Maxime Ripard
2015-11-06 19:37 ` Maxime Ripard
2015-11-06 19:37 ` Maxime Ripard
2015-10-30 14:52 ` [PATCH 00/19] drm: Add Allwinner A10 display engine support Daniel Vetter
2015-10-30 14:52 ` Daniel Vetter
2015-10-30 14:52 ` Daniel Vetter
2015-11-12 5:12 ` Maxime Ripard
2015-11-12 5:12 ` Maxime Ripard
2015-11-12 5:12 ` Maxime Ripard
2015-10-30 15:02 ` Stefan Monnier
2015-11-09 3:43 ` Chen-Yu Tsai
2015-11-09 3:43 ` Chen-Yu Tsai
2015-11-09 3:43 ` Chen-Yu Tsai
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