From: haibo.chen@nxp.com
To: ashish.kumar@nxp.com, yogeshgaur.83@gmail.com,
broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, han.xu@nxp.com,
singh.kuldeep87k@gmail.com, tudor.ambarus@microchip.com,
p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com,
richard@nod.at, vigneshr@ti.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
festevam@gmail.com, linux-imx@nxp.com,
linux-arm-kernel@lists.infradead.org, haibo.chen@nxp.com,
zhengxunli@mxic.com.tw
Subject: [PATCH 06/11] spi: spi-nxp-fspi: enable octal ddr for iMX8QM/QXP/DXL
Date: Tue, 5 Jul 2022 17:11:38 +0800 [thread overview]
Message-ID: <1657012303-6464-6-git-send-email-haibo.chen@nxp.com> (raw)
In-Reply-To: <1657012303-6464-1-git-send-email-haibo.chen@nxp.com>
From: Han Xu <han.xu@nxp.com>
To enable the octal ddr for iMX8QM/QXP/DXL, need to set the proper
slave line delay to get the correct sample points. So add one entry
in dts to set it.
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
drivers/spi/spi-nxp-fspi.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 61cf1b82c0d7..cfc2600e3b6d 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -218,9 +218,13 @@
#define FSPI_DLLACR 0xC0
#define FSPI_DLLACR_OVRDEN BIT(8)
+#define FSPI_DLLACR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLACR_DLLEN BIT(0)
#define FSPI_DLLBCR 0xC4
#define FSPI_DLLBCR_OVRDEN BIT(8)
+#define FSPI_DLLBCR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLBCR_DLLEN BIT(0)
#define FSPI_STS0 0xE0
#define FSPI_STS0_DLPHB(x) ((x) << 8)
@@ -375,6 +379,7 @@ struct nxp_fspi {
u32 memmap_phy_size;
u32 memmap_start;
u32 memmap_len;
+ u32 dll_slvdly;
struct clk *clk, *clk_en;
struct device *dev;
struct completion c;
@@ -1081,6 +1086,13 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
+ if (f->dll_slvdly) {
+ fspi_writel(f, FSPI_DLLACR_DLLEN | FSPI_DLLACR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLACR);
+ fspi_writel(f, FSPI_DLLBCR_DLLEN | FSPI_DLLBCR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLBCR);
+ }
+
/* enable module */
fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) |
FSPI_MCR0_IP_TIMEOUT(0xFF) | (u32) FSPI_MCR0_OCTCOMB_EN,
@@ -1259,6 +1271,9 @@ static int nxp_fspi_probe(struct platform_device *pdev)
goto err_disable_clk;
}
+ /* check if need to set the slave delay line */
+ of_property_read_u32(np, "nxp,fspi-dll-slvdly", &f->dll_slvdly);
+
mutex_init(&f->lock);
ctlr->bus_num = -1;
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: haibo.chen@nxp.com
To: ashish.kumar@nxp.com, yogeshgaur.83@gmail.com,
broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, han.xu@nxp.com,
singh.kuldeep87k@gmail.com, tudor.ambarus@microchip.com,
p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com,
richard@nod.at, vigneshr@ti.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
festevam@gmail.com, linux-imx@nxp.com,
linux-arm-kernel@lists.infradead.org, haibo.chen@nxp.com,
zhengxunli@mxic.com.tw
Subject: [PATCH 06/11] spi: spi-nxp-fspi: enable octal ddr for iMX8QM/QXP/DXL
Date: Tue, 5 Jul 2022 17:11:38 +0800 [thread overview]
Message-ID: <1657012303-6464-6-git-send-email-haibo.chen@nxp.com> (raw)
In-Reply-To: <1657012303-6464-1-git-send-email-haibo.chen@nxp.com>
From: Han Xu <han.xu@nxp.com>
To enable the octal ddr for iMX8QM/QXP/DXL, need to set the proper
slave line delay to get the correct sample points. So add one entry
in dts to set it.
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
drivers/spi/spi-nxp-fspi.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 61cf1b82c0d7..cfc2600e3b6d 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -218,9 +218,13 @@
#define FSPI_DLLACR 0xC0
#define FSPI_DLLACR_OVRDEN BIT(8)
+#define FSPI_DLLACR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLACR_DLLEN BIT(0)
#define FSPI_DLLBCR 0xC4
#define FSPI_DLLBCR_OVRDEN BIT(8)
+#define FSPI_DLLBCR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLBCR_DLLEN BIT(0)
#define FSPI_STS0 0xE0
#define FSPI_STS0_DLPHB(x) ((x) << 8)
@@ -375,6 +379,7 @@ struct nxp_fspi {
u32 memmap_phy_size;
u32 memmap_start;
u32 memmap_len;
+ u32 dll_slvdly;
struct clk *clk, *clk_en;
struct device *dev;
struct completion c;
@@ -1081,6 +1086,13 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
+ if (f->dll_slvdly) {
+ fspi_writel(f, FSPI_DLLACR_DLLEN | FSPI_DLLACR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLACR);
+ fspi_writel(f, FSPI_DLLBCR_DLLEN | FSPI_DLLBCR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLBCR);
+ }
+
/* enable module */
fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) |
FSPI_MCR0_IP_TIMEOUT(0xFF) | (u32) FSPI_MCR0_OCTCOMB_EN,
@@ -1259,6 +1271,9 @@ static int nxp_fspi_probe(struct platform_device *pdev)
goto err_disable_clk;
}
+ /* check if need to set the slave delay line */
+ of_property_read_u32(np, "nxp,fspi-dll-slvdly", &f->dll_slvdly);
+
mutex_init(&f->lock);
ctlr->bus_num = -1;
--
2.25.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: haibo.chen@nxp.com
To: ashish.kumar@nxp.com, yogeshgaur.83@gmail.com,
broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, han.xu@nxp.com,
singh.kuldeep87k@gmail.com, tudor.ambarus@microchip.com,
p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com,
richard@nod.at, vigneshr@ti.com, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
festevam@gmail.com, linux-imx@nxp.com,
linux-arm-kernel@lists.infradead.org, haibo.chen@nxp.com,
zhengxunli@mxic.com.tw
Subject: [PATCH 06/11] spi: spi-nxp-fspi: enable octal ddr for iMX8QM/QXP/DXL
Date: Tue, 5 Jul 2022 17:11:38 +0800 [thread overview]
Message-ID: <1657012303-6464-6-git-send-email-haibo.chen@nxp.com> (raw)
In-Reply-To: <1657012303-6464-1-git-send-email-haibo.chen@nxp.com>
From: Han Xu <han.xu@nxp.com>
To enable the octal ddr for iMX8QM/QXP/DXL, need to set the proper
slave line delay to get the correct sample points. So add one entry
in dts to set it.
Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
drivers/spi/spi-nxp-fspi.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 61cf1b82c0d7..cfc2600e3b6d 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -218,9 +218,13 @@
#define FSPI_DLLACR 0xC0
#define FSPI_DLLACR_OVRDEN BIT(8)
+#define FSPI_DLLACR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLACR_DLLEN BIT(0)
#define FSPI_DLLBCR 0xC4
#define FSPI_DLLBCR_OVRDEN BIT(8)
+#define FSPI_DLLBCR_SLVDLY(x) ((x) << 3)
+#define FSPI_DLLBCR_DLLEN BIT(0)
#define FSPI_STS0 0xE0
#define FSPI_STS0_DLPHB(x) ((x) << 8)
@@ -375,6 +379,7 @@ struct nxp_fspi {
u32 memmap_phy_size;
u32 memmap_start;
u32 memmap_len;
+ u32 dll_slvdly;
struct clk *clk, *clk_en;
struct device *dev;
struct completion c;
@@ -1081,6 +1086,13 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
+ if (f->dll_slvdly) {
+ fspi_writel(f, FSPI_DLLACR_DLLEN | FSPI_DLLACR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLACR);
+ fspi_writel(f, FSPI_DLLBCR_DLLEN | FSPI_DLLBCR_SLVDLY(f->dll_slvdly),
+ base + FSPI_DLLBCR);
+ }
+
/* enable module */
fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) |
FSPI_MCR0_IP_TIMEOUT(0xFF) | (u32) FSPI_MCR0_OCTCOMB_EN,
@@ -1259,6 +1271,9 @@ static int nxp_fspi_probe(struct platform_device *pdev)
goto err_disable_clk;
}
+ /* check if need to set the slave delay line */
+ of_property_read_u32(np, "nxp,fspi-dll-slvdly", &f->dll_slvdly);
+
mutex_init(&f->lock);
ctlr->bus_num = -1;
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-07-05 9:27 UTC|newest]
Thread overview: 99+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-05 9:11 [PATCH 01/11] spi: spi-nxp-fspi: enable runtime pm for fspi haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 02/11] spi: spi-nxp-fspi: change the default lut index haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 03/11] spi: spi-nxp-fspi: add DTR mode support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 04/11] spi: spi-nxp-fspi: add function to select sample clock source for flash reading haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-06 21:02 ` Michael Walle
2022-07-06 21:02 ` Michael Walle
2022-07-06 21:02 ` Michael Walle
2022-07-05 9:11 ` [PATCH 05/11] spi: spi-nxp-fspi: Add quirk to disable DTR support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 13:50 ` Michael Walle
2022-07-05 13:50 ` Michael Walle
2022-07-05 13:50 ` Michael Walle
2022-07-05 9:11 ` haibo.chen [this message]
2022-07-05 9:11 ` [PATCH 06/11] spi: spi-nxp-fspi: enable octal ddr for iMX8QM/QXP/DXL haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:48 ` Krzysztof Kozlowski
2022-07-05 9:48 ` Krzysztof Kozlowski
2022-07-05 9:48 ` Krzysztof Kozlowski
2022-07-05 10:28 ` Bough Chen
2022-07-05 10:28 ` Bough Chen
2022-07-05 10:28 ` Bough Chen
2022-07-05 10:36 ` Krzysztof Kozlowski
2022-07-05 10:36 ` Krzysztof Kozlowski
2022-07-05 10:36 ` Krzysztof Kozlowski
2022-07-05 13:19 ` Han Xu
2022-07-05 13:19 ` Han Xu
2022-07-05 13:19 ` Han Xu
2022-07-05 13:29 ` Krzysztof Kozlowski
2022-07-05 13:29 ` Krzysztof Kozlowski
2022-07-05 13:29 ` Krzysztof Kozlowski
2022-07-05 14:00 ` Han Xu
2022-07-05 14:00 ` Han Xu
2022-07-05 14:00 ` Han Xu
2022-07-05 14:03 ` Krzysztof Kozlowski
2022-07-05 14:03 ` Krzysztof Kozlowski
2022-07-05 14:03 ` Krzysztof Kozlowski
2022-07-05 14:31 ` Han Xu
2022-07-05 14:31 ` Han Xu
2022-07-05 14:31 ` Han Xu
2022-07-05 14:06 ` Michael Walle
2022-07-05 14:06 ` Michael Walle
2022-07-05 14:06 ` Michael Walle
2022-07-05 14:12 ` Krzysztof Kozlowski
2022-07-05 14:12 ` Krzysztof Kozlowski
2022-07-05 14:12 ` Krzysztof Kozlowski
2022-07-05 14:52 ` Han Xu
2022-07-05 14:52 ` Han Xu
2022-07-05 14:52 ` Han Xu
2022-07-05 14:58 ` Michael Walle
2022-07-05 14:58 ` Michael Walle
2022-07-05 14:58 ` Michael Walle
2022-07-05 15:07 ` Mark Brown
2022-07-05 15:07 ` Mark Brown
2022-07-05 15:07 ` Mark Brown
2022-07-05 15:38 ` Krzysztof Kozlowski
2022-07-05 15:38 ` Krzysztof Kozlowski
2022-07-05 15:38 ` Krzysztof Kozlowski
2022-07-05 15:50 ` Han Xu
2022-07-05 15:50 ` Han Xu
2022-07-05 15:50 ` Han Xu
2022-07-06 16:11 ` Rob Herring
2022-07-06 16:11 ` Rob Herring
2022-07-06 16:11 ` Rob Herring
2022-07-06 20:59 ` Michael Walle
2022-07-06 20:59 ` Michael Walle
2022-07-06 20:59 ` Michael Walle
2022-07-05 9:11 ` [PATCH 08/11] mtd: spi-nor: macronix: add support for Macronix octaflash haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 09/11] mtd: spi-nor: macronix: add mx25uw51345g OPI mode support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-18 6:57 ` Michael Walle
2022-07-18 6:57 ` Michael Walle
2022-07-18 6:57 ` Michael Walle
2022-07-05 9:11 ` [PATCH 10/11] arm64: dts: imx8ulp: add flexspi support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 11/11] arm64: dts: imx8qm/imx8qxp: " haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 14:01 ` [PATCH 01/11] spi: spi-nxp-fspi: enable runtime pm for fspi Michael Walle
2022-07-05 14:01 ` Michael Walle
2022-07-05 14:01 ` Michael Walle
2022-07-05 23:06 ` Han Xu
2022-07-05 23:06 ` Han Xu
2022-07-05 23:06 ` Han Xu
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