From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Michael Walle <michael@walle.cc>, Han Xu <han.xu@nxp.com>
Cc: Bough Chen <haibo.chen@nxp.com>,
ashish.kumar@nxp.com, yogeshgaur.83@gmail.com,
broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, singh.kuldeep87k@gmail.com,
tudor.ambarus@microchip.com, p.yadav@ti.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-mtd@lists.infradead.org, festevam@gmail.com,
dl-linux-imx <linux-imx@nxp.com>,
linux-arm-kernel@lists.infradead.org, zhengxunli@mxic.com.tw
Subject: Re: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly
Date: Tue, 5 Jul 2022 16:12:38 +0200 [thread overview]
Message-ID: <be521f90-97ce-c61d-d7d6-8f2bde24d824@linaro.org> (raw)
In-Reply-To: <62f113a0cdb0d58bf04ab0b274912eb7@walle.cc>
On 05/07/2022 16:06, Michael Walle wrote:
>
>>>
>>> I think you could use here clock cycles or clock phase, but then it
>>> has to be obvious
>>> it is that unit.
>>
>> Hi Krzysztof,
>>
>> Let me clarify it, in the document a term "delay cell" was used to
>> descript this register bit. Each delay cell equals "1/32 clock phase",
>> so the unit of delay cell is clock phase. The value user need set in
>> DT just number to define how many delay cells needed.
>
> Then should the unit be "-degrees" and the possible range 0-180?
Thanks. We don't have it documented currently, but the unit seems
reasonable.
Best regards,
Krzysztof
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Michael Walle <michael@walle.cc>, Han Xu <han.xu@nxp.com>
Cc: Bough Chen <haibo.chen@nxp.com>,
ashish.kumar@nxp.com, yogeshgaur.83@gmail.com,
broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, singh.kuldeep87k@gmail.com,
tudor.ambarus@microchip.com, p.yadav@ti.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-mtd@lists.infradead.org, festevam@gmail.com,
dl-linux-imx <linux-imx@nxp.com>,
linux-arm-kernel@lists.infradead.org, zhengxunli@mxic.com.tw
Subject: Re: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly
Date: Tue, 5 Jul 2022 16:12:38 +0200 [thread overview]
Message-ID: <be521f90-97ce-c61d-d7d6-8f2bde24d824@linaro.org> (raw)
In-Reply-To: <62f113a0cdb0d58bf04ab0b274912eb7@walle.cc>
On 05/07/2022 16:06, Michael Walle wrote:
>
>>>
>>> I think you could use here clock cycles or clock phase, but then it
>>> has to be obvious
>>> it is that unit.
>>
>> Hi Krzysztof,
>>
>> Let me clarify it, in the document a term "delay cell" was used to
>> descript this register bit. Each delay cell equals "1/32 clock phase",
>> so the unit of delay cell is clock phase. The value user need set in
>> DT just number to define how many delay cells needed.
>
> Then should the unit be "-degrees" and the possible range 0-180?
Thanks. We don't have it documented currently, but the unit seems
reasonable.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Michael Walle <michael@walle.cc>, Han Xu <han.xu@nxp.com>
Cc: Bough Chen <haibo.chen@nxp.com>,
ashish.kumar@nxp.com, yogeshgaur.83@gmail.com,
broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, singh.kuldeep87k@gmail.com,
tudor.ambarus@microchip.com, p.yadav@ti.com,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-mtd@lists.infradead.org, festevam@gmail.com,
dl-linux-imx <linux-imx@nxp.com>,
linux-arm-kernel@lists.infradead.org, zhengxunli@mxic.com.tw
Subject: Re: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly
Date: Tue, 5 Jul 2022 16:12:38 +0200 [thread overview]
Message-ID: <be521f90-97ce-c61d-d7d6-8f2bde24d824@linaro.org> (raw)
In-Reply-To: <62f113a0cdb0d58bf04ab0b274912eb7@walle.cc>
On 05/07/2022 16:06, Michael Walle wrote:
>
>>>
>>> I think you could use here clock cycles or clock phase, but then it
>>> has to be obvious
>>> it is that unit.
>>
>> Hi Krzysztof,
>>
>> Let me clarify it, in the document a term "delay cell" was used to
>> descript this register bit. Each delay cell equals "1/32 clock phase",
>> so the unit of delay cell is clock phase. The value user need set in
>> DT just number to define how many delay cells needed.
>
> Then should the unit be "-degrees" and the possible range 0-180?
Thanks. We don't have it documented currently, but the unit seems
reasonable.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-07-05 14:13 UTC|newest]
Thread overview: 99+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-05 9:11 [PATCH 01/11] spi: spi-nxp-fspi: enable runtime pm for fspi haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 02/11] spi: spi-nxp-fspi: change the default lut index haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 03/11] spi: spi-nxp-fspi: add DTR mode support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 04/11] spi: spi-nxp-fspi: add function to select sample clock source for flash reading haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-06 21:02 ` Michael Walle
2022-07-06 21:02 ` Michael Walle
2022-07-06 21:02 ` Michael Walle
2022-07-05 9:11 ` [PATCH 05/11] spi: spi-nxp-fspi: Add quirk to disable DTR support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 13:50 ` Michael Walle
2022-07-05 13:50 ` Michael Walle
2022-07-05 13:50 ` Michael Walle
2022-07-05 9:11 ` [PATCH 06/11] spi: spi-nxp-fspi: enable octal ddr for iMX8QM/QXP/DXL haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:48 ` Krzysztof Kozlowski
2022-07-05 9:48 ` Krzysztof Kozlowski
2022-07-05 9:48 ` Krzysztof Kozlowski
2022-07-05 10:28 ` Bough Chen
2022-07-05 10:28 ` Bough Chen
2022-07-05 10:28 ` Bough Chen
2022-07-05 10:36 ` Krzysztof Kozlowski
2022-07-05 10:36 ` Krzysztof Kozlowski
2022-07-05 10:36 ` Krzysztof Kozlowski
2022-07-05 13:19 ` Han Xu
2022-07-05 13:19 ` Han Xu
2022-07-05 13:19 ` Han Xu
2022-07-05 13:29 ` Krzysztof Kozlowski
2022-07-05 13:29 ` Krzysztof Kozlowski
2022-07-05 13:29 ` Krzysztof Kozlowski
2022-07-05 14:00 ` Han Xu
2022-07-05 14:00 ` Han Xu
2022-07-05 14:00 ` Han Xu
2022-07-05 14:03 ` Krzysztof Kozlowski
2022-07-05 14:03 ` Krzysztof Kozlowski
2022-07-05 14:03 ` Krzysztof Kozlowski
2022-07-05 14:31 ` Han Xu
2022-07-05 14:31 ` Han Xu
2022-07-05 14:31 ` Han Xu
2022-07-05 14:06 ` Michael Walle
2022-07-05 14:06 ` Michael Walle
2022-07-05 14:06 ` Michael Walle
2022-07-05 14:12 ` Krzysztof Kozlowski [this message]
2022-07-05 14:12 ` Krzysztof Kozlowski
2022-07-05 14:12 ` Krzysztof Kozlowski
2022-07-05 14:52 ` Han Xu
2022-07-05 14:52 ` Han Xu
2022-07-05 14:52 ` Han Xu
2022-07-05 14:58 ` Michael Walle
2022-07-05 14:58 ` Michael Walle
2022-07-05 14:58 ` Michael Walle
2022-07-05 15:07 ` Mark Brown
2022-07-05 15:07 ` Mark Brown
2022-07-05 15:07 ` Mark Brown
2022-07-05 15:38 ` Krzysztof Kozlowski
2022-07-05 15:38 ` Krzysztof Kozlowski
2022-07-05 15:38 ` Krzysztof Kozlowski
2022-07-05 15:50 ` Han Xu
2022-07-05 15:50 ` Han Xu
2022-07-05 15:50 ` Han Xu
2022-07-06 16:11 ` Rob Herring
2022-07-06 16:11 ` Rob Herring
2022-07-06 16:11 ` Rob Herring
2022-07-06 20:59 ` Michael Walle
2022-07-06 20:59 ` Michael Walle
2022-07-06 20:59 ` Michael Walle
2022-07-05 9:11 ` [PATCH 08/11] mtd: spi-nor: macronix: add support for Macronix octaflash haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 09/11] mtd: spi-nor: macronix: add mx25uw51345g OPI mode support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-18 6:57 ` Michael Walle
2022-07-18 6:57 ` Michael Walle
2022-07-18 6:57 ` Michael Walle
2022-07-05 9:11 ` [PATCH 10/11] arm64: dts: imx8ulp: add flexspi support haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` [PATCH 11/11] arm64: dts: imx8qm/imx8qxp: " haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 9:11 ` haibo.chen
2022-07-05 14:01 ` [PATCH 01/11] spi: spi-nxp-fspi: enable runtime pm for fspi Michael Walle
2022-07-05 14:01 ` Michael Walle
2022-07-05 14:01 ` Michael Walle
2022-07-05 23:06 ` Han Xu
2022-07-05 23:06 ` Han Xu
2022-07-05 23:06 ` Han Xu
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