RE: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly

From: Han Xu <han.xu@nxp.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Bough Chen <haibo.chen@nxp.com>,
	"ashish.kumar@nxp.com" <ashish.kumar@nxp.com>,
	"yogeshgaur.83@gmail.com" <yogeshgaur.83@gmail.com>,
	"broonie@kernel.org" <broonie@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>,
	"singh.kuldeep87k@gmail.com" <singh.kuldeep87k@gmail.com>,
	"tudor.ambarus@microchip.com" <tudor.ambarus@microchip.com>,
	"p.yadav@ti.com" <p.yadav@ti.com>,
	"michael@walle.cc" <michael@walle.cc>,
	"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
	"richard@nod.at" <richard@nod.at>,
	"vigneshr@ti.com" <vigneshr@ti.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>
Cc: "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
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	"festevam@gmail.com" <festevam@gmail.com>,
	dl-linux-imx <linux-imx@nxp.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"zhengxunli@mxic.com.tw" <zhengxunli@mxic.com.tw>
Subject: RE: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly
Date: Tue, 5 Jul 2022 14:00:37 +0000	[thread overview]
Message-ID: <DU2PR04MB877492F346BAA10B2AA7428497819@DU2PR04MB8774.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <f33ad190-f5c7-d9fa-088b-5538ab1f4d59@linaro.org>

>-----Original Message-----
>From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>Sent: Tuesday, July 5, 2022 8:29 AM
>To: Han Xu <han.xu@nxp.com>; Bough Chen <haibo.chen@nxp.com>;
>ashish.kumar@nxp.com; yogeshgaur.83@gmail.com; broonie@kernel.org;
>robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
>singh.kuldeep87k@gmail.com; tudor.ambarus@microchip.com; p.yadav@ti.com;
>michael@walle.cc; miquel.raynal@bootlin.com; richard@nod.at; vigneshr@ti.com;
>shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de
>Cc: linux-spi@vger.kernel.org; linux-kernel@vger.kernel.org;
>devicetree@vger.kernel.org; linux-mtd@lists.infradead.org; festevam@gmail.com;
>dl-linux-imx <linux-imx@nxp.com>; linux-arm-kernel@lists.infradead.org;
>zhengxunli@mxic.com.tw
>Subject: Re: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property
>nxp,fspi-dll-slvdly
>
>On 05/07/2022 15:19, Han Xu wrote:
>>>>>> +  nxp,fspi-dll-slvdly:
>>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>>>>> +    description: |
>>>>>> +      Specify the DLL slave line delay value.
>>>>>
>>>>> What are the units?
>>>>
>>>> Do you mean here need to give more detail explain about this properity?
>>>>
>>>> How about change like this?
>>>>    Specify the DLL slave line delay value. The delay target for slave delay line is:
>>> ((nxp,fspi-dll-slvdly+1) * 1/32 * clock cycle of reference clock (serial root clock).
>>>
>>> This would be good.
>>>
>>>> The range of this value is 0~16.
>>>
>>> This needs to go to schema instead as "maximum: 16".
>>>
>>> But still the question is - what are the units used in this "delay"? ms? us?
>>
>> HI Krzysztof,
>>
>> According to the formula, the range should be 0~15, 16 should do nothing or no
>delay.
>
>Sure, just add some constraint.
>
>>
>> The unit should be clock phase. In other words, the delay can be in range of
>1/32~1/2 clock cycle.
>
>So we probably misunderstood each other... looking at the driver it also explains
>the confusing. You encoded here register value which is pretty often wrong
>approach.
>
>This should be instead meaningful value for the user of the bindings, so usually
>using one of property units:
>https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com
>%2Fdevicetree-org%2Fdt-
>schema%2Fblob%2Fmain%2Fdtschema%2Fschemas%2Fproperty-
>units.yaml&amp;data=05%7C01%7Chan.xu%40nxp.com%7C0ffe3d706e064f14382
>108da5e8a5add%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6379262
>45564450475%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV
>2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;sdata=Q4
>SfVnBN%2BQ0vYKJzRf%2FXZkCA1WGyPV9doFcb%2BLSKx4w%3D&amp;reserved=0
>
>I think you could use here clock cycles or clock phase, but then it has to be obvious
>it is that unit.

Hi Krzysztof, 

Let me clarify it, in the document a term "delay cell" was used to descript this register bit. Each delay cell equals "1/32 clock phase", so the unit of delay cell is clock phase. The value user need set in DT just number to define how many delay cells needed.

>
>Best regards,
>Krzysztof

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