From: Andre Przywara <andre.przywara@arm.com> To: Marc Zyngier <marc.zyngier@arm.com>, Christoffer Dall <christoffer.dall@linaro.org> Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: [PATCH v3 21/55] KVM: arm/arm64: vgic-new: Add MMIO handling framework Date: Fri, 6 May 2016 11:45:34 +0100 [thread overview] Message-ID: <1462531568-9799-22-git-send-email-andre.przywara@arm.com> (raw) In-Reply-To: <1462531568-9799-1-git-send-email-andre.przywara@arm.com> From: Marc Zyngier <marc.zyngier@arm.com> Add an MMIO handling framework to the VGIC emulation: Each register is described by its offset, size (or number of bits per IRQ, if applicable) and the read/write handler functions. We provide initialization macros to describe each GIC register later easily. Separate dispatch functions for read and write accesses are connected to the kvm_io_bus framework and binary-search for the responsible register handler based on the offset address within the region. We convert the incoming data (referenced by a pointer) to the host's endianess and use pass-by-value to hand the data over to the actual handler functions. The register handler prototype and the endianess conversion are courtesy of Christoffer Dall. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- Changelog RFC..v1: - rework MMIO dispatching to use only one kvm_io_bus device - document purpose of register region macros - rename "this" parameter to "dev" - change IGROUPR to be RAO (returning 1 => Group1 IRQs) Changelog v1 .. v2: * MASSIVE rework: - store register_region pointer in kvm_io_bus linked struct - replace write_mask_xxx functions with extract_bytes() implementation - change handler functions' prototypes to take and return unsigned long - use binary search to find matching register handler - convert endianess of input data in dispatch_mmio_xxx functions - improve readability of register initializer macros - remove any GICv2/GICv3 specific functions from vgic-mmio.c - rename file from vgic_mmio.c to vgic-mmio.c Changelog v2 .. v3: - replace inclusion of vgic/vgic.h with arm_vgic.h include/kvm/vgic/vgic.h | 13 ++++ virt/kvm/arm/vgic/vgic-mmio.c | 171 ++++++++++++++++++++++++++++++++++++++++++ virt/kvm/arm/vgic/vgic-mmio.h | 77 +++++++++++++++++++ 3 files changed, 261 insertions(+) create mode 100644 virt/kvm/arm/vgic/vgic-mmio.c create mode 100644 virt/kvm/arm/vgic/vgic-mmio.h diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h index 2615205..4ec1270 100644 --- a/include/kvm/vgic/vgic.h +++ b/include/kvm/vgic/vgic.h @@ -106,6 +106,16 @@ struct vgic_irq { enum vgic_irq_config config; /* Level or edge */ }; +struct vgic_register_region; + +struct vgic_io_device { + gpa_t base_addr; + struct kvm_vcpu *redist_vcpu; + const struct vgic_register_region *regions; + int nr_regions; + struct kvm_io_device dev; +}; + struct vgic_dist { bool in_kernel; bool ready; @@ -132,6 +142,9 @@ struct vgic_dist { bool enabled; struct vgic_irq *spis; + + struct vgic_io_device dist_iodev; + struct vgic_io_device *redist_iodevs; }; struct vgic_v2_cpu_if { diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c new file mode 100644 index 0000000..f5628cb --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.c @@ -0,0 +1,171 @@ +/* + * VGIC MMIO handling functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/bitops.h> +#include <linux/bsearch.h> +#include <linux/kvm.h> +#include <linux/kvm_host.h> +#include <kvm/iodev.h> +#include <kvm/arm_vgic.h> + +#include "vgic.h" +#include "vgic-mmio.h" + +/* extract @num bytes at @offset bytes offset in data */ +unsigned long extract_bytes(unsigned long data, + unsigned int offset, unsigned int num) +{ + return (data >> (offset * 8)) & GENMASK_ULL(num * 8 - 1, 0); +} + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return 0; +} + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return -1UL; +} + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val) +{ + /* Ignore */ +} + +static int match_region(const void *key, const void *elt) +{ + const unsigned int offset = (unsigned long)key; + const struct vgic_register_region *region = elt; + + if (offset < region->reg_offset) + return -1; + + if (offset >= region->reg_offset + region->len) + return 1; + + return 0; +} + +/* Find the proper register handler entry given a certain address offset. */ +static const struct vgic_register_region * +vgic_find_mmio_region(const struct vgic_register_region *region, int nr_regions, + unsigned int offset) +{ + return bsearch((void *)(uintptr_t)offset, region, nr_regions, + sizeof(region[0]), match_region); +} + +/* + * kvm_mmio_read_buf() returns a value in a format where it can be converted + * to a byte array and be directly observed as the guest wanted it to appear + * in memory if it had done the store itself, which is LE for the GIC, as the + * guest knows the GIC is always LE. + * + * We convert this value to the CPUs native format to deal with it as a data + * value. + */ +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len) +{ + unsigned long data = kvm_mmio_read_buf(val, len); + + switch (len) { + case 1: + return data; + case 2: + return le16_to_cpu(data); + case 4: + return le32_to_cpu(data); + default: + return le64_to_cpu(data); + } +} + +/* + * kvm_mmio_write_buf() expects a value in a format such that if converted to + * a byte array it is observed as the guest would see it if it could perform + * the load directly. Since the GIC is LE, and the guest knows this, the + * guest expects a value in little endian format. + * + * We convert the data value from the CPUs native format to LE so that the + * value is returned in the proper format. + */ +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data) +{ + switch (len) { + case 1: + break; + case 2: + data = cpu_to_le16(data); + break; + case 4: + data = cpu_to_le32(data); + break; + default: + data = cpu_to_le64(data); + } + + kvm_mmio_write_buf(buf, len, data); +} + +static +struct vgic_io_device *kvm_to_vgic_iodev(const struct kvm_io_device *dev) +{ + return container_of(dev, struct vgic_io_device, dev); +} + +static int dispatch_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data; + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region) + return -EOPNOTSUPP; + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + data = region->read(r_vcpu, addr, len); + vgic_data_host_to_mmio_bus(val, len, data); + return 0; +} + +static int dispatch_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, const void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data = vgic_data_mmio_bus_to_host(val, len); + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region) + return -EOPNOTSUPP; + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + region->write(r_vcpu, addr, len, data); + return 0; +} + +struct kvm_io_device_ops kvm_io_gic_ops = { + .read = dispatch_mmio_read, + .write = dispatch_mmio_write, +}; diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h new file mode 100644 index 0000000..18d3869 --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.h @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2015, 2016 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __KVM_ARM_VGIC_MMIO_H__ +#define __KVM_ARM_VGIC_MMIO_H__ + +struct vgic_register_region { + unsigned int reg_offset; + unsigned int len; + unsigned int bits_per_irq; + unsigned long (*read)(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len); + void (*write)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, + unsigned long val); +}; + +extern struct kvm_io_device_ops kvm_io_gic_ops; + +/* + * Some VGIC registers store per-IRQ information, with a different number + * of bits per IRQ. For those registers this macro is used. + * The _WITH_LENGTH version instantiates registers with a fixed length + * and is mutually exclusive with the _PER_IRQ version. + */ +#define REGISTER_DESC_WITH_BITS_PER_IRQ(off, read_ops, write_ops, bpi) \ + { \ + .reg_offset = off, \ + .bits_per_irq = bpi, \ + .len = bpi * 1024 / 8, \ + .read = read_ops, \ + .write = write_ops, \ + } + +#define REGISTER_DESC_WITH_LENGTH(off, read_ops, write_ops, length) \ + { \ + .reg_offset = off, \ + .bits_per_irq = 0, \ + .len = length, \ + .read = read_ops, \ + .write = write_ops, \ + } + +int kvm_vgic_register_mmio_region(struct kvm *kvm, struct kvm_vcpu *vcpu, + struct vgic_register_region *reg_desc, + struct vgic_io_device *region, + int nr_irqs, bool offset_private); + +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len); + +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data); + +unsigned long extract_bytes(unsigned long data, + unsigned int offset, unsigned int num); + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val); + +#endif -- 2.7.3
WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 21/55] KVM: arm/arm64: vgic-new: Add MMIO handling framework Date: Fri, 6 May 2016 11:45:34 +0100 [thread overview] Message-ID: <1462531568-9799-22-git-send-email-andre.przywara@arm.com> (raw) In-Reply-To: <1462531568-9799-1-git-send-email-andre.przywara@arm.com> From: Marc Zyngier <marc.zyngier@arm.com> Add an MMIO handling framework to the VGIC emulation: Each register is described by its offset, size (or number of bits per IRQ, if applicable) and the read/write handler functions. We provide initialization macros to describe each GIC register later easily. Separate dispatch functions for read and write accesses are connected to the kvm_io_bus framework and binary-search for the responsible register handler based on the offset address within the region. We convert the incoming data (referenced by a pointer) to the host's endianess and use pass-by-value to hand the data over to the actual handler functions. The register handler prototype and the endianess conversion are courtesy of Christoffer Dall. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- Changelog RFC..v1: - rework MMIO dispatching to use only one kvm_io_bus device - document purpose of register region macros - rename "this" parameter to "dev" - change IGROUPR to be RAO (returning 1 => Group1 IRQs) Changelog v1 .. v2: * MASSIVE rework: - store register_region pointer in kvm_io_bus linked struct - replace write_mask_xxx functions with extract_bytes() implementation - change handler functions' prototypes to take and return unsigned long - use binary search to find matching register handler - convert endianess of input data in dispatch_mmio_xxx functions - improve readability of register initializer macros - remove any GICv2/GICv3 specific functions from vgic-mmio.c - rename file from vgic_mmio.c to vgic-mmio.c Changelog v2 .. v3: - replace inclusion of vgic/vgic.h with arm_vgic.h include/kvm/vgic/vgic.h | 13 ++++ virt/kvm/arm/vgic/vgic-mmio.c | 171 ++++++++++++++++++++++++++++++++++++++++++ virt/kvm/arm/vgic/vgic-mmio.h | 77 +++++++++++++++++++ 3 files changed, 261 insertions(+) create mode 100644 virt/kvm/arm/vgic/vgic-mmio.c create mode 100644 virt/kvm/arm/vgic/vgic-mmio.h diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h index 2615205..4ec1270 100644 --- a/include/kvm/vgic/vgic.h +++ b/include/kvm/vgic/vgic.h @@ -106,6 +106,16 @@ struct vgic_irq { enum vgic_irq_config config; /* Level or edge */ }; +struct vgic_register_region; + +struct vgic_io_device { + gpa_t base_addr; + struct kvm_vcpu *redist_vcpu; + const struct vgic_register_region *regions; + int nr_regions; + struct kvm_io_device dev; +}; + struct vgic_dist { bool in_kernel; bool ready; @@ -132,6 +142,9 @@ struct vgic_dist { bool enabled; struct vgic_irq *spis; + + struct vgic_io_device dist_iodev; + struct vgic_io_device *redist_iodevs; }; struct vgic_v2_cpu_if { diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c new file mode 100644 index 0000000..f5628cb --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.c @@ -0,0 +1,171 @@ +/* + * VGIC MMIO handling functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/bitops.h> +#include <linux/bsearch.h> +#include <linux/kvm.h> +#include <linux/kvm_host.h> +#include <kvm/iodev.h> +#include <kvm/arm_vgic.h> + +#include "vgic.h" +#include "vgic-mmio.h" + +/* extract @num bytes at @offset bytes offset in data */ +unsigned long extract_bytes(unsigned long data, + unsigned int offset, unsigned int num) +{ + return (data >> (offset * 8)) & GENMASK_ULL(num * 8 - 1, 0); +} + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return 0; +} + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len) +{ + return -1UL; +} + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val) +{ + /* Ignore */ +} + +static int match_region(const void *key, const void *elt) +{ + const unsigned int offset = (unsigned long)key; + const struct vgic_register_region *region = elt; + + if (offset < region->reg_offset) + return -1; + + if (offset >= region->reg_offset + region->len) + return 1; + + return 0; +} + +/* Find the proper register handler entry given a certain address offset. */ +static const struct vgic_register_region * +vgic_find_mmio_region(const struct vgic_register_region *region, int nr_regions, + unsigned int offset) +{ + return bsearch((void *)(uintptr_t)offset, region, nr_regions, + sizeof(region[0]), match_region); +} + +/* + * kvm_mmio_read_buf() returns a value in a format where it can be converted + * to a byte array and be directly observed as the guest wanted it to appear + * in memory if it had done the store itself, which is LE for the GIC, as the + * guest knows the GIC is always LE. + * + * We convert this value to the CPUs native format to deal with it as a data + * value. + */ +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len) +{ + unsigned long data = kvm_mmio_read_buf(val, len); + + switch (len) { + case 1: + return data; + case 2: + return le16_to_cpu(data); + case 4: + return le32_to_cpu(data); + default: + return le64_to_cpu(data); + } +} + +/* + * kvm_mmio_write_buf() expects a value in a format such that if converted to + * a byte array it is observed as the guest would see it if it could perform + * the load directly. Since the GIC is LE, and the guest knows this, the + * guest expects a value in little endian format. + * + * We convert the data value from the CPUs native format to LE so that the + * value is returned in the proper format. + */ +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data) +{ + switch (len) { + case 1: + break; + case 2: + data = cpu_to_le16(data); + break; + case 4: + data = cpu_to_le32(data); + break; + default: + data = cpu_to_le64(data); + } + + kvm_mmio_write_buf(buf, len, data); +} + +static +struct vgic_io_device *kvm_to_vgic_iodev(const struct kvm_io_device *dev) +{ + return container_of(dev, struct vgic_io_device, dev); +} + +static int dispatch_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data; + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region) + return -EOPNOTSUPP; + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + data = region->read(r_vcpu, addr, len); + vgic_data_host_to_mmio_bus(val, len, data); + return 0; +} + +static int dispatch_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, + gpa_t addr, int len, const void *val) +{ + struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev); + const struct vgic_register_region *region; + struct kvm_vcpu *r_vcpu; + unsigned long data = vgic_data_mmio_bus_to_host(val, len); + + region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions, + addr - iodev->base_addr); + if (!region) + return -EOPNOTSUPP; + + r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu; + region->write(r_vcpu, addr, len, data); + return 0; +} + +struct kvm_io_device_ops kvm_io_gic_ops = { + .read = dispatch_mmio_read, + .write = dispatch_mmio_write, +}; diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h new file mode 100644 index 0000000..18d3869 --- /dev/null +++ b/virt/kvm/arm/vgic/vgic-mmio.h @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2015, 2016 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __KVM_ARM_VGIC_MMIO_H__ +#define __KVM_ARM_VGIC_MMIO_H__ + +struct vgic_register_region { + unsigned int reg_offset; + unsigned int len; + unsigned int bits_per_irq; + unsigned long (*read)(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len); + void (*write)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, + unsigned long val); +}; + +extern struct kvm_io_device_ops kvm_io_gic_ops; + +/* + * Some VGIC registers store per-IRQ information, with a different number + * of bits per IRQ. For those registers this macro is used. + * The _WITH_LENGTH version instantiates registers with a fixed length + * and is mutually exclusive with the _PER_IRQ version. + */ +#define REGISTER_DESC_WITH_BITS_PER_IRQ(off, read_ops, write_ops, bpi) \ + { \ + .reg_offset = off, \ + .bits_per_irq = bpi, \ + .len = bpi * 1024 / 8, \ + .read = read_ops, \ + .write = write_ops, \ + } + +#define REGISTER_DESC_WITH_LENGTH(off, read_ops, write_ops, length) \ + { \ + .reg_offset = off, \ + .bits_per_irq = 0, \ + .len = length, \ + .read = read_ops, \ + .write = write_ops, \ + } + +int kvm_vgic_register_mmio_region(struct kvm *kvm, struct kvm_vcpu *vcpu, + struct vgic_register_region *reg_desc, + struct vgic_io_device *region, + int nr_irqs, bool offset_private); + +unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len); + +void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, + unsigned long data); + +unsigned long extract_bytes(unsigned long data, + unsigned int offset, unsigned int num); + +unsigned long vgic_mmio_read_raz(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu, + gpa_t addr, unsigned int len); + +void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val); + +#endif -- 2.7.3
next prev parent reply other threads:[~2016-05-06 10:45 UTC|newest] Thread overview: 400+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-06 10:45 [PATCH v3 00/55] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 01/55] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 02/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 03/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 04/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 05/55] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 06/55] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 8:33 ` Eric Auger 2016-05-10 8:33 ` Eric Auger 2016-05-06 10:45 ` [PATCH v3 07/55] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 08/55] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-18 10:43 ` Andre Przywara 2016-05-18 10:43 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 09/55] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 8:57 ` Marc Zyngier 2016-05-10 8:57 ` Marc Zyngier 2016-05-18 11:02 ` Andre Przywara 2016-05-18 11:02 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 10/55] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 8:59 ` Marc Zyngier 2016-05-10 8:59 ` Marc Zyngier 2016-05-18 14:18 ` Andre Przywara 2016-05-18 14:18 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 11/55] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:00 ` Marc Zyngier 2016-05-10 9:00 ` Marc Zyngier 2016-05-10 9:52 ` Eric Auger 2016-05-10 9:52 ` Eric Auger 2016-05-10 10:04 ` Marc Zyngier 2016-05-10 10:04 ` Marc Zyngier 2016-05-10 14:35 ` [PATCH v3a] " Andre Przywara 2016-05-10 14:35 ` Andre Przywara 2016-05-10 14:58 ` Andrew Jones 2016-05-10 14:58 ` Andrew Jones 2016-05-11 13:52 ` Andre Przywara 2016-05-11 13:52 ` Andre Przywara 2016-05-10 15:22 ` Marc Zyngier 2016-05-10 15:22 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 12/55] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:02 ` Marc Zyngier 2016-05-10 9:02 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 13/55] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:05 ` Marc Zyngier 2016-05-10 9:05 ` Marc Zyngier 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:17 ` Marc Zyngier 2016-05-12 12:17 ` Marc Zyngier 2016-05-12 12:23 ` Christoffer Dall 2016-05-12 12:23 ` Christoffer Dall 2016-05-12 13:25 ` Andre Przywara 2016-05-12 13:25 ` Andre Przywara 2016-05-12 13:48 ` Christoffer Dall 2016-05-12 13:48 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 14/55] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:22 ` Marc Zyngier 2016-05-10 9:22 ` Marc Zyngier 2016-05-11 9:20 ` Andre Przywara 2016-05-11 9:20 ` Andre Przywara 2016-05-10 9:35 ` Eric Auger 2016-05-10 9:35 ` Eric Auger 2016-05-06 10:45 ` [PATCH v3 15/55] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:25 ` Eric Auger 2016-05-10 9:25 ` Eric Auger 2016-05-10 9:39 ` Marc Zyngier 2016-05-10 9:39 ` Marc Zyngier 2016-05-10 12:08 ` Christoffer Dall 2016-05-10 12:08 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 16/55] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:29 ` Eric Auger 2016-05-10 9:29 ` Eric Auger 2016-05-10 9:48 ` Marc Zyngier 2016-05-10 9:48 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 17/55] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 13:11 ` Christoffer Dall 2016-05-10 13:11 ` Christoffer Dall 2016-05-10 13:53 ` Eric Auger 2016-05-10 13:53 ` Eric Auger 2016-05-10 15:20 ` Eric Auger 2016-05-10 15:20 ` Eric Auger 2016-05-10 17:32 ` Marc Zyngier 2016-05-10 17:32 ` Marc Zyngier 2016-05-12 11:46 ` Christoffer Dall 2016-05-12 11:46 ` Christoffer Dall 2016-05-12 15:08 ` Andre Przywara 2016-05-12 15:08 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 18/55] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 13:30 ` Christoffer Dall 2016-05-10 13:30 ` Christoffer Dall 2016-05-10 13:42 ` Marc Zyngier 2016-05-10 13:42 ` Marc Zyngier 2016-05-10 13:49 ` Eric Auger 2016-05-10 13:49 ` Eric Auger 2016-05-10 14:11 ` Christoffer Dall 2016-05-10 14:11 ` Christoffer Dall 2016-05-10 14:35 ` Marc Zyngier 2016-05-10 14:35 ` Marc Zyngier 2016-05-10 14:45 ` Marc Zyngier 2016-05-10 14:45 ` Marc Zyngier 2016-05-11 9:38 ` Christoffer Dall 2016-05-11 9:38 ` Christoffer Dall 2016-05-10 14:10 ` Eric Auger 2016-05-10 14:10 ` Eric Auger 2016-05-11 11:30 ` Andre Przywara 2016-05-11 11:30 ` Andre Przywara 2016-05-11 11:38 ` Eric Auger 2016-05-11 11:38 ` Eric Auger 2016-05-11 13:09 ` Andre Przywara 2016-05-11 13:09 ` Andre Przywara 2016-05-11 12:26 ` Christoffer Dall 2016-05-11 12:26 ` Christoffer Dall 2016-05-11 13:13 ` Andre Przywara 2016-05-11 13:13 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 19/55] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 19:07 ` Tom Hanson 2016-05-06 19:07 ` Tom Hanson 2016-05-10 14:04 ` Christoffer Dall 2016-05-10 14:04 ` Christoffer Dall 2016-05-10 14:15 ` Peter Maydell 2016-05-10 14:15 ` Peter Maydell 2016-05-10 14:22 ` Marc Zyngier 2016-05-10 14:22 ` Marc Zyngier 2016-05-11 9:39 ` Christoffer Dall 2016-05-11 9:39 ` Christoffer Dall 2016-05-10 15:28 ` Eric Auger 2016-05-10 15:28 ` Eric Auger 2016-05-10 17:35 ` Marc Zyngier 2016-05-10 17:35 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 20/55] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 10:22 ` Marc Zyngier 2016-05-10 10:22 ` Marc Zyngier 2016-05-10 14:18 ` Christoffer Dall 2016-05-10 14:18 ` Christoffer Dall 2016-05-06 10:45 ` Andre Przywara [this message] 2016-05-06 10:45 ` [PATCH v3 21/55] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara 2016-05-11 9:46 ` Christoffer Dall 2016-05-11 9:46 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 22/55] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-11 9:50 ` Christoffer Dall 2016-05-11 9:50 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 23/55] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-11 12:05 ` Christoffer Dall 2016-05-11 12:05 ` Christoffer Dall 2016-05-11 12:47 ` Andre Przywara 2016-05-11 12:47 ` Andre Przywara 2016-05-11 12:51 ` Marc Zyngier 2016-05-11 12:51 ` Marc Zyngier 2016-05-11 13:15 ` Christoffer Dall 2016-05-11 13:15 ` Christoffer Dall 2016-05-11 13:27 ` Marc Zyngier 2016-05-11 13:27 ` Marc Zyngier 2016-05-11 13:36 ` Andre Przywara 2016-05-11 13:36 ` Andre Przywara 2016-05-11 14:40 ` Marc Zyngier 2016-05-11 14:40 ` Marc Zyngier 2016-05-11 13:38 ` Christoffer Dall 2016-05-11 13:38 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 24/55] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 10:28 ` Marc Zyngier 2016-05-10 10:28 ` Marc Zyngier 2016-05-11 12:34 ` Christoffer Dall 2016-05-11 12:34 ` Christoffer Dall 2016-05-11 13:04 ` Andre Przywara 2016-05-11 13:04 ` Andre Przywara 2016-05-11 13:14 ` Christoffer Dall 2016-05-11 13:14 ` Christoffer Dall 2016-05-11 13:24 ` Andre Przywara 2016-05-11 13:24 ` Andre Przywara 2016-05-11 13:41 ` Christoffer Dall 2016-05-11 13:41 ` Christoffer Dall 2016-05-11 13:16 ` Christoffer Dall 2016-05-11 13:16 ` Christoffer Dall 2016-05-11 13:13 ` Marc Zyngier 2016-05-11 13:13 ` Marc Zyngier 2016-05-11 13:39 ` Andre Przywara 2016-05-11 13:39 ` Andre Przywara 2016-05-11 14:26 ` Marc Zyngier 2016-05-11 14:26 ` Marc Zyngier 2016-05-11 13:47 ` Christoffer Dall 2016-05-11 13:47 ` Christoffer Dall 2016-05-11 14:18 ` Andre Przywara 2016-05-11 14:18 ` Andre Przywara 2016-05-11 14:28 ` Andre Przywara 2016-05-11 14:28 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 25/55] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 10:49 ` Marc Zyngier 2016-05-10 10:49 ` Marc Zyngier 2016-05-11 13:11 ` Christoffer Dall 2016-05-11 13:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 26/55] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 12:09 ` Christoffer Dall 2016-05-10 12:09 ` Christoffer Dall 2016-05-10 12:14 ` Marc Zyngier 2016-05-10 12:14 ` Marc Zyngier 2016-05-10 13:04 ` Andre Przywara 2016-05-10 13:04 ` Andre Przywara 2016-05-10 13:12 ` Christoffer Dall 2016-05-10 13:12 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 27/55] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-11 13:37 ` Christoffer Dall 2016-05-11 13:37 ` Christoffer Dall 2016-05-12 9:10 ` Marc Zyngier 2016-05-12 9:10 ` Marc Zyngier 2016-05-12 9:56 ` Peter Maydell 2016-05-12 9:56 ` Peter Maydell 2016-05-12 10:09 ` Marc Zyngier 2016-05-12 10:09 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 28/55] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 8:32 ` Christoffer Dall 2016-05-12 8:32 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 29/55] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 8:35 ` Christoffer Dall 2016-05-12 8:35 ` Christoffer Dall 2016-05-12 8:39 ` Marc Zyngier 2016-05-12 8:39 ` Marc Zyngier 2016-05-12 8:54 ` Christoffer Dall 2016-05-12 8:54 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 30/55] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 8:40 ` Christoffer Dall 2016-05-12 8:40 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 31/55] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 9:09 ` Christoffer Dall 2016-05-12 9:09 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 32/55] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-09 17:18 ` Marc Zyngier 2016-05-09 17:18 ` Marc Zyngier 2016-05-09 17:51 ` Chalamarla, Tirumalesh 2016-05-09 17:51 ` Chalamarla, Tirumalesh 2016-05-10 10:58 ` [PATCH] KVM: arm/arm64: vgic-new: fix overlap check for device addresses Andre Przywara 2016-05-10 10:58 ` Andre Przywara 2016-05-10 13:16 ` Marc Zyngier 2016-05-10 13:16 ` Marc Zyngier 2016-05-10 17:18 ` [PATCH v2] " Andre Przywara 2016-05-10 17:18 ` Andre Przywara 2016-05-12 19:43 ` Christoffer Dall 2016-05-12 19:43 ` Christoffer Dall 2016-05-12 10:26 ` [PATCH v3 32/55] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Christoffer Dall 2016-05-12 10:26 ` Christoffer Dall 2016-05-12 10:52 ` Andre Przywara 2016-05-12 10:52 ` Andre Przywara 2016-05-12 10:58 ` Marc Zyngier 2016-05-12 10:58 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 33/55] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 11:47 ` Christoffer Dall 2016-05-12 11:47 ` Christoffer Dall 2016-05-12 12:33 ` Andre Przywara 2016-05-12 12:33 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 34/55] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 11:59 ` Christoffer Dall 2016-05-12 11:59 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 35/55] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:37 ` Andre Przywara 2016-05-12 12:37 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 36/55] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 12:21 ` Christoffer Dall 2016-05-12 12:21 ` Christoffer Dall 2016-05-12 12:37 ` Marc Zyngier 2016-05-12 12:37 ` Marc Zyngier 2016-05-12 13:41 ` Christoffer Dall 2016-05-12 13:41 ` Christoffer Dall 2016-05-12 14:00 ` Andre Przywara 2016-05-12 14:00 ` Andre Przywara 2016-05-12 14:20 ` Marc Zyngier 2016-05-12 14:20 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 37/55] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 12:40 ` Christoffer Dall 2016-05-12 12:40 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 38/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:11 ` Christoffer Dall 2016-05-13 10:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 39/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:11 ` Christoffer Dall 2016-05-13 10:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 40/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:11 ` Christoffer Dall 2016-05-13 10:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 41/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:12 ` Christoffer Dall 2016-05-13 10:12 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 42/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:12 ` Christoffer Dall 2016-05-13 10:12 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 43/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 18:30 ` Christoffer Dall 2016-05-12 18:30 ` Christoffer Dall 2016-05-13 12:24 ` Andre Przywara 2016-05-13 12:24 ` Andre Przywara 2016-05-13 12:29 ` Christoffer Dall 2016-05-13 12:29 ` Christoffer Dall 2016-05-13 12:30 ` Marc Zyngier 2016-05-13 12:30 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 44/55] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 45/55] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 18:41 ` Christoffer Dall 2016-05-12 18:41 ` Christoffer Dall 2016-05-12 19:10 ` Andre Przywara 2016-05-12 19:10 ` Andre Przywara 2016-05-13 7:51 ` Christoffer Dall 2016-05-13 7:51 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 46/55] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 18:43 ` Christoffer Dall 2016-05-12 18:43 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 47/55] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-09 17:27 ` Marc Zyngier 2016-05-09 17:27 ` Marc Zyngier 2016-05-11 8:24 ` Andre Przywara 2016-05-11 8:24 ` Andre Przywara 2016-05-12 18:47 ` Christoffer Dall 2016-05-12 18:47 ` Christoffer Dall 2016-05-12 18:52 ` Andre Przywara 2016-05-12 18:52 ` Andre Przywara 2016-05-13 7:53 ` Christoffer Dall 2016-05-13 7:53 ` Christoffer Dall 2016-05-13 10:44 ` Andre Przywara 2016-05-13 10:44 ` Andre Przywara 2016-05-13 11:54 ` Christoffer Dall 2016-05-13 11:54 ` Christoffer Dall 2016-05-13 12:23 ` Andre Przywara 2016-05-13 12:23 ` Andre Przywara 2016-05-13 12:32 ` Christoffer Dall 2016-05-13 12:32 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 48/55] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:00 ` Christoffer Dall 2016-05-12 19:00 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 49/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:08 ` Christoffer Dall 2016-05-12 19:08 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 50/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:25 ` Christoffer Dall 2016-05-12 19:25 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 51/55] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:28 ` Christoffer Dall 2016-05-12 19:28 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 52/55] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:30 ` Christoffer Dall 2016-05-12 19:30 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 53/55] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:33 ` Christoffer Dall 2016-05-12 19:33 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 54/55] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:36 ` Christoffer Dall 2016-05-12 19:36 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 55/55] KVM: arm/arm64: vgic-new: enable build Andre Przywara 2016-05-06 10:46 ` Andre Przywara
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