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From: Andre Przywara <andre.przywara@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Christoffer Dall <christoffer.dall@linaro.org>
Cc: Eric Auger <eric.auger@linaro.org>,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 50/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init
Date: Fri,  6 May 2016 11:46:03 +0100	[thread overview]
Message-ID: <1462531568-9799-51-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1462531568-9799-1-git-send-email-andre.przywara@arm.com>

From: Eric Auger <eric.auger@linaro.org>

This patch allocates and initializes the data structures used
to model the vgic distributor and virtual cpu interfaces. At that
stage the number of IRQs and number of virtual CPUs is frozen.

The following early_init functions are kept since they are called from
arm.c. However they may disappear in subsequent patches since
they are void.

vgic_[v2|v3]_enable still is stubbed at this stage.

Signed-off-by: Eric Auger <eric.auger@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Changelog RFC..v1:
- initialize v2/v3 default CPU affinities explicitly

Changelog v1 .. v2:
- move lazy_init() into vgic_update_irq_pending()

 include/kvm/vgic/vgic.h       |   7 +-
 virt/kvm/arm/vgic/vgic-init.c | 213 ++++++++++++++++++++++++++++++++++++++++++
 virt/kvm/arm/vgic/vgic-v2.c   |   5 +
 virt/kvm/arm/vgic/vgic-v3.c   |   5 +
 virt/kvm/arm/vgic/vgic.c      |   4 +
 virt/kvm/arm/vgic/vgic.h      |   8 ++
 6 files changed, 241 insertions(+), 1 deletion(-)

diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h
index 899b7b7..538078a 100644
--- a/include/kvm/vgic/vgic.h
+++ b/include/kvm/vgic/vgic.h
@@ -119,6 +119,7 @@ struct vgic_io_device {
 struct vgic_dist {
 	bool			in_kernel;
 	bool			ready;
+	bool			initialized;
 
 	/* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
 	u32			vgic_model;
@@ -202,7 +203,11 @@ struct vgic_cpu {
 };
 
 int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
+void kvm_vgic_early_init(struct kvm *kvm);
 int kvm_vgic_create(struct kvm *kvm, u32 type);
+void kvm_vgic_destroy(struct kvm *kvm);
+void kvm_vgic_vcpu_early_init(struct kvm_vcpu *vcpu);
+void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu);
 int kvm_vgic_hyp_init(void);
 
 int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
@@ -211,7 +216,7 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
 int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
 
 #define irqchip_in_kernel(k)	(!!((k)->arch.vgic.in_kernel))
-#define vgic_initialized(k)	(false)
+#define vgic_initialized(k)	((k)->arch.vgic.initialized)
 #define vgic_ready(k)		((k)->arch.vgic.ready)
 #define vgic_valid_spi(k, i)	(((i) >= VGIC_NR_PRIVATE_IRQS) && \
 			((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))
diff --git a/virt/kvm/arm/vgic/vgic-init.c b/virt/kvm/arm/vgic/vgic-init.c
index a150363..3f9c137 100644
--- a/virt/kvm/arm/vgic/vgic-init.c
+++ b/virt/kvm/arm/vgic/vgic-init.c
@@ -24,6 +24,42 @@
 #include <asm/kvm_mmu.h>
 #include "vgic.h"
 
+/*
+ * Initialization rules: there are multiple stages to the vgic
+ * initialization, both for the distributor and the CPU interfaces.
+ *
+ * Distributor:
+ *
+ * - kvm_vgic_early_init(): initialization of static data that doesn't
+ *   depend on any sizing information or emulation type. No allocation
+ *   is allowed there.
+ *
+ * - vgic_init(): allocation and initialization of the generic data
+ *   structures that depend on sizing information (number of CPUs,
+ *   number of interrupts). Also initializes the vcpu specific data
+ *   structures. Can be executed lazily for GICv2.
+ *
+ * CPU Interface:
+ *
+ * - kvm_vgic_cpu_early_init(): initialization of static data that
+ *   doesn't depend on any sizing information or emulation type. No
+ *   allocation is allowed there.
+ */
+
+/* EARLY INIT */
+
+/*
+ * Those 2 functions should not be needed anymore but they
+ * still are called from arm.c
+ */
+void kvm_vgic_early_init(struct kvm *kvm)
+{
+}
+
+void kvm_vgic_vcpu_early_init(struct kvm_vcpu *vcpu)
+{
+}
+
 /* CREATION */
 
 /**
@@ -108,6 +144,183 @@ out:
 	return ret;
 }
 
+/* INIT/DESTROY */
+
+/**
+ * kvm_vgic_dist_init: initialize the dist data structures
+ * @kvm: kvm struct pointer
+ * @nr_spis: number of spis, frozen by caller
+ */
+int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
+{
+	struct vgic_dist *dist = &kvm->arch.vgic;
+	struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, 0);
+	int i;
+
+	dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL);
+	if (!dist->spis)
+		return  -ENOMEM;
+
+	/*
+	 * In following code we do not take the irq struct lock since
+	 * no other action on irq structs can happen while the VGIC is
+	 * not initialized yet:
+	 * injection requires (VGICV3) or does (VGIC2) initialization.
+	 * MMIO access triggers init.
+	 */
+	for (i = 0; i < nr_spis; i++) {
+		struct vgic_irq *irq = &dist->spis[i];
+
+		irq->intid = i + VGIC_NR_PRIVATE_IRQS;
+		INIT_LIST_HEAD(&irq->ap_list);
+		spin_lock_init(&irq->irq_lock);
+		irq->vcpu = NULL;
+		irq->target_vcpu = vcpu0;
+		if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2)
+			irq->targets = 0;
+		else
+			irq->mpidr = 0;
+	}
+	return 0;
+}
+
+/**
+ * kvm_vgic_vcpu_init: initialize the vcpu data structures and
+ * enable the VCPU interface
+ * @kvm: kvm struct pointer
+ */
+void kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
+{
+	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+	int i;
+
+	INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
+	spin_lock_init(&vgic_cpu->ap_list_lock);
+
+	/*
+	 * Enable and configure all SGIs to be edge-triggered and
+	 * configure all PPIs as level-triggered.
+	 */
+	for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
+		struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
+
+		INIT_LIST_HEAD(&irq->ap_list);
+		spin_lock_init(&irq->irq_lock);
+		irq->intid = i;
+		irq->vcpu = NULL;
+		irq->target_vcpu = vcpu;
+		irq->targets = 1U << vcpu->vcpu_id;
+		if (vgic_irq_is_sgi(i)) {
+			/* SGIs */
+			irq->enabled = 1;
+			irq->config = VGIC_CONFIG_EDGE;
+		} else {
+			/* PPIs */
+			irq->config = VGIC_CONFIG_LEVEL;
+		}
+	}
+	if (kvm_vgic_global_state.type == VGIC_V2)
+		vgic_v2_enable(vcpu);
+	else
+		vgic_v3_enable(vcpu);
+}
+
+/*
+ * vgic_init: allocates and initializes dist and vcpu data structures
+ * depending on two dimensioning parameters:
+ * - the number of spis
+ * - the number of vcpus
+ * The function is generally called when nr_spis has been explicitly set
+ * by the guest through the KVM DEVICE API. If not nr_spis is set to 256.
+ * Completion can be tested by vgic_initialized
+ * Must be called with kvm->lock held!
+ */
+int vgic_init(struct kvm *kvm)
+{
+	struct vgic_dist *dist = &kvm->arch.vgic;
+	struct kvm_vcpu *vcpu;
+	int ret = 0, i;
+
+	if (vgic_initialized(kvm))
+		return 0;
+
+	/* freeze the number of spis */
+	if (!dist->nr_spis)
+		dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS;
+
+	ret = kvm_vgic_dist_init(kvm, dist->nr_spis);
+	if (ret)
+		goto out;
+
+	kvm_for_each_vcpu(i, vcpu, kvm)
+		kvm_vgic_vcpu_init(vcpu);
+
+	dist->initialized = true;
+out:
+	return ret;
+}
+
+static void kvm_vgic_dist_destroy(struct kvm *kvm)
+{
+	struct vgic_dist *dist = &kvm->arch.vgic;
+
+	mutex_lock(&kvm->lock);
+
+	dist->ready = false;
+	dist->initialized = false;
+
+	kfree(dist->spis);
+	kfree(dist->redist_iodevs);
+	dist->nr_spis = 0;
+
+	mutex_unlock(&kvm->lock);
+}
+
+void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
+{
+	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+
+	INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
+}
+
+void kvm_vgic_destroy(struct kvm *kvm)
+{
+	struct kvm_vcpu *vcpu;
+	int i;
+
+	kvm_vgic_dist_destroy(kvm);
+
+	kvm_for_each_vcpu(i, vcpu, kvm)
+		kvm_vgic_vcpu_destroy(vcpu);
+}
+
+/**
+ * Lazy init only is allowed if the GIC exposed to the guest is a GICV2.
+ * GICV3 must be explicitly initialized by the guest using the
+ * KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group
+ */
+int vgic_lazy_init(struct kvm *kvm)
+{
+	int ret = 0;
+
+	if (unlikely(!vgic_initialized(kvm))) {
+		/*
+		 * We only provide the automatic initialization of the VGIC
+		 * for the legacy case of a GICv2. Any other type must
+		 * be explicitly initialized once setup with the respective
+		 * KVM device call.
+		 */
+		if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2)
+			return -EBUSY;
+
+		mutex_lock(&kvm->lock);
+		ret = vgic_init(kvm);
+		mutex_unlock(&kvm->lock);
+	}
+
+	return ret;
+}
+
 /* GENERIC PROBE */
 
 static void vgic_init_maintenance_interrupt(void *info)
diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c
index 91b69a4..48aa877 100644
--- a/virt/kvm/arm/vgic/vgic-v2.c
+++ b/virt/kvm/arm/vgic/vgic-v2.c
@@ -211,6 +211,11 @@ void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
 			GICH_VMCR_PRIMASK_SHIFT;
 }
 
+/* not yet implemented */
+void vgic_v2_enable(struct kvm_vcpu *vcpu)
+{
+}
+
 /**
  * vgic_v2_probe - probe for a GICv2 compatible interrupt controller in DT
  * @node:	pointer to the DT node
diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
index 48b0bb7..7cab5b9 100644
--- a/virt/kvm/arm/vgic/vgic-v3.c
+++ b/virt/kvm/arm/vgic/vgic-v3.c
@@ -195,6 +195,11 @@ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
 	vmcrp->pmr  = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
 }
 
+/* not yet implemented */
+void vgic_v3_enable(struct kvm_vcpu *vcpu)
+{
+}
+
 /**
  * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT
  * @node:	pointer to the DT node
diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
index 5355de6..068389a 100644
--- a/virt/kvm/arm/vgic/vgic.c
+++ b/virt/kvm/arm/vgic/vgic.c
@@ -255,6 +255,10 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid,
 
 	trace_vgic_update_irq_pending(cpuid, intid, level);
 
+	ret = vgic_lazy_init(kvm);
+	if (ret)
+		return ret;
+
 	vcpu = kvm_get_vcpu(kvm, cpuid);
 	if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS)
 		return -EINVAL;
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
index e49b1df..cad04eb 100644
--- a/virt/kvm/arm/vgic/vgic.h
+++ b/virt/kvm/arm/vgic/vgic.h
@@ -43,6 +43,7 @@ int vgic_v2_cpuif_uaccess(struct kvm_vcpu *vcpu, bool is_write,
 			  int offset, u32 *val);
 void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
 void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
+void vgic_v2_enable(struct kvm_vcpu *vcpu);
 int vgic_v2_probe(struct device_node *vgic_node);
 int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
 			     enum vgic_type);
@@ -55,6 +56,7 @@ void vgic_v3_clear_lr(struct kvm_vcpu *vcpu, int lr);
 void vgic_v3_set_underflow(struct kvm_vcpu *vcpu);
 void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
 void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
+void vgic_v3_enable(struct kvm_vcpu *vcpu);
 int vgic_v3_probe(struct device_node *vgic_node);
 int vgic_register_redist_iodevs(struct kvm *kvm, gpa_t dist_base_address);
 #else
@@ -89,6 +91,10 @@ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
 {
 }
 
+static inline void vgic_v3_enable(struct kvm_vcpu *vcpu)
+{
+}
+
 static inline int vgic_v3_probe(struct device_node *vgic_node)
 {
 	return -ENODEV;
@@ -102,5 +108,7 @@ static inline int vgic_register_redist_iodevs(struct kvm *kvm,
 #endif
 
 void kvm_register_vgic_device(unsigned long type);
+int vgic_lazy_init(struct kvm *kvm);
+int vgic_init(struct kvm *kvm);
 
 #endif
-- 
2.7.3


WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 50/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init
Date: Fri,  6 May 2016 11:46:03 +0100	[thread overview]
Message-ID: <1462531568-9799-51-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1462531568-9799-1-git-send-email-andre.przywara@arm.com>

From: Eric Auger <eric.auger@linaro.org>

This patch allocates and initializes the data structures used
to model the vgic distributor and virtual cpu interfaces. At that
stage the number of IRQs and number of virtual CPUs is frozen.

The following early_init functions are kept since they are called from
arm.c. However they may disappear in subsequent patches since
they are void.

vgic_[v2|v3]_enable still is stubbed at this stage.

Signed-off-by: Eric Auger <eric.auger@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Changelog RFC..v1:
- initialize v2/v3 default CPU affinities explicitly

Changelog v1 .. v2:
- move lazy_init() into vgic_update_irq_pending()

 include/kvm/vgic/vgic.h       |   7 +-
 virt/kvm/arm/vgic/vgic-init.c | 213 ++++++++++++++++++++++++++++++++++++++++++
 virt/kvm/arm/vgic/vgic-v2.c   |   5 +
 virt/kvm/arm/vgic/vgic-v3.c   |   5 +
 virt/kvm/arm/vgic/vgic.c      |   4 +
 virt/kvm/arm/vgic/vgic.h      |   8 ++
 6 files changed, 241 insertions(+), 1 deletion(-)

diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h
index 899b7b7..538078a 100644
--- a/include/kvm/vgic/vgic.h
+++ b/include/kvm/vgic/vgic.h
@@ -119,6 +119,7 @@ struct vgic_io_device {
 struct vgic_dist {
 	bool			in_kernel;
 	bool			ready;
+	bool			initialized;
 
 	/* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
 	u32			vgic_model;
@@ -202,7 +203,11 @@ struct vgic_cpu {
 };
 
 int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
+void kvm_vgic_early_init(struct kvm *kvm);
 int kvm_vgic_create(struct kvm *kvm, u32 type);
+void kvm_vgic_destroy(struct kvm *kvm);
+void kvm_vgic_vcpu_early_init(struct kvm_vcpu *vcpu);
+void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu);
 int kvm_vgic_hyp_init(void);
 
 int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
@@ -211,7 +216,7 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
 int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
 
 #define irqchip_in_kernel(k)	(!!((k)->arch.vgic.in_kernel))
-#define vgic_initialized(k)	(false)
+#define vgic_initialized(k)	((k)->arch.vgic.initialized)
 #define vgic_ready(k)		((k)->arch.vgic.ready)
 #define vgic_valid_spi(k, i)	(((i) >= VGIC_NR_PRIVATE_IRQS) && \
 			((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))
diff --git a/virt/kvm/arm/vgic/vgic-init.c b/virt/kvm/arm/vgic/vgic-init.c
index a150363..3f9c137 100644
--- a/virt/kvm/arm/vgic/vgic-init.c
+++ b/virt/kvm/arm/vgic/vgic-init.c
@@ -24,6 +24,42 @@
 #include <asm/kvm_mmu.h>
 #include "vgic.h"
 
+/*
+ * Initialization rules: there are multiple stages to the vgic
+ * initialization, both for the distributor and the CPU interfaces.
+ *
+ * Distributor:
+ *
+ * - kvm_vgic_early_init(): initialization of static data that doesn't
+ *   depend on any sizing information or emulation type. No allocation
+ *   is allowed there.
+ *
+ * - vgic_init(): allocation and initialization of the generic data
+ *   structures that depend on sizing information (number of CPUs,
+ *   number of interrupts). Also initializes the vcpu specific data
+ *   structures. Can be executed lazily for GICv2.
+ *
+ * CPU Interface:
+ *
+ * - kvm_vgic_cpu_early_init(): initialization of static data that
+ *   doesn't depend on any sizing information or emulation type. No
+ *   allocation is allowed there.
+ */
+
+/* EARLY INIT */
+
+/*
+ * Those 2 functions should not be needed anymore but they
+ * still are called from arm.c
+ */
+void kvm_vgic_early_init(struct kvm *kvm)
+{
+}
+
+void kvm_vgic_vcpu_early_init(struct kvm_vcpu *vcpu)
+{
+}
+
 /* CREATION */
 
 /**
@@ -108,6 +144,183 @@ out:
 	return ret;
 }
 
+/* INIT/DESTROY */
+
+/**
+ * kvm_vgic_dist_init: initialize the dist data structures
+ * @kvm: kvm struct pointer
+ * @nr_spis: number of spis, frozen by caller
+ */
+int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
+{
+	struct vgic_dist *dist = &kvm->arch.vgic;
+	struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, 0);
+	int i;
+
+	dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL);
+	if (!dist->spis)
+		return  -ENOMEM;
+
+	/*
+	 * In following code we do not take the irq struct lock since
+	 * no other action on irq structs can happen while the VGIC is
+	 * not initialized yet:
+	 * injection requires (VGICV3) or does (VGIC2) initialization.
+	 * MMIO access triggers init.
+	 */
+	for (i = 0; i < nr_spis; i++) {
+		struct vgic_irq *irq = &dist->spis[i];
+
+		irq->intid = i + VGIC_NR_PRIVATE_IRQS;
+		INIT_LIST_HEAD(&irq->ap_list);
+		spin_lock_init(&irq->irq_lock);
+		irq->vcpu = NULL;
+		irq->target_vcpu = vcpu0;
+		if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2)
+			irq->targets = 0;
+		else
+			irq->mpidr = 0;
+	}
+	return 0;
+}
+
+/**
+ * kvm_vgic_vcpu_init: initialize the vcpu data structures and
+ * enable the VCPU interface
+ * @kvm: kvm struct pointer
+ */
+void kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
+{
+	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+	int i;
+
+	INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
+	spin_lock_init(&vgic_cpu->ap_list_lock);
+
+	/*
+	 * Enable and configure all SGIs to be edge-triggered and
+	 * configure all PPIs as level-triggered.
+	 */
+	for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
+		struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
+
+		INIT_LIST_HEAD(&irq->ap_list);
+		spin_lock_init(&irq->irq_lock);
+		irq->intid = i;
+		irq->vcpu = NULL;
+		irq->target_vcpu = vcpu;
+		irq->targets = 1U << vcpu->vcpu_id;
+		if (vgic_irq_is_sgi(i)) {
+			/* SGIs */
+			irq->enabled = 1;
+			irq->config = VGIC_CONFIG_EDGE;
+		} else {
+			/* PPIs */
+			irq->config = VGIC_CONFIG_LEVEL;
+		}
+	}
+	if (kvm_vgic_global_state.type == VGIC_V2)
+		vgic_v2_enable(vcpu);
+	else
+		vgic_v3_enable(vcpu);
+}
+
+/*
+ * vgic_init: allocates and initializes dist and vcpu data structures
+ * depending on two dimensioning parameters:
+ * - the number of spis
+ * - the number of vcpus
+ * The function is generally called when nr_spis has been explicitly set
+ * by the guest through the KVM DEVICE API. If not nr_spis is set to 256.
+ * Completion can be tested by vgic_initialized
+ * Must be called with kvm->lock held!
+ */
+int vgic_init(struct kvm *kvm)
+{
+	struct vgic_dist *dist = &kvm->arch.vgic;
+	struct kvm_vcpu *vcpu;
+	int ret = 0, i;
+
+	if (vgic_initialized(kvm))
+		return 0;
+
+	/* freeze the number of spis */
+	if (!dist->nr_spis)
+		dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS;
+
+	ret = kvm_vgic_dist_init(kvm, dist->nr_spis);
+	if (ret)
+		goto out;
+
+	kvm_for_each_vcpu(i, vcpu, kvm)
+		kvm_vgic_vcpu_init(vcpu);
+
+	dist->initialized = true;
+out:
+	return ret;
+}
+
+static void kvm_vgic_dist_destroy(struct kvm *kvm)
+{
+	struct vgic_dist *dist = &kvm->arch.vgic;
+
+	mutex_lock(&kvm->lock);
+
+	dist->ready = false;
+	dist->initialized = false;
+
+	kfree(dist->spis);
+	kfree(dist->redist_iodevs);
+	dist->nr_spis = 0;
+
+	mutex_unlock(&kvm->lock);
+}
+
+void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
+{
+	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+
+	INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
+}
+
+void kvm_vgic_destroy(struct kvm *kvm)
+{
+	struct kvm_vcpu *vcpu;
+	int i;
+
+	kvm_vgic_dist_destroy(kvm);
+
+	kvm_for_each_vcpu(i, vcpu, kvm)
+		kvm_vgic_vcpu_destroy(vcpu);
+}
+
+/**
+ * Lazy init only is allowed if the GIC exposed to the guest is a GICV2.
+ * GICV3 must be explicitly initialized by the guest using the
+ * KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group
+ */
+int vgic_lazy_init(struct kvm *kvm)
+{
+	int ret = 0;
+
+	if (unlikely(!vgic_initialized(kvm))) {
+		/*
+		 * We only provide the automatic initialization of the VGIC
+		 * for the legacy case of a GICv2. Any other type must
+		 * be explicitly initialized once setup with the respective
+		 * KVM device call.
+		 */
+		if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2)
+			return -EBUSY;
+
+		mutex_lock(&kvm->lock);
+		ret = vgic_init(kvm);
+		mutex_unlock(&kvm->lock);
+	}
+
+	return ret;
+}
+
 /* GENERIC PROBE */
 
 static void vgic_init_maintenance_interrupt(void *info)
diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c
index 91b69a4..48aa877 100644
--- a/virt/kvm/arm/vgic/vgic-v2.c
+++ b/virt/kvm/arm/vgic/vgic-v2.c
@@ -211,6 +211,11 @@ void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
 			GICH_VMCR_PRIMASK_SHIFT;
 }
 
+/* not yet implemented */
+void vgic_v2_enable(struct kvm_vcpu *vcpu)
+{
+}
+
 /**
  * vgic_v2_probe - probe for a GICv2 compatible interrupt controller in DT
  * @node:	pointer to the DT node
diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
index 48b0bb7..7cab5b9 100644
--- a/virt/kvm/arm/vgic/vgic-v3.c
+++ b/virt/kvm/arm/vgic/vgic-v3.c
@@ -195,6 +195,11 @@ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
 	vmcrp->pmr  = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
 }
 
+/* not yet implemented */
+void vgic_v3_enable(struct kvm_vcpu *vcpu)
+{
+}
+
 /**
  * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT
  * @node:	pointer to the DT node
diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
index 5355de6..068389a 100644
--- a/virt/kvm/arm/vgic/vgic.c
+++ b/virt/kvm/arm/vgic/vgic.c
@@ -255,6 +255,10 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid,
 
 	trace_vgic_update_irq_pending(cpuid, intid, level);
 
+	ret = vgic_lazy_init(kvm);
+	if (ret)
+		return ret;
+
 	vcpu = kvm_get_vcpu(kvm, cpuid);
 	if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS)
 		return -EINVAL;
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
index e49b1df..cad04eb 100644
--- a/virt/kvm/arm/vgic/vgic.h
+++ b/virt/kvm/arm/vgic/vgic.h
@@ -43,6 +43,7 @@ int vgic_v2_cpuif_uaccess(struct kvm_vcpu *vcpu, bool is_write,
 			  int offset, u32 *val);
 void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
 void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
+void vgic_v2_enable(struct kvm_vcpu *vcpu);
 int vgic_v2_probe(struct device_node *vgic_node);
 int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
 			     enum vgic_type);
@@ -55,6 +56,7 @@ void vgic_v3_clear_lr(struct kvm_vcpu *vcpu, int lr);
 void vgic_v3_set_underflow(struct kvm_vcpu *vcpu);
 void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
 void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
+void vgic_v3_enable(struct kvm_vcpu *vcpu);
 int vgic_v3_probe(struct device_node *vgic_node);
 int vgic_register_redist_iodevs(struct kvm *kvm, gpa_t dist_base_address);
 #else
@@ -89,6 +91,10 @@ void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
 {
 }
 
+static inline void vgic_v3_enable(struct kvm_vcpu *vcpu)
+{
+}
+
 static inline int vgic_v3_probe(struct device_node *vgic_node)
 {
 	return -ENODEV;
@@ -102,5 +108,7 @@ static inline int vgic_register_redist_iodevs(struct kvm *kvm,
 #endif
 
 void kvm_register_vgic_device(unsigned long type);
+int vgic_lazy_init(struct kvm *kvm);
+int vgic_init(struct kvm *kvm);
 
 #endif
-- 
2.7.3

  parent reply	other threads:[~2016-05-06 10:46 UTC|newest]

Thread overview: 400+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-06 10:45 [PATCH v3 00/55] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-05-06 10:45 ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 01/55] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 02/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 03/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 04/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 05/55] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 06/55] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  8:33   ` Eric Auger
2016-05-10  8:33     ` Eric Auger
2016-05-06 10:45 ` [PATCH v3 07/55] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 08/55] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-18 10:43   ` Andre Przywara
2016-05-18 10:43     ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 09/55] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  8:57   ` Marc Zyngier
2016-05-10  8:57     ` Marc Zyngier
2016-05-18 11:02   ` Andre Przywara
2016-05-18 11:02     ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 10/55] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  8:59   ` Marc Zyngier
2016-05-10  8:59     ` Marc Zyngier
2016-05-18 14:18   ` Andre Przywara
2016-05-18 14:18     ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 11/55] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  9:00   ` Marc Zyngier
2016-05-10  9:00     ` Marc Zyngier
2016-05-10  9:52   ` Eric Auger
2016-05-10  9:52     ` Eric Auger
2016-05-10 10:04     ` Marc Zyngier
2016-05-10 10:04       ` Marc Zyngier
2016-05-10 14:35     ` [PATCH v3a] " Andre Przywara
2016-05-10 14:35       ` Andre Przywara
2016-05-10 14:58       ` Andrew Jones
2016-05-10 14:58         ` Andrew Jones
2016-05-11 13:52         ` Andre Przywara
2016-05-11 13:52           ` Andre Przywara
2016-05-10 15:22       ` Marc Zyngier
2016-05-10 15:22         ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 12/55] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  9:02   ` Marc Zyngier
2016-05-10  9:02     ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 13/55] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  9:05   ` Marc Zyngier
2016-05-10  9:05     ` Marc Zyngier
2016-05-12 12:12   ` Christoffer Dall
2016-05-12 12:12     ` Christoffer Dall
2016-05-12 12:17     ` Marc Zyngier
2016-05-12 12:17       ` Marc Zyngier
2016-05-12 12:23       ` Christoffer Dall
2016-05-12 12:23         ` Christoffer Dall
2016-05-12 13:25     ` Andre Przywara
2016-05-12 13:25       ` Andre Przywara
2016-05-12 13:48       ` Christoffer Dall
2016-05-12 13:48         ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 14/55] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  9:22   ` Marc Zyngier
2016-05-10  9:22     ` Marc Zyngier
2016-05-11  9:20     ` Andre Przywara
2016-05-11  9:20       ` Andre Przywara
2016-05-10  9:35   ` Eric Auger
2016-05-10  9:35     ` Eric Auger
2016-05-06 10:45 ` [PATCH v3 15/55] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  9:25   ` Eric Auger
2016-05-10  9:25     ` Eric Auger
2016-05-10  9:39   ` Marc Zyngier
2016-05-10  9:39     ` Marc Zyngier
2016-05-10 12:08   ` Christoffer Dall
2016-05-10 12:08     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 16/55] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10  9:29   ` Eric Auger
2016-05-10  9:29     ` Eric Auger
2016-05-10  9:48   ` Marc Zyngier
2016-05-10  9:48     ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 17/55] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10 13:11   ` Christoffer Dall
2016-05-10 13:11     ` Christoffer Dall
2016-05-10 13:53   ` Eric Auger
2016-05-10 13:53     ` Eric Auger
2016-05-10 15:20   ` Eric Auger
2016-05-10 15:20     ` Eric Auger
2016-05-10 17:32     ` Marc Zyngier
2016-05-10 17:32       ` Marc Zyngier
2016-05-12 11:46   ` Christoffer Dall
2016-05-12 11:46     ` Christoffer Dall
2016-05-12 15:08     ` Andre Przywara
2016-05-12 15:08       ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 18/55] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10 13:30   ` Christoffer Dall
2016-05-10 13:30     ` Christoffer Dall
2016-05-10 13:42     ` Marc Zyngier
2016-05-10 13:42       ` Marc Zyngier
2016-05-10 13:49       ` Eric Auger
2016-05-10 13:49         ` Eric Auger
2016-05-10 14:11       ` Christoffer Dall
2016-05-10 14:11         ` Christoffer Dall
2016-05-10 14:35         ` Marc Zyngier
2016-05-10 14:35           ` Marc Zyngier
2016-05-10 14:45           ` Marc Zyngier
2016-05-10 14:45             ` Marc Zyngier
2016-05-11  9:38             ` Christoffer Dall
2016-05-11  9:38               ` Christoffer Dall
2016-05-10 14:10   ` Eric Auger
2016-05-10 14:10     ` Eric Auger
2016-05-11 11:30     ` Andre Przywara
2016-05-11 11:30       ` Andre Przywara
2016-05-11 11:38       ` Eric Auger
2016-05-11 11:38         ` Eric Auger
2016-05-11 13:09         ` Andre Przywara
2016-05-11 13:09           ` Andre Przywara
2016-05-11 12:26       ` Christoffer Dall
2016-05-11 12:26         ` Christoffer Dall
2016-05-11 13:13         ` Andre Przywara
2016-05-11 13:13           ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 19/55] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 19:07   ` Tom Hanson
2016-05-06 19:07     ` Tom Hanson
2016-05-10 14:04   ` Christoffer Dall
2016-05-10 14:04     ` Christoffer Dall
2016-05-10 14:15     ` Peter Maydell
2016-05-10 14:15       ` Peter Maydell
2016-05-10 14:22       ` Marc Zyngier
2016-05-10 14:22         ` Marc Zyngier
2016-05-11  9:39       ` Christoffer Dall
2016-05-11  9:39         ` Christoffer Dall
2016-05-10 15:28   ` Eric Auger
2016-05-10 15:28     ` Eric Auger
2016-05-10 17:35     ` Marc Zyngier
2016-05-10 17:35       ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 20/55] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10 10:22   ` Marc Zyngier
2016-05-10 10:22     ` Marc Zyngier
2016-05-10 14:18   ` Christoffer Dall
2016-05-10 14:18     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 21/55] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-11  9:46   ` Christoffer Dall
2016-05-11  9:46     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 22/55] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-11  9:50   ` Christoffer Dall
2016-05-11  9:50     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 23/55] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-11 12:05   ` Christoffer Dall
2016-05-11 12:05     ` Christoffer Dall
2016-05-11 12:47     ` Andre Przywara
2016-05-11 12:47       ` Andre Przywara
2016-05-11 12:51     ` Marc Zyngier
2016-05-11 12:51       ` Marc Zyngier
2016-05-11 13:15       ` Christoffer Dall
2016-05-11 13:15         ` Christoffer Dall
2016-05-11 13:27         ` Marc Zyngier
2016-05-11 13:27           ` Marc Zyngier
2016-05-11 13:36           ` Andre Przywara
2016-05-11 13:36             ` Andre Przywara
2016-05-11 14:40             ` Marc Zyngier
2016-05-11 14:40               ` Marc Zyngier
2016-05-11 13:38           ` Christoffer Dall
2016-05-11 13:38             ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 24/55] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10 10:28   ` Marc Zyngier
2016-05-10 10:28     ` Marc Zyngier
2016-05-11 12:34   ` Christoffer Dall
2016-05-11 12:34     ` Christoffer Dall
2016-05-11 13:04     ` Andre Przywara
2016-05-11 13:04       ` Andre Przywara
2016-05-11 13:14       ` Christoffer Dall
2016-05-11 13:14         ` Christoffer Dall
2016-05-11 13:24         ` Andre Przywara
2016-05-11 13:24           ` Andre Przywara
2016-05-11 13:41           ` Christoffer Dall
2016-05-11 13:41             ` Christoffer Dall
2016-05-11 13:16       ` Christoffer Dall
2016-05-11 13:16         ` Christoffer Dall
2016-05-11 13:13     ` Marc Zyngier
2016-05-11 13:13       ` Marc Zyngier
2016-05-11 13:39       ` Andre Przywara
2016-05-11 13:39         ` Andre Przywara
2016-05-11 14:26         ` Marc Zyngier
2016-05-11 14:26           ` Marc Zyngier
2016-05-11 13:47       ` Christoffer Dall
2016-05-11 13:47         ` Christoffer Dall
2016-05-11 14:18       ` Andre Przywara
2016-05-11 14:18         ` Andre Przywara
2016-05-11 14:28         ` Andre Przywara
2016-05-11 14:28           ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 25/55] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10 10:49   ` Marc Zyngier
2016-05-10 10:49     ` Marc Zyngier
2016-05-11 13:11   ` Christoffer Dall
2016-05-11 13:11     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 26/55] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-10 12:09   ` Christoffer Dall
2016-05-10 12:09     ` Christoffer Dall
2016-05-10 12:14   ` Marc Zyngier
2016-05-10 12:14     ` Marc Zyngier
2016-05-10 13:04     ` Andre Przywara
2016-05-10 13:04       ` Andre Przywara
2016-05-10 13:12       ` Christoffer Dall
2016-05-10 13:12         ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 27/55] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-11 13:37   ` Christoffer Dall
2016-05-11 13:37     ` Christoffer Dall
2016-05-12  9:10   ` Marc Zyngier
2016-05-12  9:10     ` Marc Zyngier
2016-05-12  9:56     ` Peter Maydell
2016-05-12  9:56       ` Peter Maydell
2016-05-12 10:09       ` Marc Zyngier
2016-05-12 10:09         ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 28/55] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12  8:32   ` Christoffer Dall
2016-05-12  8:32     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 29/55] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12  8:35   ` Christoffer Dall
2016-05-12  8:35     ` Christoffer Dall
2016-05-12  8:39     ` Marc Zyngier
2016-05-12  8:39       ` Marc Zyngier
2016-05-12  8:54     ` Christoffer Dall
2016-05-12  8:54       ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 30/55] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12  8:40   ` Christoffer Dall
2016-05-12  8:40     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 31/55] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12  9:09   ` Christoffer Dall
2016-05-12  9:09     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 32/55] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-09 17:18   ` Marc Zyngier
2016-05-09 17:18     ` Marc Zyngier
2016-05-09 17:51     ` Chalamarla, Tirumalesh
2016-05-09 17:51       ` Chalamarla, Tirumalesh
2016-05-10 10:58     ` [PATCH] KVM: arm/arm64: vgic-new: fix overlap check for device addresses Andre Przywara
2016-05-10 10:58       ` Andre Przywara
2016-05-10 13:16       ` Marc Zyngier
2016-05-10 13:16         ` Marc Zyngier
2016-05-10 17:18         ` [PATCH v2] " Andre Przywara
2016-05-10 17:18           ` Andre Przywara
2016-05-12 19:43           ` Christoffer Dall
2016-05-12 19:43             ` Christoffer Dall
2016-05-12 10:26   ` [PATCH v3 32/55] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Christoffer Dall
2016-05-12 10:26     ` Christoffer Dall
2016-05-12 10:52     ` Andre Przywara
2016-05-12 10:52       ` Andre Przywara
2016-05-12 10:58       ` Marc Zyngier
2016-05-12 10:58         ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 33/55] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 11:47   ` Christoffer Dall
2016-05-12 11:47     ` Christoffer Dall
2016-05-12 12:33     ` Andre Przywara
2016-05-12 12:33       ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 34/55] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 11:59   ` Christoffer Dall
2016-05-12 11:59     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 35/55] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 12:12   ` Christoffer Dall
2016-05-12 12:12     ` Christoffer Dall
2016-05-12 12:37     ` Andre Przywara
2016-05-12 12:37       ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 36/55] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 12:21   ` Christoffer Dall
2016-05-12 12:21     ` Christoffer Dall
2016-05-12 12:37     ` Marc Zyngier
2016-05-12 12:37       ` Marc Zyngier
2016-05-12 13:41       ` Christoffer Dall
2016-05-12 13:41         ` Christoffer Dall
2016-05-12 14:00       ` Andre Przywara
2016-05-12 14:00         ` Andre Przywara
2016-05-12 14:20         ` Marc Zyngier
2016-05-12 14:20           ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 37/55] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 12:40   ` Christoffer Dall
2016-05-12 12:40     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 38/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-13 10:11   ` Christoffer Dall
2016-05-13 10:11     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 39/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-13 10:11   ` Christoffer Dall
2016-05-13 10:11     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 40/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-13 10:11   ` Christoffer Dall
2016-05-13 10:11     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 41/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-13 10:12   ` Christoffer Dall
2016-05-13 10:12     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 42/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-13 10:12   ` Christoffer Dall
2016-05-13 10:12     ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 43/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 18:30   ` Christoffer Dall
2016-05-12 18:30     ` Christoffer Dall
2016-05-13 12:24     ` Andre Przywara
2016-05-13 12:24       ` Andre Przywara
2016-05-13 12:29       ` Christoffer Dall
2016-05-13 12:29         ` Christoffer Dall
2016-05-13 12:30       ` Marc Zyngier
2016-05-13 12:30         ` Marc Zyngier
2016-05-06 10:45 ` [PATCH v3 44/55] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-06 10:45 ` [PATCH v3 45/55] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 18:41   ` Christoffer Dall
2016-05-12 18:41     ` Christoffer Dall
2016-05-12 19:10     ` Andre Przywara
2016-05-12 19:10       ` Andre Przywara
2016-05-13  7:51       ` Christoffer Dall
2016-05-13  7:51         ` Christoffer Dall
2016-05-06 10:45 ` [PATCH v3 46/55] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-05-06 10:45   ` Andre Przywara
2016-05-12 18:43   ` Christoffer Dall
2016-05-12 18:43     ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 47/55] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-05-06 10:46   ` Andre Przywara
2016-05-09 17:27   ` Marc Zyngier
2016-05-09 17:27     ` Marc Zyngier
2016-05-11  8:24     ` Andre Przywara
2016-05-11  8:24       ` Andre Przywara
2016-05-12 18:47   ` Christoffer Dall
2016-05-12 18:47     ` Christoffer Dall
2016-05-12 18:52     ` Andre Przywara
2016-05-12 18:52       ` Andre Przywara
2016-05-13  7:53       ` Christoffer Dall
2016-05-13  7:53         ` Christoffer Dall
2016-05-13 10:44         ` Andre Przywara
2016-05-13 10:44           ` Andre Przywara
2016-05-13 11:54           ` Christoffer Dall
2016-05-13 11:54             ` Christoffer Dall
2016-05-13 12:23             ` Andre Przywara
2016-05-13 12:23               ` Andre Przywara
2016-05-13 12:32               ` Christoffer Dall
2016-05-13 12:32                 ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 48/55] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-05-06 10:46   ` Andre Przywara
2016-05-12 19:00   ` Christoffer Dall
2016-05-12 19:00     ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 49/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-05-06 10:46   ` Andre Przywara
2016-05-12 19:08   ` Christoffer Dall
2016-05-12 19:08     ` Christoffer Dall
2016-05-06 10:46 ` Andre Przywara [this message]
2016-05-06 10:46   ` [PATCH v3 50/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-05-12 19:25   ` Christoffer Dall
2016-05-12 19:25     ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 51/55] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-05-06 10:46   ` Andre Przywara
2016-05-12 19:28   ` Christoffer Dall
2016-05-12 19:28     ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 52/55] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-05-06 10:46   ` Andre Przywara
2016-05-12 19:30   ` Christoffer Dall
2016-05-12 19:30     ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 53/55] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara
2016-05-06 10:46   ` Andre Przywara
2016-05-12 19:33   ` Christoffer Dall
2016-05-12 19:33     ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 54/55] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-05-06 10:46   ` Andre Przywara
2016-05-12 19:36   ` Christoffer Dall
2016-05-12 19:36     ` Christoffer Dall
2016-05-06 10:46 ` [PATCH v3 55/55] KVM: arm/arm64: vgic-new: enable build Andre Przywara
2016-05-06 10:46   ` Andre Przywara

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