From: Andre Przywara <andre.przywara@arm.com> To: Christoffer Dall <christoffer.dall@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com>, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: Re: [PATCH v3 23/55] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Date: Wed, 11 May 2016 13:47:16 +0100 [thread overview] Message-ID: <573329D4.5030508@arm.com> (raw) In-Reply-To: <20160511120533.GM27623@cbox> Hej, On 11/05/16 13:05, Christoffer Dall wrote: > On Fri, May 06, 2016 at 11:45:36AM +0100, Andre Przywara wrote: >> From: Marc Zyngier <marc.zyngier@arm.com> >> >> Those three registers are v2 emulation specific, so their implementation >> lives entirely in vgic-mmio-v2.c. Also they are handled in one function, >> as their implementation is pretty simple. >> When the guest enables the distributor, we kick all VCPUs to get >> potentially pending interrupts serviced. >> >> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> >> Signed-off-by: Andre Przywara <andre.przywara@arm.com> >> --- >> Changelog RFC..v1: >> - kick VCPUs is the distributor gets enabled >> - improve comment >> >> Changelog v1 .. v2: >> - adapt to new MMIO framework >> - use switch() statements to improve readability >> >> Changelog v2 .. v3: >> - add vgic_kick_vcpus() implementation >> >> include/linux/irqchip/arm-gic.h | 1 + >> virt/kvm/arm/vgic/vgic-mmio-v2.c | 48 +++++++++++++++++++++++++++++++++++++++- >> virt/kvm/arm/vgic/vgic.c | 15 +++++++++++++ >> virt/kvm/arm/vgic/vgic.h | 4 ++++ >> 4 files changed, 67 insertions(+), 1 deletion(-) >> >> diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h >> index be0d26f..fd05185 100644 >> --- a/include/linux/irqchip/arm-gic.h >> +++ b/include/linux/irqchip/arm-gic.h >> @@ -33,6 +33,7 @@ >> >> #define GIC_DIST_CTRL 0x000 >> #define GIC_DIST_CTR 0x004 >> +#define GIC_DIST_IIDR 0x008 >> #define GIC_DIST_IGROUP 0x080 >> #define GIC_DIST_ENABLE_SET 0x100 >> #define GIC_DIST_ENABLE_CLEAR 0x180 >> diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c >> index 2729a22..69e96f7 100644 >> --- a/virt/kvm/arm/vgic/vgic-mmio-v2.c >> +++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c >> @@ -20,9 +20,55 @@ >> #include "vgic.h" >> #include "vgic-mmio.h" >> >> +static unsigned long vgic_mmio_read_v2_misc(struct kvm_vcpu *vcpu, >> + gpa_t addr, unsigned int len) >> +{ >> + u32 value; >> + >> + switch (addr & 0x0c) { >> + case GIC_DIST_CTRL: >> + value = vcpu->kvm->arch.vgic.enabled ? GICD_ENABLE : 0; >> + break; >> + case GIC_DIST_CTR: >> + value = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; >> + value = (value >> 5) - 1; >> + value |= (atomic_read(&vcpu->kvm->online_vcpus) - 1) << 5; >> + break; >> + case GIC_DIST_IIDR: >> + value = (PRODUCT_ID_KVM << 24) | (IMPLEMENTER_ARM << 0); >> + break; >> + default: >> + return 0; >> + } >> + >> + return extract_bytes(value, addr & 3, len); >> +} >> + >> +static void vgic_mmio_write_v2_misc(struct kvm_vcpu *vcpu, >> + gpa_t addr, unsigned int len, >> + unsigned long val) >> +{ >> + switch (addr & 0x0c) { >> + case GIC_DIST_CTRL: >> + if (!(addr & 1)) { > > what is this !(addr & 1) check? Mmmh, interesting. The original idea was that we care only about the lowest significant byte. I guess this was somehow lost in translation when Marc reworked the function. I think it should at least read: "if (!(addr & 3))" to match the switch mask, otherwise for instance a byte write to address 2 triggers the if branch as well. I will fix the mask to 3 and add a comment. Thanks, Andre. > >> + struct vgic_dist *dist = &vcpu->kvm->arch.vgic; >> + bool was_enabled = dist->enabled; >> + >> + dist->enabled = val & GICD_ENABLE; >> + if (!was_enabled && dist->enabled) >> + vgic_kick_vcpus(vcpu->kvm); >> + } >> + break; >> + case GIC_DIST_CTR: >> + case GIC_DIST_IIDR: >> + /* Nothing to do */ >> + return; >> + } >> +} >> + >> static const struct vgic_register_region vgic_v2_dist_registers[] = { >> REGISTER_DESC_WITH_LENGTH(GIC_DIST_CTRL, >> - vgic_mmio_read_raz, vgic_mmio_write_wi, 12), >> + vgic_mmio_read_v2_misc, vgic_mmio_write_v2_misc, 12), >> REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_IGROUP, >> vgic_mmio_read_rao, vgic_mmio_write_wi, 1), >> REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_SET, >> diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c >> index c3dbcf3..5355de6 100644 >> --- a/virt/kvm/arm/vgic/vgic.c >> +++ b/virt/kvm/arm/vgic/vgic.c >> @@ -544,3 +544,18 @@ int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu) >> >> return pending; >> } >> + >> +void vgic_kick_vcpus(struct kvm *kvm) >> +{ >> + struct kvm_vcpu *vcpu; >> + int c; >> + >> + /* >> + * We've injected an interrupt, time to find out who deserves >> + * a good kick... >> + */ >> + kvm_for_each_vcpu(c, vcpu, kvm) { >> + if (kvm_vgic_vcpu_pending_irq(vcpu)) >> + kvm_vcpu_kick(vcpu); >> + } >> +} >> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h >> index fd9acaa..cf62015 100644 >> --- a/virt/kvm/arm/vgic/vgic.h >> +++ b/virt/kvm/arm/vgic/vgic.h >> @@ -16,11 +16,15 @@ >> #ifndef __KVM_ARM_VGIC_NEW_H__ >> #define __KVM_ARM_VGIC_NEW_H__ >> >> +#define PRODUCT_ID_KVM 0x4b /* ASCII code K */ >> +#define IMPLEMENTER_ARM 0x43b >> + >> #define vgic_irq_is_sgi(intid) ((intid) < VGIC_NR_SGIS) >> >> struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, >> u32 intid); >> bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq); >> +void vgic_kick_vcpus(struct kvm *kvm); >> >> void vgic_v2_process_maintenance(struct kvm_vcpu *vcpu); >> void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu); >> -- >> 2.7.3 >> >> -- >> To unsubscribe from this list: send the line "unsubscribe kvm" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >
WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 23/55] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Date: Wed, 11 May 2016 13:47:16 +0100 [thread overview] Message-ID: <573329D4.5030508@arm.com> (raw) In-Reply-To: <20160511120533.GM27623@cbox> Hej, On 11/05/16 13:05, Christoffer Dall wrote: > On Fri, May 06, 2016 at 11:45:36AM +0100, Andre Przywara wrote: >> From: Marc Zyngier <marc.zyngier@arm.com> >> >> Those three registers are v2 emulation specific, so their implementation >> lives entirely in vgic-mmio-v2.c. Also they are handled in one function, >> as their implementation is pretty simple. >> When the guest enables the distributor, we kick all VCPUs to get >> potentially pending interrupts serviced. >> >> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> >> Signed-off-by: Andre Przywara <andre.przywara@arm.com> >> --- >> Changelog RFC..v1: >> - kick VCPUs is the distributor gets enabled >> - improve comment >> >> Changelog v1 .. v2: >> - adapt to new MMIO framework >> - use switch() statements to improve readability >> >> Changelog v2 .. v3: >> - add vgic_kick_vcpus() implementation >> >> include/linux/irqchip/arm-gic.h | 1 + >> virt/kvm/arm/vgic/vgic-mmio-v2.c | 48 +++++++++++++++++++++++++++++++++++++++- >> virt/kvm/arm/vgic/vgic.c | 15 +++++++++++++ >> virt/kvm/arm/vgic/vgic.h | 4 ++++ >> 4 files changed, 67 insertions(+), 1 deletion(-) >> >> diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h >> index be0d26f..fd05185 100644 >> --- a/include/linux/irqchip/arm-gic.h >> +++ b/include/linux/irqchip/arm-gic.h >> @@ -33,6 +33,7 @@ >> >> #define GIC_DIST_CTRL 0x000 >> #define GIC_DIST_CTR 0x004 >> +#define GIC_DIST_IIDR 0x008 >> #define GIC_DIST_IGROUP 0x080 >> #define GIC_DIST_ENABLE_SET 0x100 >> #define GIC_DIST_ENABLE_CLEAR 0x180 >> diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c >> index 2729a22..69e96f7 100644 >> --- a/virt/kvm/arm/vgic/vgic-mmio-v2.c >> +++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c >> @@ -20,9 +20,55 @@ >> #include "vgic.h" >> #include "vgic-mmio.h" >> >> +static unsigned long vgic_mmio_read_v2_misc(struct kvm_vcpu *vcpu, >> + gpa_t addr, unsigned int len) >> +{ >> + u32 value; >> + >> + switch (addr & 0x0c) { >> + case GIC_DIST_CTRL: >> + value = vcpu->kvm->arch.vgic.enabled ? GICD_ENABLE : 0; >> + break; >> + case GIC_DIST_CTR: >> + value = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; >> + value = (value >> 5) - 1; >> + value |= (atomic_read(&vcpu->kvm->online_vcpus) - 1) << 5; >> + break; >> + case GIC_DIST_IIDR: >> + value = (PRODUCT_ID_KVM << 24) | (IMPLEMENTER_ARM << 0); >> + break; >> + default: >> + return 0; >> + } >> + >> + return extract_bytes(value, addr & 3, len); >> +} >> + >> +static void vgic_mmio_write_v2_misc(struct kvm_vcpu *vcpu, >> + gpa_t addr, unsigned int len, >> + unsigned long val) >> +{ >> + switch (addr & 0x0c) { >> + case GIC_DIST_CTRL: >> + if (!(addr & 1)) { > > what is this !(addr & 1) check? Mmmh, interesting. The original idea was that we care only about the lowest significant byte. I guess this was somehow lost in translation when Marc reworked the function. I think it should at least read: "if (!(addr & 3))" to match the switch mask, otherwise for instance a byte write to address 2 triggers the if branch as well. I will fix the mask to 3 and add a comment. Thanks, Andre. > >> + struct vgic_dist *dist = &vcpu->kvm->arch.vgic; >> + bool was_enabled = dist->enabled; >> + >> + dist->enabled = val & GICD_ENABLE; >> + if (!was_enabled && dist->enabled) >> + vgic_kick_vcpus(vcpu->kvm); >> + } >> + break; >> + case GIC_DIST_CTR: >> + case GIC_DIST_IIDR: >> + /* Nothing to do */ >> + return; >> + } >> +} >> + >> static const struct vgic_register_region vgic_v2_dist_registers[] = { >> REGISTER_DESC_WITH_LENGTH(GIC_DIST_CTRL, >> - vgic_mmio_read_raz, vgic_mmio_write_wi, 12), >> + vgic_mmio_read_v2_misc, vgic_mmio_write_v2_misc, 12), >> REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_IGROUP, >> vgic_mmio_read_rao, vgic_mmio_write_wi, 1), >> REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_SET, >> diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c >> index c3dbcf3..5355de6 100644 >> --- a/virt/kvm/arm/vgic/vgic.c >> +++ b/virt/kvm/arm/vgic/vgic.c >> @@ -544,3 +544,18 @@ int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu) >> >> return pending; >> } >> + >> +void vgic_kick_vcpus(struct kvm *kvm) >> +{ >> + struct kvm_vcpu *vcpu; >> + int c; >> + >> + /* >> + * We've injected an interrupt, time to find out who deserves >> + * a good kick... >> + */ >> + kvm_for_each_vcpu(c, vcpu, kvm) { >> + if (kvm_vgic_vcpu_pending_irq(vcpu)) >> + kvm_vcpu_kick(vcpu); >> + } >> +} >> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h >> index fd9acaa..cf62015 100644 >> --- a/virt/kvm/arm/vgic/vgic.h >> +++ b/virt/kvm/arm/vgic/vgic.h >> @@ -16,11 +16,15 @@ >> #ifndef __KVM_ARM_VGIC_NEW_H__ >> #define __KVM_ARM_VGIC_NEW_H__ >> >> +#define PRODUCT_ID_KVM 0x4b /* ASCII code K */ >> +#define IMPLEMENTER_ARM 0x43b >> + >> #define vgic_irq_is_sgi(intid) ((intid) < VGIC_NR_SGIS) >> >> struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, >> u32 intid); >> bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq); >> +void vgic_kick_vcpus(struct kvm *kvm); >> >> void vgic_v2_process_maintenance(struct kvm_vcpu *vcpu); >> void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu); >> -- >> 2.7.3 >> >> -- >> To unsubscribe from this list: send the line "unsubscribe kvm" in >> the body of a message to majordomo at vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >
next prev parent reply other threads:[~2016-05-11 12:47 UTC|newest] Thread overview: 400+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-05-06 10:45 [PATCH v3 00/55] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 01/55] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 02/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 03/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 04/55] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 05/55] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 06/55] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 8:33 ` Eric Auger 2016-05-10 8:33 ` Eric Auger 2016-05-06 10:45 ` [PATCH v3 07/55] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 08/55] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-18 10:43 ` Andre Przywara 2016-05-18 10:43 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 09/55] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 8:57 ` Marc Zyngier 2016-05-10 8:57 ` Marc Zyngier 2016-05-18 11:02 ` Andre Przywara 2016-05-18 11:02 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 10/55] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 8:59 ` Marc Zyngier 2016-05-10 8:59 ` Marc Zyngier 2016-05-18 14:18 ` Andre Przywara 2016-05-18 14:18 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 11/55] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:00 ` Marc Zyngier 2016-05-10 9:00 ` Marc Zyngier 2016-05-10 9:52 ` Eric Auger 2016-05-10 9:52 ` Eric Auger 2016-05-10 10:04 ` Marc Zyngier 2016-05-10 10:04 ` Marc Zyngier 2016-05-10 14:35 ` [PATCH v3a] " Andre Przywara 2016-05-10 14:35 ` Andre Przywara 2016-05-10 14:58 ` Andrew Jones 2016-05-10 14:58 ` Andrew Jones 2016-05-11 13:52 ` Andre Przywara 2016-05-11 13:52 ` Andre Przywara 2016-05-10 15:22 ` Marc Zyngier 2016-05-10 15:22 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 12/55] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:02 ` Marc Zyngier 2016-05-10 9:02 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 13/55] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:05 ` Marc Zyngier 2016-05-10 9:05 ` Marc Zyngier 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:17 ` Marc Zyngier 2016-05-12 12:17 ` Marc Zyngier 2016-05-12 12:23 ` Christoffer Dall 2016-05-12 12:23 ` Christoffer Dall 2016-05-12 13:25 ` Andre Przywara 2016-05-12 13:25 ` Andre Przywara 2016-05-12 13:48 ` Christoffer Dall 2016-05-12 13:48 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 14/55] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:22 ` Marc Zyngier 2016-05-10 9:22 ` Marc Zyngier 2016-05-11 9:20 ` Andre Przywara 2016-05-11 9:20 ` Andre Przywara 2016-05-10 9:35 ` Eric Auger 2016-05-10 9:35 ` Eric Auger 2016-05-06 10:45 ` [PATCH v3 15/55] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:25 ` Eric Auger 2016-05-10 9:25 ` Eric Auger 2016-05-10 9:39 ` Marc Zyngier 2016-05-10 9:39 ` Marc Zyngier 2016-05-10 12:08 ` Christoffer Dall 2016-05-10 12:08 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 16/55] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 9:29 ` Eric Auger 2016-05-10 9:29 ` Eric Auger 2016-05-10 9:48 ` Marc Zyngier 2016-05-10 9:48 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 17/55] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 13:11 ` Christoffer Dall 2016-05-10 13:11 ` Christoffer Dall 2016-05-10 13:53 ` Eric Auger 2016-05-10 13:53 ` Eric Auger 2016-05-10 15:20 ` Eric Auger 2016-05-10 15:20 ` Eric Auger 2016-05-10 17:32 ` Marc Zyngier 2016-05-10 17:32 ` Marc Zyngier 2016-05-12 11:46 ` Christoffer Dall 2016-05-12 11:46 ` Christoffer Dall 2016-05-12 15:08 ` Andre Przywara 2016-05-12 15:08 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 18/55] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 13:30 ` Christoffer Dall 2016-05-10 13:30 ` Christoffer Dall 2016-05-10 13:42 ` Marc Zyngier 2016-05-10 13:42 ` Marc Zyngier 2016-05-10 13:49 ` Eric Auger 2016-05-10 13:49 ` Eric Auger 2016-05-10 14:11 ` Christoffer Dall 2016-05-10 14:11 ` Christoffer Dall 2016-05-10 14:35 ` Marc Zyngier 2016-05-10 14:35 ` Marc Zyngier 2016-05-10 14:45 ` Marc Zyngier 2016-05-10 14:45 ` Marc Zyngier 2016-05-11 9:38 ` Christoffer Dall 2016-05-11 9:38 ` Christoffer Dall 2016-05-10 14:10 ` Eric Auger 2016-05-10 14:10 ` Eric Auger 2016-05-11 11:30 ` Andre Przywara 2016-05-11 11:30 ` Andre Przywara 2016-05-11 11:38 ` Eric Auger 2016-05-11 11:38 ` Eric Auger 2016-05-11 13:09 ` Andre Przywara 2016-05-11 13:09 ` Andre Przywara 2016-05-11 12:26 ` Christoffer Dall 2016-05-11 12:26 ` Christoffer Dall 2016-05-11 13:13 ` Andre Przywara 2016-05-11 13:13 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 19/55] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 19:07 ` Tom Hanson 2016-05-06 19:07 ` Tom Hanson 2016-05-10 14:04 ` Christoffer Dall 2016-05-10 14:04 ` Christoffer Dall 2016-05-10 14:15 ` Peter Maydell 2016-05-10 14:15 ` Peter Maydell 2016-05-10 14:22 ` Marc Zyngier 2016-05-10 14:22 ` Marc Zyngier 2016-05-11 9:39 ` Christoffer Dall 2016-05-11 9:39 ` Christoffer Dall 2016-05-10 15:28 ` Eric Auger 2016-05-10 15:28 ` Eric Auger 2016-05-10 17:35 ` Marc Zyngier 2016-05-10 17:35 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 20/55] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 10:22 ` Marc Zyngier 2016-05-10 10:22 ` Marc Zyngier 2016-05-10 14:18 ` Christoffer Dall 2016-05-10 14:18 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 21/55] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-11 9:46 ` Christoffer Dall 2016-05-11 9:46 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 22/55] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-11 9:50 ` Christoffer Dall 2016-05-11 9:50 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 23/55] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-11 12:05 ` Christoffer Dall 2016-05-11 12:05 ` Christoffer Dall 2016-05-11 12:47 ` Andre Przywara [this message] 2016-05-11 12:47 ` Andre Przywara 2016-05-11 12:51 ` Marc Zyngier 2016-05-11 12:51 ` Marc Zyngier 2016-05-11 13:15 ` Christoffer Dall 2016-05-11 13:15 ` Christoffer Dall 2016-05-11 13:27 ` Marc Zyngier 2016-05-11 13:27 ` Marc Zyngier 2016-05-11 13:36 ` Andre Przywara 2016-05-11 13:36 ` Andre Przywara 2016-05-11 14:40 ` Marc Zyngier 2016-05-11 14:40 ` Marc Zyngier 2016-05-11 13:38 ` Christoffer Dall 2016-05-11 13:38 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 24/55] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 10:28 ` Marc Zyngier 2016-05-10 10:28 ` Marc Zyngier 2016-05-11 12:34 ` Christoffer Dall 2016-05-11 12:34 ` Christoffer Dall 2016-05-11 13:04 ` Andre Przywara 2016-05-11 13:04 ` Andre Przywara 2016-05-11 13:14 ` Christoffer Dall 2016-05-11 13:14 ` Christoffer Dall 2016-05-11 13:24 ` Andre Przywara 2016-05-11 13:24 ` Andre Przywara 2016-05-11 13:41 ` Christoffer Dall 2016-05-11 13:41 ` Christoffer Dall 2016-05-11 13:16 ` Christoffer Dall 2016-05-11 13:16 ` Christoffer Dall 2016-05-11 13:13 ` Marc Zyngier 2016-05-11 13:13 ` Marc Zyngier 2016-05-11 13:39 ` Andre Przywara 2016-05-11 13:39 ` Andre Przywara 2016-05-11 14:26 ` Marc Zyngier 2016-05-11 14:26 ` Marc Zyngier 2016-05-11 13:47 ` Christoffer Dall 2016-05-11 13:47 ` Christoffer Dall 2016-05-11 14:18 ` Andre Przywara 2016-05-11 14:18 ` Andre Przywara 2016-05-11 14:28 ` Andre Przywara 2016-05-11 14:28 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 25/55] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 10:49 ` Marc Zyngier 2016-05-10 10:49 ` Marc Zyngier 2016-05-11 13:11 ` Christoffer Dall 2016-05-11 13:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 26/55] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-10 12:09 ` Christoffer Dall 2016-05-10 12:09 ` Christoffer Dall 2016-05-10 12:14 ` Marc Zyngier 2016-05-10 12:14 ` Marc Zyngier 2016-05-10 13:04 ` Andre Przywara 2016-05-10 13:04 ` Andre Przywara 2016-05-10 13:12 ` Christoffer Dall 2016-05-10 13:12 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 27/55] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-11 13:37 ` Christoffer Dall 2016-05-11 13:37 ` Christoffer Dall 2016-05-12 9:10 ` Marc Zyngier 2016-05-12 9:10 ` Marc Zyngier 2016-05-12 9:56 ` Peter Maydell 2016-05-12 9:56 ` Peter Maydell 2016-05-12 10:09 ` Marc Zyngier 2016-05-12 10:09 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 28/55] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 8:32 ` Christoffer Dall 2016-05-12 8:32 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 29/55] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 8:35 ` Christoffer Dall 2016-05-12 8:35 ` Christoffer Dall 2016-05-12 8:39 ` Marc Zyngier 2016-05-12 8:39 ` Marc Zyngier 2016-05-12 8:54 ` Christoffer Dall 2016-05-12 8:54 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 30/55] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 8:40 ` Christoffer Dall 2016-05-12 8:40 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 31/55] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 9:09 ` Christoffer Dall 2016-05-12 9:09 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 32/55] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-09 17:18 ` Marc Zyngier 2016-05-09 17:18 ` Marc Zyngier 2016-05-09 17:51 ` Chalamarla, Tirumalesh 2016-05-09 17:51 ` Chalamarla, Tirumalesh 2016-05-10 10:58 ` [PATCH] KVM: arm/arm64: vgic-new: fix overlap check for device addresses Andre Przywara 2016-05-10 10:58 ` Andre Przywara 2016-05-10 13:16 ` Marc Zyngier 2016-05-10 13:16 ` Marc Zyngier 2016-05-10 17:18 ` [PATCH v2] " Andre Przywara 2016-05-10 17:18 ` Andre Przywara 2016-05-12 19:43 ` Christoffer Dall 2016-05-12 19:43 ` Christoffer Dall 2016-05-12 10:26 ` [PATCH v3 32/55] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Christoffer Dall 2016-05-12 10:26 ` Christoffer Dall 2016-05-12 10:52 ` Andre Przywara 2016-05-12 10:52 ` Andre Przywara 2016-05-12 10:58 ` Marc Zyngier 2016-05-12 10:58 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 33/55] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 11:47 ` Christoffer Dall 2016-05-12 11:47 ` Christoffer Dall 2016-05-12 12:33 ` Andre Przywara 2016-05-12 12:33 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 34/55] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 11:59 ` Christoffer Dall 2016-05-12 11:59 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 35/55] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:12 ` Christoffer Dall 2016-05-12 12:37 ` Andre Przywara 2016-05-12 12:37 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 36/55] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 12:21 ` Christoffer Dall 2016-05-12 12:21 ` Christoffer Dall 2016-05-12 12:37 ` Marc Zyngier 2016-05-12 12:37 ` Marc Zyngier 2016-05-12 13:41 ` Christoffer Dall 2016-05-12 13:41 ` Christoffer Dall 2016-05-12 14:00 ` Andre Przywara 2016-05-12 14:00 ` Andre Przywara 2016-05-12 14:20 ` Marc Zyngier 2016-05-12 14:20 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 37/55] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 12:40 ` Christoffer Dall 2016-05-12 12:40 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 38/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:11 ` Christoffer Dall 2016-05-13 10:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 39/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:11 ` Christoffer Dall 2016-05-13 10:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 40/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:11 ` Christoffer Dall 2016-05-13 10:11 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 41/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:12 ` Christoffer Dall 2016-05-13 10:12 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 42/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-13 10:12 ` Christoffer Dall 2016-05-13 10:12 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 43/55] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 18:30 ` Christoffer Dall 2016-05-12 18:30 ` Christoffer Dall 2016-05-13 12:24 ` Andre Przywara 2016-05-13 12:24 ` Andre Przywara 2016-05-13 12:29 ` Christoffer Dall 2016-05-13 12:29 ` Christoffer Dall 2016-05-13 12:30 ` Marc Zyngier 2016-05-13 12:30 ` Marc Zyngier 2016-05-06 10:45 ` [PATCH v3 44/55] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-06 10:45 ` [PATCH v3 45/55] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 18:41 ` Christoffer Dall 2016-05-12 18:41 ` Christoffer Dall 2016-05-12 19:10 ` Andre Przywara 2016-05-12 19:10 ` Andre Przywara 2016-05-13 7:51 ` Christoffer Dall 2016-05-13 7:51 ` Christoffer Dall 2016-05-06 10:45 ` [PATCH v3 46/55] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara 2016-05-06 10:45 ` Andre Przywara 2016-05-12 18:43 ` Christoffer Dall 2016-05-12 18:43 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 47/55] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-09 17:27 ` Marc Zyngier 2016-05-09 17:27 ` Marc Zyngier 2016-05-11 8:24 ` Andre Przywara 2016-05-11 8:24 ` Andre Przywara 2016-05-12 18:47 ` Christoffer Dall 2016-05-12 18:47 ` Christoffer Dall 2016-05-12 18:52 ` Andre Przywara 2016-05-12 18:52 ` Andre Przywara 2016-05-13 7:53 ` Christoffer Dall 2016-05-13 7:53 ` Christoffer Dall 2016-05-13 10:44 ` Andre Przywara 2016-05-13 10:44 ` Andre Przywara 2016-05-13 11:54 ` Christoffer Dall 2016-05-13 11:54 ` Christoffer Dall 2016-05-13 12:23 ` Andre Przywara 2016-05-13 12:23 ` Andre Przywara 2016-05-13 12:32 ` Christoffer Dall 2016-05-13 12:32 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 48/55] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:00 ` Christoffer Dall 2016-05-12 19:00 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 49/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:08 ` Christoffer Dall 2016-05-12 19:08 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 50/55] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:25 ` Christoffer Dall 2016-05-12 19:25 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 51/55] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:28 ` Christoffer Dall 2016-05-12 19:28 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 52/55] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:30 ` Christoffer Dall 2016-05-12 19:30 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 53/55] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:33 ` Christoffer Dall 2016-05-12 19:33 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 54/55] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara 2016-05-06 10:46 ` Andre Przywara 2016-05-12 19:36 ` Christoffer Dall 2016-05-12 19:36 ` Christoffer Dall 2016-05-06 10:46 ` [PATCH v3 55/55] KVM: arm/arm64: vgic-new: enable build Andre Przywara 2016-05-06 10:46 ` Andre Przywara
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=573329D4.5030508@arm.com \ --to=andre.przywara@arm.com \ --cc=christoffer.dall@linaro.org \ --cc=kvm@vger.kernel.org \ --cc=kvmarm@lists.cs.columbia.edu \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=marc.zyngier@arm.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.