From: Yunhui Cui <B56489@freescale.com> To: <dwmw2@infradead.org>, <computersforpeace@gmail.com>, <han.xu@freescale.com>, <jagannadh.teki@gmail.com> Cc: <linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, <yao.yuan@nxp.com>, Yunhui Cui <yunhui.cui@nxp.com> Subject: [PATCH v3 5/9] mtd: spi-nor: fsl-quadspi:Support qspi for ls2080a Date: Thu, 18 Aug 2016 15:38:00 +0800 [thread overview] Message-ID: <1471505884-33996-5-git-send-email-B56489@freescale.com> (raw) In-Reply-To: <1471505884-33996-1-git-send-email-B56489@freescale.com> There is a hardware feature that qspi_amba_base is added internally by SOC design on ls2080a. So as to software, the driver need support to the feature. Signed-off-by: Yunhui Cui <B56489@freescale.com> Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 2521370..57eed3c 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -41,6 +41,8 @@ #define QUADSPI_QUIRK_TKT253890 (1 << 2) /* Controller cannot wake up from wait mode, TKT245618 */ #define QUADSPI_QUIRK_TKT245618 (1 << 3) +/* QSPI_AMBA_BASE is internally added by SOC design */ +#define QUADSPI_AMBA_BASE_INTERNAL (0x10000) /* The registers */ #define QUADSPI_MCR 0x00 @@ -217,6 +219,7 @@ enum fsl_qspi_devtype { FSL_QUADSPI_IMX7D, FSL_QUADSPI_IMX6UL, FSL_QUADSPI_LS1021A, + FSL_QUADSPI_LS2080A, }; struct fsl_qspi_devtype_data { @@ -270,6 +273,14 @@ static struct fsl_qspi_devtype_data ls1021a_data = { .driver_data = 0, }; +static struct fsl_qspi_devtype_data ls2080a_data = { + .devtype = FSL_QUADSPI_LS2080A, + .rxfifo = 128, + .txfifo = 64, + .ahb_buf_size = 1024, + .driver_data = QUADSPI_AMBA_BASE_INTERNAL, +}; + #define FSL_QSPI_MAX_CHIP 4 struct fsl_qspi { struct spi_nor nor[FSL_QSPI_MAX_CHIP]; @@ -312,6 +323,11 @@ static inline int needs_wakeup_wait_mode(struct fsl_qspi *q) return q->devtype_data->driver_data & QUADSPI_QUIRK_TKT245618; } +static inline int has_added_amba_base_internal(struct fsl_qspi *q) +{ + return q->devtype_data->driver_data & QUADSPI_AMBA_BASE_INTERNAL; +} + /* * R/W functions for big- or little-endian registers: * The qSPI controller's endian is independent of the CPU core's endian. @@ -558,8 +574,11 @@ fsl_qspi_runcmd(struct fsl_qspi *q, u8 cmd, unsigned int addr, int len) /* save the reg */ reg = qspi_readl(q, base + QUADSPI_MCR); - qspi_writel(q, q->memmap_phy + q->chip_base_addr + addr, - base + QUADSPI_SFAR); + if (has_added_amba_base_internal(q)) + qspi_writel(q, q->chip_base_addr + addr, base + QUADSPI_SFAR); + else + qspi_writel(q, q->memmap_phy + q->chip_base_addr + addr, + base + QUADSPI_SFAR); qspi_writel(q, QUADSPI_RBCT_WMRK_MASK | QUADSPI_RBCT_RXBRD_USEIPS, base + QUADSPI_RBCT); qspi_writel(q, reg | QUADSPI_MCR_CLR_RXF_MASK, base + QUADSPI_MCR); @@ -849,6 +868,7 @@ static const struct of_device_id fsl_qspi_dt_ids[] = { { .compatible = "fsl,imx7d-qspi", .data = (void *)&imx7d_data, }, { .compatible = "fsl,imx6ul-qspi", .data = (void *)&imx6ul_data, }, { .compatible = "fsl,ls1021a-qspi", .data = (void *)&ls1021a_data, }, + { .compatible = "fsl,ls2080a-qspi", .data = (void *)&ls2080a_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_qspi_dt_ids); -- 2.1.0.27.g96db324
WARNING: multiple messages have this Message-ID (diff)
From: B56489@freescale.com (Yunhui Cui) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 5/9] mtd: spi-nor: fsl-quadspi:Support qspi for ls2080a Date: Thu, 18 Aug 2016 15:38:00 +0800 [thread overview] Message-ID: <1471505884-33996-5-git-send-email-B56489@freescale.com> (raw) In-Reply-To: <1471505884-33996-1-git-send-email-B56489@freescale.com> There is a hardware feature that qspi_amba_base is added internally by SOC design on ls2080a. So as to software, the driver need support to the feature. Signed-off-by: Yunhui Cui <B56489@freescale.com> Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 2521370..57eed3c 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -41,6 +41,8 @@ #define QUADSPI_QUIRK_TKT253890 (1 << 2) /* Controller cannot wake up from wait mode, TKT245618 */ #define QUADSPI_QUIRK_TKT245618 (1 << 3) +/* QSPI_AMBA_BASE is internally added by SOC design */ +#define QUADSPI_AMBA_BASE_INTERNAL (0x10000) /* The registers */ #define QUADSPI_MCR 0x00 @@ -217,6 +219,7 @@ enum fsl_qspi_devtype { FSL_QUADSPI_IMX7D, FSL_QUADSPI_IMX6UL, FSL_QUADSPI_LS1021A, + FSL_QUADSPI_LS2080A, }; struct fsl_qspi_devtype_data { @@ -270,6 +273,14 @@ static struct fsl_qspi_devtype_data ls1021a_data = { .driver_data = 0, }; +static struct fsl_qspi_devtype_data ls2080a_data = { + .devtype = FSL_QUADSPI_LS2080A, + .rxfifo = 128, + .txfifo = 64, + .ahb_buf_size = 1024, + .driver_data = QUADSPI_AMBA_BASE_INTERNAL, +}; + #define FSL_QSPI_MAX_CHIP 4 struct fsl_qspi { struct spi_nor nor[FSL_QSPI_MAX_CHIP]; @@ -312,6 +323,11 @@ static inline int needs_wakeup_wait_mode(struct fsl_qspi *q) return q->devtype_data->driver_data & QUADSPI_QUIRK_TKT245618; } +static inline int has_added_amba_base_internal(struct fsl_qspi *q) +{ + return q->devtype_data->driver_data & QUADSPI_AMBA_BASE_INTERNAL; +} + /* * R/W functions for big- or little-endian registers: * The qSPI controller's endian is independent of the CPU core's endian. @@ -558,8 +574,11 @@ fsl_qspi_runcmd(struct fsl_qspi *q, u8 cmd, unsigned int addr, int len) /* save the reg */ reg = qspi_readl(q, base + QUADSPI_MCR); - qspi_writel(q, q->memmap_phy + q->chip_base_addr + addr, - base + QUADSPI_SFAR); + if (has_added_amba_base_internal(q)) + qspi_writel(q, q->chip_base_addr + addr, base + QUADSPI_SFAR); + else + qspi_writel(q, q->memmap_phy + q->chip_base_addr + addr, + base + QUADSPI_SFAR); qspi_writel(q, QUADSPI_RBCT_WMRK_MASK | QUADSPI_RBCT_RXBRD_USEIPS, base + QUADSPI_RBCT); qspi_writel(q, reg | QUADSPI_MCR_CLR_RXF_MASK, base + QUADSPI_MCR); @@ -849,6 +868,7 @@ static const struct of_device_id fsl_qspi_dt_ids[] = { { .compatible = "fsl,imx7d-qspi", .data = (void *)&imx7d_data, }, { .compatible = "fsl,imx6ul-qspi", .data = (void *)&imx6ul_data, }, { .compatible = "fsl,ls1021a-qspi", .data = (void *)&ls1021a_data, }, + { .compatible = "fsl,ls2080a-qspi", .data = (void *)&ls2080a_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, fsl_qspi_dt_ids); -- 2.1.0.27.g96db324
next prev parent reply other threads:[~2016-08-18 8:05 UTC|newest] Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-08-18 7:37 [PATCH v3 1/9] mtd:fsl-quadspi:use the property fields of SPI-NOR Yunhui Cui 2016-08-18 7:37 ` Yunhui Cui 2016-08-18 7:37 ` [PATCH v3 2/9] mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READ Yunhui Cui 2016-08-18 7:37 ` Yunhui Cui 2016-09-14 19:44 ` Han Xu 2016-09-14 19:44 ` Han Xu 2017-01-27 10:35 ` Cyrille Pitchen 2017-01-27 10:35 ` Cyrille Pitchen 2016-08-18 7:37 ` [PATCH v3 3/9] mtd: spi-nor: fsl-quadspi: add fast-read mode support Yunhui Cui 2016-08-18 7:37 ` Yunhui Cui 2016-09-14 19:45 ` Han Xu 2016-09-14 19:45 ` Han Xu 2016-08-18 7:37 ` [PATCH v3 4/9] mtd: spi-nor: fsl-quadspi: extend support for some special requerment Yunhui Cui 2016-08-18 7:37 ` Yunhui Cui 2016-09-14 19:45 ` Han Xu 2016-09-14 19:45 ` Han Xu 2016-08-18 7:38 ` Yunhui Cui [this message] 2016-08-18 7:38 ` [PATCH v3 5/9] mtd: spi-nor: fsl-quadspi:Support qspi for ls2080a Yunhui Cui 2016-09-14 19:46 ` Han Xu 2016-09-14 19:46 ` Han Xu 2016-08-18 7:38 ` [PATCH v3 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash Yunhui Cui 2016-08-18 7:38 ` Yunhui Cui 2016-09-14 19:48 ` Han Xu 2016-09-14 19:48 ` Han Xu 2016-09-15 6:50 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-09-15 6:50 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-09-15 6:50 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-16 17:10 ` Han Xu 2016-11-16 17:10 ` Han Xu 2016-11-16 17:10 ` Han Xu 2016-11-17 7:42 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-17 7:42 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-17 7:42 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-17 9:14 ` Yao Yuan 2016-11-17 9:14 ` Yao Yuan 2016-11-17 9:14 ` Yao Yuan 2016-11-17 9:20 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-17 9:20 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-17 9:20 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-18 4:19 ` Yao Yuan 2016-11-18 4:19 ` Yao Yuan 2016-11-18 4:19 ` Yao Yuan 2016-11-18 10:59 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-18 10:59 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-18 10:59 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-21 6:27 ` Yao Yuan 2016-11-21 6:27 ` Yao Yuan 2016-11-21 6:27 ` Yao Yuan 2016-11-21 7:14 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-21 7:14 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-21 7:14 ` Krzeminski, Marcin (Nokia - PL/Wroclaw) 2016-11-21 9:18 ` Yao Yuan 2016-11-21 9:18 ` Yao Yuan 2016-11-21 9:18 ` Yao Yuan 2016-11-18 4:30 ` Han Xu 2016-11-18 4:30 ` Han Xu 2016-11-18 4:30 ` Han Xu 2016-11-21 6:30 ` Yao Yuan 2016-11-21 6:30 ` Yao Yuan 2016-11-21 6:30 ` Yao Yuan 2016-11-16 17:44 ` Jagan Teki 2016-11-16 17:44 ` Jagan Teki 2016-11-16 17:44 ` Jagan Teki 2016-08-18 7:38 ` [PATCH v3 7/9] mtd: fsl-quadspi: Solve Micron Spansion flash command conflict Yunhui Cui 2016-08-18 7:38 ` Yunhui Cui 2016-09-14 19:48 ` Han Xu 2016-09-14 19:48 ` Han Xu 2016-08-18 7:38 ` [PATCH v3 8/9] mtd: fsl-quadspi: disable AHB buffer prefetch Yunhui Cui 2016-08-18 7:38 ` Yunhui Cui 2016-09-14 19:49 ` Han Xu 2016-09-14 19:49 ` Han Xu 2016-08-18 7:38 ` [PATCH v3 9/9] mtd: fsl-quadspi: add multi flash chip R/W on ls2080a Yunhui Cui 2016-08-18 7:38 ` Yunhui Cui 2016-09-14 19:49 ` Han Xu 2016-09-14 19:49 ` Han Xu 2016-09-14 19:44 ` [PATCH v3 1/9] mtd:fsl-quadspi:use the property fields of SPI-NOR Han Xu 2016-09-14 19:44 ` Han Xu 2016-09-30 10:04 ` Cyrille Pitchen 2016-09-30 10:04 ` Cyrille Pitchen 2017-01-27 10:27 ` Cyrille Pitchen 2017-01-27 10:27 ` Cyrille Pitchen
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