All of lore.kernel.org
 help / color / mirror / Atom feed
From: Julien Thierry <julien.thierry@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org,
	joel@joelfernandes.org, marc.zyngier@arm.com,
	christoffer.dall@arm.com, james.morse@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com,
	mark.rutland@arm.com, Julien Thierry <julien.thierry@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Marc Zyngier <Marc.Zyngier@arm.com>,
	Christoffer Dall <Christoffer.Dall@arm.com>
Subject: [PATCH v9 14/26] arm64: alternative: Allow alternative status checking per cpufeature
Date: Mon, 21 Jan 2019 15:33:33 +0000	[thread overview]
Message-ID: <1548084825-8803-15-git-send-email-julien.thierry@arm.com> (raw)
In-Reply-To: <1548084825-8803-1-git-send-email-julien.thierry@arm.com>

In preparation for the application of alternatives at different points
during the boot process, provide the possibility to check whether
alternatives for a feature of interest was already applied instead of
having a global boolean for all alternatives.

Make VHE enablement code check for the VHE feature instead of considering
all alternatives.

Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Cc: Christoffer Dall <Christoffer.Dall@arm.com>
---
 arch/arm64/include/asm/alternative.h |  3 +--
 arch/arm64/kernel/alternative.c      | 21 +++++++++++++++++----
 arch/arm64/kernel/cpufeature.c       |  2 +-
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h
index 4b650ec..9806a23 100644
--- a/arch/arm64/include/asm/alternative.h
+++ b/arch/arm64/include/asm/alternative.h
@@ -14,8 +14,6 @@
 #include <linux/stddef.h>
 #include <linux/stringify.h>
 
-extern int alternatives_applied;
-
 struct alt_instr {
 	s32 orig_offset;	/* offset to original instruction */
 	s32 alt_offset;		/* offset to replacement instruction */
@@ -28,6 +26,7 @@ typedef void (*alternative_cb_t)(struct alt_instr *alt,
 				 __le32 *origptr, __le32 *updptr, int nr_inst);
 
 void __init apply_alternatives_all(void);
+bool alternative_is_applied(u16 cpufeature);
 
 #ifdef CONFIG_MODULES
 void apply_alternatives_module(void *start, size_t length);
diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c
index b5d6039..c947d22 100644
--- a/arch/arm64/kernel/alternative.c
+++ b/arch/arm64/kernel/alternative.c
@@ -32,13 +32,23 @@
 #define ALT_ORIG_PTR(a)		__ALT_PTR(a, orig_offset)
 #define ALT_REPL_PTR(a)		__ALT_PTR(a, alt_offset)
 
-int alternatives_applied;
+static int all_alternatives_applied;
+
+static DECLARE_BITMAP(applied_alternatives, ARM64_NCAPS);
 
 struct alt_region {
 	struct alt_instr *begin;
 	struct alt_instr *end;
 };
 
+bool alternative_is_applied(u16 cpufeature)
+{
+	if (WARN_ON(cpufeature >= ARM64_NCAPS))
+		return false;
+
+	return test_bit(cpufeature, applied_alternatives);
+}
+
 /*
  * Check if the target PC is within an alternative block.
  */
@@ -192,6 +202,9 @@ static void __apply_alternatives(void *alt_region, bool is_module)
 		dsb(ish);
 		__flush_icache_all();
 		isb();
+
+		/* We applied all that was available */
+		bitmap_copy(applied_alternatives, cpu_hwcaps, ARM64_NCAPS);
 	}
 }
 
@@ -208,14 +221,14 @@ static int __apply_alternatives_multi_stop(void *unused)
 
 	/* We always have a CPU 0 at this point (__init) */
 	if (smp_processor_id()) {
-		while (!READ_ONCE(alternatives_applied))
+		while (!READ_ONCE(all_alternatives_applied))
 			cpu_relax();
 		isb();
 	} else {
-		BUG_ON(alternatives_applied);
+		BUG_ON(all_alternatives_applied);
 		__apply_alternatives(&region, false);
 		/* Barriers provided by the cache flushing */
-		WRITE_ONCE(alternatives_applied, 1);
+		WRITE_ONCE(all_alternatives_applied, 1);
 	}
 
 	return 0;
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 6f56e0a..d607ea3 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1118,7 +1118,7 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused)
 	 * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to
 	 * do anything here.
 	 */
-	if (!alternatives_applied)
+	if (!alternative_is_applied(ARM64_HAS_VIRT_HOST_EXTN))
 		write_sysreg(read_sysreg(tpidr_el1), tpidr_el2);
 }
 #endif
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: Julien Thierry <julien.thierry@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, daniel.thompson@linaro.org,
	Julien Thierry <julien.thierry@arm.com>,
	Marc Zyngier <Marc.Zyngier@arm.com>,
	catalin.marinas@arm.com,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	will.deacon@arm.com, linux-kernel@vger.kernel.org,
	Christoffer Dall <Christoffer.Dall@arm.com>,
	james.morse@arm.com, joel@joelfernandes.org
Subject: [PATCH v9 14/26] arm64: alternative: Allow alternative status checking per cpufeature
Date: Mon, 21 Jan 2019 15:33:33 +0000	[thread overview]
Message-ID: <1548084825-8803-15-git-send-email-julien.thierry@arm.com> (raw)
In-Reply-To: <1548084825-8803-1-git-send-email-julien.thierry@arm.com>

In preparation for the application of alternatives at different points
during the boot process, provide the possibility to check whether
alternatives for a feature of interest was already applied instead of
having a global boolean for all alternatives.

Make VHE enablement code check for the VHE feature instead of considering
all alternatives.

Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Cc: Christoffer Dall <Christoffer.Dall@arm.com>
---
 arch/arm64/include/asm/alternative.h |  3 +--
 arch/arm64/kernel/alternative.c      | 21 +++++++++++++++++----
 arch/arm64/kernel/cpufeature.c       |  2 +-
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h
index 4b650ec..9806a23 100644
--- a/arch/arm64/include/asm/alternative.h
+++ b/arch/arm64/include/asm/alternative.h
@@ -14,8 +14,6 @@
 #include <linux/stddef.h>
 #include <linux/stringify.h>
 
-extern int alternatives_applied;
-
 struct alt_instr {
 	s32 orig_offset;	/* offset to original instruction */
 	s32 alt_offset;		/* offset to replacement instruction */
@@ -28,6 +26,7 @@ typedef void (*alternative_cb_t)(struct alt_instr *alt,
 				 __le32 *origptr, __le32 *updptr, int nr_inst);
 
 void __init apply_alternatives_all(void);
+bool alternative_is_applied(u16 cpufeature);
 
 #ifdef CONFIG_MODULES
 void apply_alternatives_module(void *start, size_t length);
diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c
index b5d6039..c947d22 100644
--- a/arch/arm64/kernel/alternative.c
+++ b/arch/arm64/kernel/alternative.c
@@ -32,13 +32,23 @@
 #define ALT_ORIG_PTR(a)		__ALT_PTR(a, orig_offset)
 #define ALT_REPL_PTR(a)		__ALT_PTR(a, alt_offset)
 
-int alternatives_applied;
+static int all_alternatives_applied;
+
+static DECLARE_BITMAP(applied_alternatives, ARM64_NCAPS);
 
 struct alt_region {
 	struct alt_instr *begin;
 	struct alt_instr *end;
 };
 
+bool alternative_is_applied(u16 cpufeature)
+{
+	if (WARN_ON(cpufeature >= ARM64_NCAPS))
+		return false;
+
+	return test_bit(cpufeature, applied_alternatives);
+}
+
 /*
  * Check if the target PC is within an alternative block.
  */
@@ -192,6 +202,9 @@ static void __apply_alternatives(void *alt_region, bool is_module)
 		dsb(ish);
 		__flush_icache_all();
 		isb();
+
+		/* We applied all that was available */
+		bitmap_copy(applied_alternatives, cpu_hwcaps, ARM64_NCAPS);
 	}
 }
 
@@ -208,14 +221,14 @@ static int __apply_alternatives_multi_stop(void *unused)
 
 	/* We always have a CPU 0 at this point (__init) */
 	if (smp_processor_id()) {
-		while (!READ_ONCE(alternatives_applied))
+		while (!READ_ONCE(all_alternatives_applied))
 			cpu_relax();
 		isb();
 	} else {
-		BUG_ON(alternatives_applied);
+		BUG_ON(all_alternatives_applied);
 		__apply_alternatives(&region, false);
 		/* Barriers provided by the cache flushing */
-		WRITE_ONCE(alternatives_applied, 1);
+		WRITE_ONCE(all_alternatives_applied, 1);
 	}
 
 	return 0;
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 6f56e0a..d607ea3 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1118,7 +1118,7 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused)
 	 * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to
 	 * do anything here.
 	 */
-	if (!alternatives_applied)
+	if (!alternative_is_applied(ARM64_HAS_VIRT_HOST_EXTN))
 		write_sysreg(read_sysreg(tpidr_el1), tpidr_el2);
 }
 #endif
-- 
1.9.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-01-21 15:36 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-21 15:33 [PATCH v9 00/26] arm64: provide pseudo NMI with GICv3 Julien Thierry
2019-01-21 15:33 ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 01/26] arm64: Fix HCR.TGE status for NMI contexts Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-23 22:57   ` Sasha Levin
2019-01-23 22:57     ` Sasha Levin
2019-01-28 11:48   ` James Morse
2019-01-28 11:48     ` James Morse
2019-01-28 15:42     ` Julien Thierry
2019-01-28 15:42       ` Julien Thierry
2019-01-31  8:19       ` Christoffer Dall
2019-01-31  8:19         ` Christoffer Dall
2019-01-31  8:56         ` Julien Thierry
2019-01-31  8:56           ` Julien Thierry
2019-01-31  9:27           ` Christoffer Dall
2019-01-31  9:27             ` Christoffer Dall
2019-01-31  9:40             ` Julien Thierry
2019-01-31  9:40               ` Julien Thierry
2019-01-31  9:48               ` Christoffer Dall
2019-01-31  9:48                 ` Christoffer Dall
2019-01-31  9:53               ` Marc Zyngier
2019-01-31  9:53                 ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 02/26] arm64: Remove unused daif related functions/macros Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:21   ` Marc Zyngier
2019-01-28  9:21     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 03/26] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:22   ` Marc Zyngier
2019-01-28  9:22     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 04/26] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:24   ` Marc Zyngier
2019-01-28  9:24     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 05/26] arm/arm64: gic-v3: Add PMR and RPR accessors Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:25   ` Marc Zyngier
2019-01-28  9:25     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 06/26] irqchip/gic-v3: Switch to PMR masking before calling IRQ handler Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:30   ` Marc Zyngier
2019-01-28  9:30     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 07/26] arm64: ptrace: Provide definitions for PMR values Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:37   ` Marc Zyngier
2019-01-28  9:37     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 08/26] arm64: Make PMR part of task context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:42   ` Marc Zyngier
2019-01-28  9:42     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 09/26] arm64: Unmask PMR before going idle Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-22 15:23   ` Catalin Marinas
2019-01-22 15:23     ` Catalin Marinas
2019-01-22 20:18   ` Ard Biesheuvel
2019-01-22 20:18     ` Ard Biesheuvel
2019-01-23  8:56     ` Julien Thierry
2019-01-23  8:56       ` Julien Thierry
2019-01-23  9:38       ` Ard Biesheuvel
2019-01-23  9:38         ` Ard Biesheuvel
2019-01-28  9:44   ` Marc Zyngier
2019-01-28  9:44     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 10/26] arm64: kvm: Unmask PMR before entering guest Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:58   ` Marc Zyngier
2019-01-28  9:58     ` Marc Zyngier
2019-01-28  9:58     ` Marc Zyngier
2019-01-30 12:07   ` Christoffer Dall
2019-01-30 12:07     ` Christoffer Dall
2019-01-30 14:58     ` Julien Thierry
2019-01-30 14:58       ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 11/26] efi: Let architectures decide the flags that should be saved/restored Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-21 15:42   ` Ard Biesheuvel
2019-01-21 15:42     ` Ard Biesheuvel
2019-01-23  9:04     ` Julien Thierry
2019-01-23  9:04       ` Julien Thierry
2019-01-28 10:00   ` Marc Zyngier
2019-01-28 10:00     ` Marc Zyngier
2019-01-28 10:00     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-21 15:45   ` Ard Biesheuvel
2019-01-21 15:45     ` Ard Biesheuvel
2019-01-21 18:05     ` Julien Thierry
2019-01-21 18:05       ` Julien Thierry
2019-01-22 15:21   ` Catalin Marinas
2019-01-22 15:21     ` Catalin Marinas
2019-01-23 10:44     ` Julien Thierry
2019-01-23 10:44       ` Julien Thierry
2019-01-30 11:52       ` Julien Thierry
2019-01-30 11:52         ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 13/26] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 10:37   ` Marc Zyngier
2019-01-28 10:37     ` Marc Zyngier
2019-01-21 15:33 ` Julien Thierry [this message]
2019-01-21 15:33   ` [PATCH v9 14/26] arm64: alternative: Allow alternative status checking per cpufeature Julien Thierry
2019-01-28 11:00   ` Marc Zyngier
2019-01-28 11:00     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 15/26] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:17   ` Marc Zyngier
2019-01-28 11:17     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 16/26] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:19   ` Marc Zyngier
2019-01-28 11:19     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 17/26] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:21   ` Marc Zyngier
2019-01-28 11:21     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 18/26] arm64: gic-v3: Implement arch support for priority masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:23   ` Marc Zyngier
2019-01-28 11:23     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 19/26] irqchip/gic-v3: Detect if GIC can support pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:39   ` Marc Zyngier
2019-01-28 11:39     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 20/26] irqchip/gic-v3: Handle pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:59   ` Marc Zyngier
2019-01-28 11:59     ` Marc Zyngier
2019-01-29 11:33     ` Julien Thierry
2019-01-29 11:33       ` Julien Thierry
2019-01-29 12:31       ` Marc Zyngier
2019-01-29 12:31         ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 21/26] irqchip/gic: Add functions to access irq priorities Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:04   ` Marc Zyngier
2019-01-28 12:04     ` Marc Zyngier
2019-01-29 11:36     ` Julien Thierry
2019-01-29 11:36       ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 22/26] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-26 10:19   ` liwei (GF)
2019-01-26 10:19     ` liwei (GF)
2019-01-26 10:41     ` Marc Zyngier
2019-01-26 10:41       ` Marc Zyngier
2019-01-28  8:57     ` Julien Thierry
2019-01-28  8:57       ` Julien Thierry
2019-01-28 13:59       ` liwei (GF)
2019-01-28 13:59         ` liwei (GF)
2019-01-28 14:49         ` Julien Thierry
2019-01-28 14:49           ` Julien Thierry
2019-01-28 12:08   ` Marc Zyngier
2019-01-28 12:08     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 23/26] arm64: Handle serror in NMI context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:26   ` Marc Zyngier
2019-01-28 12:26     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 24/26] arm64: Skip preemption when exiting an NMI Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:34   ` Marc Zyngier
2019-01-28 12:34     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 25/26] arm64: Skip irqflags tracing for NMI in IRQs disabled context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:40   ` Marc Zyngier
2019-01-28 12:40     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 26/26] arm64: Enable the support of pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:47   ` Marc Zyngier
2019-01-28 12:47     ` Marc Zyngier
2019-01-30 13:46     ` Julien Thierry
2019-01-30 13:46       ` Julien Thierry

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1548084825-8803-15-git-send-email-julien.thierry@arm.com \
    --to=julien.thierry@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=christoffer.dall@arm.com \
    --cc=daniel.thompson@linaro.org \
    --cc=james.morse@arm.com \
    --cc=joel@joelfernandes.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=suzuki.poulose@arm.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.