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From: Julien Thierry <julien.thierry@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, daniel.thompson@linaro.org,
	joel@joelfernandes.org, marc.zyngier@arm.com,
	christoffer.dall@arm.com, james.morse@arm.com,
	will.deacon@arm.com, mark.rutland@arm.com,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Oleg Nesterov <oleg@redhat.com>
Subject: Re: [PATCH v9 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking
Date: Wed, 30 Jan 2019 11:52:58 +0000	[thread overview]
Message-ID: <8873213c-a667-567b-9df2-de11cdd3671a@arm.com> (raw)
In-Reply-To: <2eabb029-4efe-6829-7fb1-6174a2edb154@arm.com>



On 23/01/2019 10:44, Julien Thierry wrote:
> 
> 
> On 22/01/2019 15:21, Catalin Marinas wrote:
>> On Mon, Jan 21, 2019 at 03:33:31PM +0000, Julien Thierry wrote:
>>> diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
>>> index 24692ed..7e82a92 100644
>>> --- a/arch/arm64/include/asm/irqflags.h
>>> +++ b/arch/arm64/include/asm/irqflags.h
>>> @@ -18,7 +18,9 @@
>>>  
>>>  #ifdef __KERNEL__
>>>  
>>> +#include <asm/alternative.h>
>>>  #include <asm/ptrace.h>
>>> +#include <asm/sysreg.h>
>>>  
>>>  /*
>>>   * Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
>>> @@ -36,33 +38,31 @@
>>>  /*
>>>   * CPU interrupt mask handling.
>>>   */
>>> -static inline unsigned long arch_local_irq_save(void)
>>> -{
>>> -	unsigned long flags;
>>> -	asm volatile(
>>> -		"mrs	%0, daif		// arch_local_irq_save\n"
>>> -		"msr	daifset, #2"
>>> -		: "=r" (flags)
>>> -		:
>>> -		: "memory");
>>> -	return flags;
>>> -}
>>> -
>>>  static inline void arch_local_irq_enable(void)
>>>  {
>>> -	asm volatile(
>>> -		"msr	daifclr, #2		// arch_local_irq_enable"
>>> -		:
>>> +	unsigned long unmasked = GIC_PRIO_IRQON;
>>> +
>>> +	asm volatile(ALTERNATIVE(
>>> +		"msr	daifclr, #2		// arch_local_irq_enable\n"
>>> +		"nop",
>>> +		"msr_s  " __stringify(SYS_ICC_PMR_EL1) ",%0\n"
>>> +		"dsb	sy",
>>> +		ARM64_HAS_IRQ_PRIO_MASKING)
>>>  		:
>>> +		: "r" (unmasked)
>>>  		: "memory");
>>>  }
>>>  
>>>  static inline void arch_local_irq_disable(void)
>>>  {
>>> -	asm volatile(
>>> -		"msr	daifset, #2		// arch_local_irq_disable"
>>> -		:
>>> +	unsigned long masked = GIC_PRIO_IRQOFF;
>>> +
>>> +	asm volatile(ALTERNATIVE(
>>> +		"msr	daifset, #2		// arch_local_irq_disable",
>>> +		"msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0",
>>> +		ARM64_HAS_IRQ_PRIO_MASKING)
>>>  		:
>>> +		: "r" (masked)
>>>  		: "memory");
>>>  }
>>
>> Nitpicks: you could drop masked/unmasked variables here (it's up to you,
>> it wouldn't make any difference on the generated asm).
>>
> 
> Good point, I'll do that.
> 
>>> @@ -71,12 +71,44 @@ static inline void arch_local_irq_disable(void)
>>>   */
>>>  static inline unsigned long arch_local_save_flags(void)
>>>  {
>>> +	unsigned long daif_bits;
>>>  	unsigned long flags;
>>> -	asm volatile(
>>> -		"mrs	%0, daif		// arch_local_save_flags"
>>> -		: "=r" (flags)
>>> -		:
>>> +
>>> +	daif_bits = read_sysreg(daif);
>>> +
>>> +	/*
>>> +	 * The asm is logically equivalent to:
>>> +	 *
>>> +	 * if (system_uses_irq_prio_masking())
>>> +	 *	flags = (daif_bits & PSR_I_BIT) ?
>>> +	 *			GIC_PRIO_IRQOFF :
>>> +	 *			read_sysreg_s(SYS_ICC_PMR_EL1);
>>> +	 * else
>>> +	 *	flags = daif_bits;
>>> +	 */
>>> +	asm volatile(ALTERNATIVE(
>>> +			"mov	%0, %1\n"
>>> +			"nop\n"
>>> +			"nop",
>>> +			"mrs_s	%0, " __stringify(SYS_ICC_PMR_EL1) "\n"
>>> +			"ands	%1, %1, " __stringify(PSR_I_BIT) "\n"
>>> +			"csel	%0, %0, %2, eq",
>>> +			ARM64_HAS_IRQ_PRIO_MASKING)
>>> +		: "=&r" (flags), "+r" (daif_bits)
>>> +		: "r" (GIC_PRIO_IRQOFF)
>>>  		: "memory");
>>> +
>>> +	return flags;
>>> +}
>>
>> BTW, how's the code generated from the C version? It will have a branch
>> but may not be too bad. Either way is fine by me.
>>
> 
> It's a bit hard to talk about the code generated from the C version as
> it can lie within several layers of inline, so the instructions for that
> section are a bit more scattered.
> 
> However, it seems like the compiler is more clever (maybe the asm
> volatile prevents some optimizations regarding register allocation or
> instruction ordering) and the C version seems to perform slightly better
> (although it could be within the noise) despite the branch.
> 
> So, I'll just switch up to the C version.
> 

I remember a reason to stick to the asm version. There is a time
interval between the (early) CPU feature being enabled and the (early)
alternatives being applied.

For the early ones, interrupts remain disabled between CPU feature
enabling and alternative application. However, if you enable lockdep, it
will do some interrupts_disabled() checks which become
local_irqs_disabled_flags(local_save_flags()). If one is using the
alternative and the other the static branch, lockdep will emit a warning
about it.

So, I tried moving all irqflags functions but using the static branch
for arch_local_irq_restore() slows things down a bit, and I'm not sure
having arch_local_irq_save() use static branch while
arch_local_irq_restore() uses alternative makes much sense.

In the end, I'll stick to the ASM + alternative version to avoid the
lockdep issue and have consistant manipulation of the irqflags.

Thanks,

-- 
Julien Thierry

WARNING: multiple messages have this Message-ID (diff)
From: Julien Thierry <julien.thierry@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: mark.rutland@arm.com, daniel.thompson@linaro.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	marc.zyngier@arm.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, christoffer.dall@arm.com,
	james.morse@arm.com, Oleg Nesterov <oleg@redhat.com>,
	joel@joelfernandes.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v9 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking
Date: Wed, 30 Jan 2019 11:52:58 +0000	[thread overview]
Message-ID: <8873213c-a667-567b-9df2-de11cdd3671a@arm.com> (raw)
In-Reply-To: <2eabb029-4efe-6829-7fb1-6174a2edb154@arm.com>



On 23/01/2019 10:44, Julien Thierry wrote:
> 
> 
> On 22/01/2019 15:21, Catalin Marinas wrote:
>> On Mon, Jan 21, 2019 at 03:33:31PM +0000, Julien Thierry wrote:
>>> diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
>>> index 24692ed..7e82a92 100644
>>> --- a/arch/arm64/include/asm/irqflags.h
>>> +++ b/arch/arm64/include/asm/irqflags.h
>>> @@ -18,7 +18,9 @@
>>>  
>>>  #ifdef __KERNEL__
>>>  
>>> +#include <asm/alternative.h>
>>>  #include <asm/ptrace.h>
>>> +#include <asm/sysreg.h>
>>>  
>>>  /*
>>>   * Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
>>> @@ -36,33 +38,31 @@
>>>  /*
>>>   * CPU interrupt mask handling.
>>>   */
>>> -static inline unsigned long arch_local_irq_save(void)
>>> -{
>>> -	unsigned long flags;
>>> -	asm volatile(
>>> -		"mrs	%0, daif		// arch_local_irq_save\n"
>>> -		"msr	daifset, #2"
>>> -		: "=r" (flags)
>>> -		:
>>> -		: "memory");
>>> -	return flags;
>>> -}
>>> -
>>>  static inline void arch_local_irq_enable(void)
>>>  {
>>> -	asm volatile(
>>> -		"msr	daifclr, #2		// arch_local_irq_enable"
>>> -		:
>>> +	unsigned long unmasked = GIC_PRIO_IRQON;
>>> +
>>> +	asm volatile(ALTERNATIVE(
>>> +		"msr	daifclr, #2		// arch_local_irq_enable\n"
>>> +		"nop",
>>> +		"msr_s  " __stringify(SYS_ICC_PMR_EL1) ",%0\n"
>>> +		"dsb	sy",
>>> +		ARM64_HAS_IRQ_PRIO_MASKING)
>>>  		:
>>> +		: "r" (unmasked)
>>>  		: "memory");
>>>  }
>>>  
>>>  static inline void arch_local_irq_disable(void)
>>>  {
>>> -	asm volatile(
>>> -		"msr	daifset, #2		// arch_local_irq_disable"
>>> -		:
>>> +	unsigned long masked = GIC_PRIO_IRQOFF;
>>> +
>>> +	asm volatile(ALTERNATIVE(
>>> +		"msr	daifset, #2		// arch_local_irq_disable",
>>> +		"msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0",
>>> +		ARM64_HAS_IRQ_PRIO_MASKING)
>>>  		:
>>> +		: "r" (masked)
>>>  		: "memory");
>>>  }
>>
>> Nitpicks: you could drop masked/unmasked variables here (it's up to you,
>> it wouldn't make any difference on the generated asm).
>>
> 
> Good point, I'll do that.
> 
>>> @@ -71,12 +71,44 @@ static inline void arch_local_irq_disable(void)
>>>   */
>>>  static inline unsigned long arch_local_save_flags(void)
>>>  {
>>> +	unsigned long daif_bits;
>>>  	unsigned long flags;
>>> -	asm volatile(
>>> -		"mrs	%0, daif		// arch_local_save_flags"
>>> -		: "=r" (flags)
>>> -		:
>>> +
>>> +	daif_bits = read_sysreg(daif);
>>> +
>>> +	/*
>>> +	 * The asm is logically equivalent to:
>>> +	 *
>>> +	 * if (system_uses_irq_prio_masking())
>>> +	 *	flags = (daif_bits & PSR_I_BIT) ?
>>> +	 *			GIC_PRIO_IRQOFF :
>>> +	 *			read_sysreg_s(SYS_ICC_PMR_EL1);
>>> +	 * else
>>> +	 *	flags = daif_bits;
>>> +	 */
>>> +	asm volatile(ALTERNATIVE(
>>> +			"mov	%0, %1\n"
>>> +			"nop\n"
>>> +			"nop",
>>> +			"mrs_s	%0, " __stringify(SYS_ICC_PMR_EL1) "\n"
>>> +			"ands	%1, %1, " __stringify(PSR_I_BIT) "\n"
>>> +			"csel	%0, %0, %2, eq",
>>> +			ARM64_HAS_IRQ_PRIO_MASKING)
>>> +		: "=&r" (flags), "+r" (daif_bits)
>>> +		: "r" (GIC_PRIO_IRQOFF)
>>>  		: "memory");
>>> +
>>> +	return flags;
>>> +}
>>
>> BTW, how's the code generated from the C version? It will have a branch
>> but may not be too bad. Either way is fine by me.
>>
> 
> It's a bit hard to talk about the code generated from the C version as
> it can lie within several layers of inline, so the instructions for that
> section are a bit more scattered.
> 
> However, it seems like the compiler is more clever (maybe the asm
> volatile prevents some optimizations regarding register allocation or
> instruction ordering) and the C version seems to perform slightly better
> (although it could be within the noise) despite the branch.
> 
> So, I'll just switch up to the C version.
> 

I remember a reason to stick to the asm version. There is a time
interval between the (early) CPU feature being enabled and the (early)
alternatives being applied.

For the early ones, interrupts remain disabled between CPU feature
enabling and alternative application. However, if you enable lockdep, it
will do some interrupts_disabled() checks which become
local_irqs_disabled_flags(local_save_flags()). If one is using the
alternative and the other the static branch, lockdep will emit a warning
about it.

So, I tried moving all irqflags functions but using the static branch
for arch_local_irq_restore() slows things down a bit, and I'm not sure
having arch_local_irq_save() use static branch while
arch_local_irq_restore() uses alternative makes much sense.

In the end, I'll stick to the ASM + alternative version to avoid the
lockdep issue and have consistant manipulation of the irqflags.

Thanks,

-- 
Julien Thierry

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-01-30 11:53 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-21 15:33 [PATCH v9 00/26] arm64: provide pseudo NMI with GICv3 Julien Thierry
2019-01-21 15:33 ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 01/26] arm64: Fix HCR.TGE status for NMI contexts Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-23 22:57   ` Sasha Levin
2019-01-23 22:57     ` Sasha Levin
2019-01-28 11:48   ` James Morse
2019-01-28 11:48     ` James Morse
2019-01-28 15:42     ` Julien Thierry
2019-01-28 15:42       ` Julien Thierry
2019-01-31  8:19       ` Christoffer Dall
2019-01-31  8:19         ` Christoffer Dall
2019-01-31  8:56         ` Julien Thierry
2019-01-31  8:56           ` Julien Thierry
2019-01-31  9:27           ` Christoffer Dall
2019-01-31  9:27             ` Christoffer Dall
2019-01-31  9:40             ` Julien Thierry
2019-01-31  9:40               ` Julien Thierry
2019-01-31  9:48               ` Christoffer Dall
2019-01-31  9:48                 ` Christoffer Dall
2019-01-31  9:53               ` Marc Zyngier
2019-01-31  9:53                 ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 02/26] arm64: Remove unused daif related functions/macros Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:21   ` Marc Zyngier
2019-01-28  9:21     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 03/26] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:22   ` Marc Zyngier
2019-01-28  9:22     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 04/26] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:24   ` Marc Zyngier
2019-01-28  9:24     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 05/26] arm/arm64: gic-v3: Add PMR and RPR accessors Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:25   ` Marc Zyngier
2019-01-28  9:25     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 06/26] irqchip/gic-v3: Switch to PMR masking before calling IRQ handler Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:30   ` Marc Zyngier
2019-01-28  9:30     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 07/26] arm64: ptrace: Provide definitions for PMR values Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:37   ` Marc Zyngier
2019-01-28  9:37     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 08/26] arm64: Make PMR part of task context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:42   ` Marc Zyngier
2019-01-28  9:42     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 09/26] arm64: Unmask PMR before going idle Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-22 15:23   ` Catalin Marinas
2019-01-22 15:23     ` Catalin Marinas
2019-01-22 20:18   ` Ard Biesheuvel
2019-01-22 20:18     ` Ard Biesheuvel
2019-01-23  8:56     ` Julien Thierry
2019-01-23  8:56       ` Julien Thierry
2019-01-23  9:38       ` Ard Biesheuvel
2019-01-23  9:38         ` Ard Biesheuvel
2019-01-28  9:44   ` Marc Zyngier
2019-01-28  9:44     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 10/26] arm64: kvm: Unmask PMR before entering guest Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:58   ` Marc Zyngier
2019-01-28  9:58     ` Marc Zyngier
2019-01-28  9:58     ` Marc Zyngier
2019-01-30 12:07   ` Christoffer Dall
2019-01-30 12:07     ` Christoffer Dall
2019-01-30 14:58     ` Julien Thierry
2019-01-30 14:58       ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 11/26] efi: Let architectures decide the flags that should be saved/restored Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-21 15:42   ` Ard Biesheuvel
2019-01-21 15:42     ` Ard Biesheuvel
2019-01-23  9:04     ` Julien Thierry
2019-01-23  9:04       ` Julien Thierry
2019-01-28 10:00   ` Marc Zyngier
2019-01-28 10:00     ` Marc Zyngier
2019-01-28 10:00     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-21 15:45   ` Ard Biesheuvel
2019-01-21 15:45     ` Ard Biesheuvel
2019-01-21 18:05     ` Julien Thierry
2019-01-21 18:05       ` Julien Thierry
2019-01-22 15:21   ` Catalin Marinas
2019-01-22 15:21     ` Catalin Marinas
2019-01-23 10:44     ` Julien Thierry
2019-01-23 10:44       ` Julien Thierry
2019-01-30 11:52       ` Julien Thierry [this message]
2019-01-30 11:52         ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 13/26] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 10:37   ` Marc Zyngier
2019-01-28 10:37     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 14/26] arm64: alternative: Allow alternative status checking per cpufeature Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:00   ` Marc Zyngier
2019-01-28 11:00     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 15/26] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:17   ` Marc Zyngier
2019-01-28 11:17     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 16/26] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:19   ` Marc Zyngier
2019-01-28 11:19     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 17/26] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:21   ` Marc Zyngier
2019-01-28 11:21     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 18/26] arm64: gic-v3: Implement arch support for priority masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:23   ` Marc Zyngier
2019-01-28 11:23     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 19/26] irqchip/gic-v3: Detect if GIC can support pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:39   ` Marc Zyngier
2019-01-28 11:39     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 20/26] irqchip/gic-v3: Handle pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:59   ` Marc Zyngier
2019-01-28 11:59     ` Marc Zyngier
2019-01-29 11:33     ` Julien Thierry
2019-01-29 11:33       ` Julien Thierry
2019-01-29 12:31       ` Marc Zyngier
2019-01-29 12:31         ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 21/26] irqchip/gic: Add functions to access irq priorities Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:04   ` Marc Zyngier
2019-01-28 12:04     ` Marc Zyngier
2019-01-29 11:36     ` Julien Thierry
2019-01-29 11:36       ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 22/26] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-26 10:19   ` liwei (GF)
2019-01-26 10:19     ` liwei (GF)
2019-01-26 10:41     ` Marc Zyngier
2019-01-26 10:41       ` Marc Zyngier
2019-01-28  8:57     ` Julien Thierry
2019-01-28  8:57       ` Julien Thierry
2019-01-28 13:59       ` liwei (GF)
2019-01-28 13:59         ` liwei (GF)
2019-01-28 14:49         ` Julien Thierry
2019-01-28 14:49           ` Julien Thierry
2019-01-28 12:08   ` Marc Zyngier
2019-01-28 12:08     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 23/26] arm64: Handle serror in NMI context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:26   ` Marc Zyngier
2019-01-28 12:26     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 24/26] arm64: Skip preemption when exiting an NMI Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:34   ` Marc Zyngier
2019-01-28 12:34     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 25/26] arm64: Skip irqflags tracing for NMI in IRQs disabled context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:40   ` Marc Zyngier
2019-01-28 12:40     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 26/26] arm64: Enable the support of pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:47   ` Marc Zyngier
2019-01-28 12:47     ` Marc Zyngier
2019-01-30 13:46     ` Julien Thierry
2019-01-30 13:46       ` Julien Thierry

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    --in-reply-to=8873213c-a667-567b-9df2-de11cdd3671a@arm.com \
    --to=julien.thierry@arm.com \
    --cc=ard.biesheuvel@linaro.org \
    --cc=catalin.marinas@arm.com \
    --cc=christoffer.dall@arm.com \
    --cc=daniel.thompson@linaro.org \
    --cc=james.morse@arm.com \
    --cc=joel@joelfernandes.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=oleg@redhat.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

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