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From: Julien Thierry <julien.thierry@arm.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Daniel Thompson <daniel.thompson@linaro.org>,
	Joel Fernandes <joel@joelfernandes.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	James Morse <james.morse@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Oleg Nesterov <oleg@redhat.com>
Subject: Re: [PATCH v9 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking
Date: Mon, 21 Jan 2019 18:05:31 +0000	[thread overview]
Message-ID: <35daeeda-c3fe-83bb-09ee-77480064c67d@arm.com> (raw)
In-Reply-To: <CAKv+Gu-m2KcbDNsM1AJZHOKrJkE5Ki=xX8qqUvFnDc=87-4OsA@mail.gmail.com>



On 21/01/2019 15:45, Ard Biesheuvel wrote:
> On Mon, 21 Jan 2019 at 16:34, Julien Thierry <julien.thierry@arm.com> wrote:
>>
>> Instead disabling interrupts by setting the PSR.I bit, use a priority
>> higher than the one used for interrupts to mask them via PMR.
>>
>> When using PMR to disable interrupts, the value of PMR will be used
>> instead of PSR.[DAIF] for the irqflags.
>>
>> Signed-off-by: Julien Thierry <julien.thierry@arm.com>
>> Suggested-by: Daniel Thompson <daniel.thompson@linaro.org>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will.deacon@arm.com>
>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Cc: Oleg Nesterov <oleg@redhat.com>
>> ---
>>  arch/arm64/include/asm/efi.h      |   6 +++
>>  arch/arm64/include/asm/irqflags.h | 104 ++++++++++++++++++++++++++++----------
>>  2 files changed, 82 insertions(+), 28 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/efi.h b/arch/arm64/include/asm/efi.h
>> index 7ed3208..3db6772 100644
>> --- a/arch/arm64/include/asm/efi.h
>> +++ b/arch/arm64/include/asm/efi.h
>> @@ -44,6 +44,12 @@
>>
>>  #define ARCH_EFI_IRQ_FLAGS_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
>>
>> +#define arch_efi_save_flags(state_flags)               \
>> +       ((void)((state_flags) = read_sysreg(daif)))
>> +
>> +#define arch_efi_restore_flags(state_flags)    write_sysreg(state_flags, daif)
>> +
>> +
>>  /* arch specific definitions used by the stub code */
>>
>>  /*
> 
> For the EFI changes
> 
> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Thanks!

> 
> although it deserves a comment as to why it is unaffected by
> ARM64_HAS_IRQ_PRIO_MASKING

So far we've relied on EFI not modifying PMR, otherwise we could've
ended up without any interrupts in Linux after coming back from an EFI
service.

Now, the ARM64_HAS_IRQ_PRIO_MASKING only modifies the behaviour of
Linux, but we should have the same expectations from EFI. If we want to
be paranoid we could save/restore PMR along with the DAIF flags.

But you're right, it is fair to add a comment clearly stating that we
expect EFI not to modify PMR. I'll include that in the next posting.

Thanks,

Julien

> 
> 
>> diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
>> index 24692ed..7e82a92 100644
>> --- a/arch/arm64/include/asm/irqflags.h
>> +++ b/arch/arm64/include/asm/irqflags.h
>> @@ -18,7 +18,9 @@
>>
>>  #ifdef __KERNEL__
>>
>> +#include <asm/alternative.h>
>>  #include <asm/ptrace.h>
>> +#include <asm/sysreg.h>
>>
>>  /*
>>   * Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
>> @@ -36,33 +38,31 @@
>>  /*
>>   * CPU interrupt mask handling.
>>   */
>> -static inline unsigned long arch_local_irq_save(void)
>> -{
>> -       unsigned long flags;
>> -       asm volatile(
>> -               "mrs    %0, daif                // arch_local_irq_save\n"
>> -               "msr    daifset, #2"
>> -               : "=r" (flags)
>> -               :
>> -               : "memory");
>> -       return flags;
>> -}
>> -
>>  static inline void arch_local_irq_enable(void)
>>  {
>> -       asm volatile(
>> -               "msr    daifclr, #2             // arch_local_irq_enable"
>> -               :
>> +       unsigned long unmasked = GIC_PRIO_IRQON;
>> +
>> +       asm volatile(ALTERNATIVE(
>> +               "msr    daifclr, #2             // arch_local_irq_enable\n"
>> +               "nop",
>> +               "msr_s  " __stringify(SYS_ICC_PMR_EL1) ",%0\n"
>> +               "dsb    sy",
>> +               ARM64_HAS_IRQ_PRIO_MASKING)
>>                 :
>> +               : "r" (unmasked)
>>                 : "memory");
>>  }
>>
>>  static inline void arch_local_irq_disable(void)
>>  {
>> -       asm volatile(
>> -               "msr    daifset, #2             // arch_local_irq_disable"
>> -               :
>> +       unsigned long masked = GIC_PRIO_IRQOFF;
>> +
>> +       asm volatile(ALTERNATIVE(
>> +               "msr    daifset, #2             // arch_local_irq_disable",
>> +               "msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0",
>> +               ARM64_HAS_IRQ_PRIO_MASKING)
>>                 :
>> +               : "r" (masked)
>>                 : "memory");
>>  }
>>
>> @@ -71,12 +71,44 @@ static inline void arch_local_irq_disable(void)
>>   */
>>  static inline unsigned long arch_local_save_flags(void)
>>  {
>> +       unsigned long daif_bits;
>>         unsigned long flags;
>> -       asm volatile(
>> -               "mrs    %0, daif                // arch_local_save_flags"
>> -               : "=r" (flags)
>> -               :
>> +
>> +       daif_bits = read_sysreg(daif);
>> +
>> +       /*
>> +        * The asm is logically equivalent to:
>> +        *
>> +        * if (system_uses_irq_prio_masking())
>> +        *      flags = (daif_bits & PSR_I_BIT) ?
>> +        *                      GIC_PRIO_IRQOFF :
>> +        *                      read_sysreg_s(SYS_ICC_PMR_EL1);
>> +        * else
>> +        *      flags = daif_bits;
>> +        */
>> +       asm volatile(ALTERNATIVE(
>> +                       "mov    %0, %1\n"
>> +                       "nop\n"
>> +                       "nop",
>> +                       "mrs_s  %0, " __stringify(SYS_ICC_PMR_EL1) "\n"
>> +                       "ands   %1, %1, " __stringify(PSR_I_BIT) "\n"
>> +                       "csel   %0, %0, %2, eq",
>> +                       ARM64_HAS_IRQ_PRIO_MASKING)
>> +               : "=&r" (flags), "+r" (daif_bits)
>> +               : "r" (GIC_PRIO_IRQOFF)
>>                 : "memory");
>> +
>> +       return flags;
>> +}
>> +
>> +static inline unsigned long arch_local_irq_save(void)
>> +{
>> +       unsigned long flags;
>> +
>> +       flags = arch_local_save_flags();
>> +
>> +       arch_local_irq_disable();
>> +
>>         return flags;
>>  }
>>
>> @@ -85,16 +117,32 @@ static inline unsigned long arch_local_save_flags(void)
>>   */
>>  static inline void arch_local_irq_restore(unsigned long flags)
>>  {
>> -       asm volatile(
>> -               "msr    daif, %0                // arch_local_irq_restore"
>> -       :
>> -       : "r" (flags)
>> -       : "memory");
>> +       asm volatile(ALTERNATIVE(
>> +                       "msr    daif, %0\n"
>> +                       "nop",
>> +                       "msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0\n"
>> +                       "dsb    sy",
>> +                       ARM64_HAS_IRQ_PRIO_MASKING)
>> +               : "+r" (flags)
>> +               :
>> +               : "memory");
>>  }
>>
>>  static inline int arch_irqs_disabled_flags(unsigned long flags)
>>  {
>> -       return flags & PSR_I_BIT;
>> +       int res;
>> +
>> +       asm volatile(ALTERNATIVE(
>> +                       "and    %w0, %w1, #" __stringify(PSR_I_BIT) "\n"
>> +                       "nop",
>> +                       "cmp    %w1, #" __stringify(GIC_PRIO_IRQOFF) "\n"
>> +                       "cset   %w0, ls",
>> +                       ARM64_HAS_IRQ_PRIO_MASKING)
>> +               : "=&r" (res)
>> +               : "r" ((int) flags)
>> +               : "memory");
>> +
>> +       return res;
>>  }
>>  #endif
>>  #endif
>> --
>> 1.9.1
>>

-- 
Julien Thierry

WARNING: multiple messages have this Message-ID (diff)
From: Julien Thierry <julien.thierry@arm.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Daniel Thompson <daniel.thompson@linaro.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Christoffer Dall <christoffer.dall@arm.com>,
	James Morse <james.morse@arm.com>,
	Oleg Nesterov <oleg@redhat.com>,
	Joel Fernandes <joel@joelfernandes.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v9 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking
Date: Mon, 21 Jan 2019 18:05:31 +0000	[thread overview]
Message-ID: <35daeeda-c3fe-83bb-09ee-77480064c67d@arm.com> (raw)
In-Reply-To: <CAKv+Gu-m2KcbDNsM1AJZHOKrJkE5Ki=xX8qqUvFnDc=87-4OsA@mail.gmail.com>



On 21/01/2019 15:45, Ard Biesheuvel wrote:
> On Mon, 21 Jan 2019 at 16:34, Julien Thierry <julien.thierry@arm.com> wrote:
>>
>> Instead disabling interrupts by setting the PSR.I bit, use a priority
>> higher than the one used for interrupts to mask them via PMR.
>>
>> When using PMR to disable interrupts, the value of PMR will be used
>> instead of PSR.[DAIF] for the irqflags.
>>
>> Signed-off-by: Julien Thierry <julien.thierry@arm.com>
>> Suggested-by: Daniel Thompson <daniel.thompson@linaro.org>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will.deacon@arm.com>
>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Cc: Oleg Nesterov <oleg@redhat.com>
>> ---
>>  arch/arm64/include/asm/efi.h      |   6 +++
>>  arch/arm64/include/asm/irqflags.h | 104 ++++++++++++++++++++++++++++----------
>>  2 files changed, 82 insertions(+), 28 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/efi.h b/arch/arm64/include/asm/efi.h
>> index 7ed3208..3db6772 100644
>> --- a/arch/arm64/include/asm/efi.h
>> +++ b/arch/arm64/include/asm/efi.h
>> @@ -44,6 +44,12 @@
>>
>>  #define ARCH_EFI_IRQ_FLAGS_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
>>
>> +#define arch_efi_save_flags(state_flags)               \
>> +       ((void)((state_flags) = read_sysreg(daif)))
>> +
>> +#define arch_efi_restore_flags(state_flags)    write_sysreg(state_flags, daif)
>> +
>> +
>>  /* arch specific definitions used by the stub code */
>>
>>  /*
> 
> For the EFI changes
> 
> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Thanks!

> 
> although it deserves a comment as to why it is unaffected by
> ARM64_HAS_IRQ_PRIO_MASKING

So far we've relied on EFI not modifying PMR, otherwise we could've
ended up without any interrupts in Linux after coming back from an EFI
service.

Now, the ARM64_HAS_IRQ_PRIO_MASKING only modifies the behaviour of
Linux, but we should have the same expectations from EFI. If we want to
be paranoid we could save/restore PMR along with the DAIF flags.

But you're right, it is fair to add a comment clearly stating that we
expect EFI not to modify PMR. I'll include that in the next posting.

Thanks,

Julien

> 
> 
>> diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
>> index 24692ed..7e82a92 100644
>> --- a/arch/arm64/include/asm/irqflags.h
>> +++ b/arch/arm64/include/asm/irqflags.h
>> @@ -18,7 +18,9 @@
>>
>>  #ifdef __KERNEL__
>>
>> +#include <asm/alternative.h>
>>  #include <asm/ptrace.h>
>> +#include <asm/sysreg.h>
>>
>>  /*
>>   * Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
>> @@ -36,33 +38,31 @@
>>  /*
>>   * CPU interrupt mask handling.
>>   */
>> -static inline unsigned long arch_local_irq_save(void)
>> -{
>> -       unsigned long flags;
>> -       asm volatile(
>> -               "mrs    %0, daif                // arch_local_irq_save\n"
>> -               "msr    daifset, #2"
>> -               : "=r" (flags)
>> -               :
>> -               : "memory");
>> -       return flags;
>> -}
>> -
>>  static inline void arch_local_irq_enable(void)
>>  {
>> -       asm volatile(
>> -               "msr    daifclr, #2             // arch_local_irq_enable"
>> -               :
>> +       unsigned long unmasked = GIC_PRIO_IRQON;
>> +
>> +       asm volatile(ALTERNATIVE(
>> +               "msr    daifclr, #2             // arch_local_irq_enable\n"
>> +               "nop",
>> +               "msr_s  " __stringify(SYS_ICC_PMR_EL1) ",%0\n"
>> +               "dsb    sy",
>> +               ARM64_HAS_IRQ_PRIO_MASKING)
>>                 :
>> +               : "r" (unmasked)
>>                 : "memory");
>>  }
>>
>>  static inline void arch_local_irq_disable(void)
>>  {
>> -       asm volatile(
>> -               "msr    daifset, #2             // arch_local_irq_disable"
>> -               :
>> +       unsigned long masked = GIC_PRIO_IRQOFF;
>> +
>> +       asm volatile(ALTERNATIVE(
>> +               "msr    daifset, #2             // arch_local_irq_disable",
>> +               "msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0",
>> +               ARM64_HAS_IRQ_PRIO_MASKING)
>>                 :
>> +               : "r" (masked)
>>                 : "memory");
>>  }
>>
>> @@ -71,12 +71,44 @@ static inline void arch_local_irq_disable(void)
>>   */
>>  static inline unsigned long arch_local_save_flags(void)
>>  {
>> +       unsigned long daif_bits;
>>         unsigned long flags;
>> -       asm volatile(
>> -               "mrs    %0, daif                // arch_local_save_flags"
>> -               : "=r" (flags)
>> -               :
>> +
>> +       daif_bits = read_sysreg(daif);
>> +
>> +       /*
>> +        * The asm is logically equivalent to:
>> +        *
>> +        * if (system_uses_irq_prio_masking())
>> +        *      flags = (daif_bits & PSR_I_BIT) ?
>> +        *                      GIC_PRIO_IRQOFF :
>> +        *                      read_sysreg_s(SYS_ICC_PMR_EL1);
>> +        * else
>> +        *      flags = daif_bits;
>> +        */
>> +       asm volatile(ALTERNATIVE(
>> +                       "mov    %0, %1\n"
>> +                       "nop\n"
>> +                       "nop",
>> +                       "mrs_s  %0, " __stringify(SYS_ICC_PMR_EL1) "\n"
>> +                       "ands   %1, %1, " __stringify(PSR_I_BIT) "\n"
>> +                       "csel   %0, %0, %2, eq",
>> +                       ARM64_HAS_IRQ_PRIO_MASKING)
>> +               : "=&r" (flags), "+r" (daif_bits)
>> +               : "r" (GIC_PRIO_IRQOFF)
>>                 : "memory");
>> +
>> +       return flags;
>> +}
>> +
>> +static inline unsigned long arch_local_irq_save(void)
>> +{
>> +       unsigned long flags;
>> +
>> +       flags = arch_local_save_flags();
>> +
>> +       arch_local_irq_disable();
>> +
>>         return flags;
>>  }
>>
>> @@ -85,16 +117,32 @@ static inline unsigned long arch_local_save_flags(void)
>>   */
>>  static inline void arch_local_irq_restore(unsigned long flags)
>>  {
>> -       asm volatile(
>> -               "msr    daif, %0                // arch_local_irq_restore"
>> -       :
>> -       : "r" (flags)
>> -       : "memory");
>> +       asm volatile(ALTERNATIVE(
>> +                       "msr    daif, %0\n"
>> +                       "nop",
>> +                       "msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0\n"
>> +                       "dsb    sy",
>> +                       ARM64_HAS_IRQ_PRIO_MASKING)
>> +               : "+r" (flags)
>> +               :
>> +               : "memory");
>>  }
>>
>>  static inline int arch_irqs_disabled_flags(unsigned long flags)
>>  {
>> -       return flags & PSR_I_BIT;
>> +       int res;
>> +
>> +       asm volatile(ALTERNATIVE(
>> +                       "and    %w0, %w1, #" __stringify(PSR_I_BIT) "\n"
>> +                       "nop",
>> +                       "cmp    %w1, #" __stringify(GIC_PRIO_IRQOFF) "\n"
>> +                       "cset   %w0, ls",
>> +                       ARM64_HAS_IRQ_PRIO_MASKING)
>> +               : "=&r" (res)
>> +               : "r" ((int) flags)
>> +               : "memory");
>> +
>> +       return res;
>>  }
>>  #endif
>>  #endif
>> --
>> 1.9.1
>>

-- 
Julien Thierry

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-01-21 18:05 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-21 15:33 [PATCH v9 00/26] arm64: provide pseudo NMI with GICv3 Julien Thierry
2019-01-21 15:33 ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 01/26] arm64: Fix HCR.TGE status for NMI contexts Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-23 22:57   ` Sasha Levin
2019-01-23 22:57     ` Sasha Levin
2019-01-28 11:48   ` James Morse
2019-01-28 11:48     ` James Morse
2019-01-28 15:42     ` Julien Thierry
2019-01-28 15:42       ` Julien Thierry
2019-01-31  8:19       ` Christoffer Dall
2019-01-31  8:19         ` Christoffer Dall
2019-01-31  8:56         ` Julien Thierry
2019-01-31  8:56           ` Julien Thierry
2019-01-31  9:27           ` Christoffer Dall
2019-01-31  9:27             ` Christoffer Dall
2019-01-31  9:40             ` Julien Thierry
2019-01-31  9:40               ` Julien Thierry
2019-01-31  9:48               ` Christoffer Dall
2019-01-31  9:48                 ` Christoffer Dall
2019-01-31  9:53               ` Marc Zyngier
2019-01-31  9:53                 ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 02/26] arm64: Remove unused daif related functions/macros Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:21   ` Marc Zyngier
2019-01-28  9:21     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 03/26] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:22   ` Marc Zyngier
2019-01-28  9:22     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 04/26] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:24   ` Marc Zyngier
2019-01-28  9:24     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 05/26] arm/arm64: gic-v3: Add PMR and RPR accessors Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:25   ` Marc Zyngier
2019-01-28  9:25     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 06/26] irqchip/gic-v3: Switch to PMR masking before calling IRQ handler Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:30   ` Marc Zyngier
2019-01-28  9:30     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 07/26] arm64: ptrace: Provide definitions for PMR values Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:37   ` Marc Zyngier
2019-01-28  9:37     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 08/26] arm64: Make PMR part of task context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:42   ` Marc Zyngier
2019-01-28  9:42     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 09/26] arm64: Unmask PMR before going idle Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-22 15:23   ` Catalin Marinas
2019-01-22 15:23     ` Catalin Marinas
2019-01-22 20:18   ` Ard Biesheuvel
2019-01-22 20:18     ` Ard Biesheuvel
2019-01-23  8:56     ` Julien Thierry
2019-01-23  8:56       ` Julien Thierry
2019-01-23  9:38       ` Ard Biesheuvel
2019-01-23  9:38         ` Ard Biesheuvel
2019-01-28  9:44   ` Marc Zyngier
2019-01-28  9:44     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 10/26] arm64: kvm: Unmask PMR before entering guest Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28  9:58   ` Marc Zyngier
2019-01-28  9:58     ` Marc Zyngier
2019-01-28  9:58     ` Marc Zyngier
2019-01-30 12:07   ` Christoffer Dall
2019-01-30 12:07     ` Christoffer Dall
2019-01-30 14:58     ` Julien Thierry
2019-01-30 14:58       ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 11/26] efi: Let architectures decide the flags that should be saved/restored Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-21 15:42   ` Ard Biesheuvel
2019-01-21 15:42     ` Ard Biesheuvel
2019-01-23  9:04     ` Julien Thierry
2019-01-23  9:04       ` Julien Thierry
2019-01-28 10:00   ` Marc Zyngier
2019-01-28 10:00     ` Marc Zyngier
2019-01-28 10:00     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 12/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-21 15:45   ` Ard Biesheuvel
2019-01-21 15:45     ` Ard Biesheuvel
2019-01-21 18:05     ` Julien Thierry [this message]
2019-01-21 18:05       ` Julien Thierry
2019-01-22 15:21   ` Catalin Marinas
2019-01-22 15:21     ` Catalin Marinas
2019-01-23 10:44     ` Julien Thierry
2019-01-23 10:44       ` Julien Thierry
2019-01-30 11:52       ` Julien Thierry
2019-01-30 11:52         ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 13/26] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 10:37   ` Marc Zyngier
2019-01-28 10:37     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 14/26] arm64: alternative: Allow alternative status checking per cpufeature Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:00   ` Marc Zyngier
2019-01-28 11:00     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 15/26] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:17   ` Marc Zyngier
2019-01-28 11:17     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 16/26] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:19   ` Marc Zyngier
2019-01-28 11:19     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 17/26] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:21   ` Marc Zyngier
2019-01-28 11:21     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 18/26] arm64: gic-v3: Implement arch support for priority masking Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:23   ` Marc Zyngier
2019-01-28 11:23     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 19/26] irqchip/gic-v3: Detect if GIC can support pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:39   ` Marc Zyngier
2019-01-28 11:39     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 20/26] irqchip/gic-v3: Handle pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 11:59   ` Marc Zyngier
2019-01-28 11:59     ` Marc Zyngier
2019-01-29 11:33     ` Julien Thierry
2019-01-29 11:33       ` Julien Thierry
2019-01-29 12:31       ` Marc Zyngier
2019-01-29 12:31         ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 21/26] irqchip/gic: Add functions to access irq priorities Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:04   ` Marc Zyngier
2019-01-28 12:04     ` Marc Zyngier
2019-01-29 11:36     ` Julien Thierry
2019-01-29 11:36       ` Julien Thierry
2019-01-21 15:33 ` [PATCH v9 22/26] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-26 10:19   ` liwei (GF)
2019-01-26 10:19     ` liwei (GF)
2019-01-26 10:41     ` Marc Zyngier
2019-01-26 10:41       ` Marc Zyngier
2019-01-28  8:57     ` Julien Thierry
2019-01-28  8:57       ` Julien Thierry
2019-01-28 13:59       ` liwei (GF)
2019-01-28 13:59         ` liwei (GF)
2019-01-28 14:49         ` Julien Thierry
2019-01-28 14:49           ` Julien Thierry
2019-01-28 12:08   ` Marc Zyngier
2019-01-28 12:08     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 23/26] arm64: Handle serror in NMI context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:26   ` Marc Zyngier
2019-01-28 12:26     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 24/26] arm64: Skip preemption when exiting an NMI Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:34   ` Marc Zyngier
2019-01-28 12:34     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 25/26] arm64: Skip irqflags tracing for NMI in IRQs disabled context Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:40   ` Marc Zyngier
2019-01-28 12:40     ` Marc Zyngier
2019-01-21 15:33 ` [PATCH v9 26/26] arm64: Enable the support of pseudo-NMIs Julien Thierry
2019-01-21 15:33   ` Julien Thierry
2019-01-28 12:47   ` Marc Zyngier
2019-01-28 12:47     ` Marc Zyngier
2019-01-30 13:46     ` Julien Thierry
2019-01-30 13:46       ` Julien Thierry

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