From: Guenter Roeck <linux@roeck-us.net>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
qemu-devel@nongnu.org, Arnd Bergmann <arnd.bergmann@linaro.org>
Subject: Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
Date: Mon, 12 Aug 2013 15:48:53 -0700 [thread overview]
Message-ID: <20130812224853.GA9580@roeck-us.net> (raw)
In-Reply-To: <20130812221250.GI23006@n2100.arm.linux.org.uk>
On Mon, Aug 12, 2013 at 11:12:50PM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 12, 2013 at 10:36:17PM +0100, Peter Maydell wrote:
> > On this point, yes. Equivalent bit from the PB926 TRM:
> > http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Cacdijji.html
> >
> > (There are differences between the PCI controllers on
> > the different boards. Differences I know of are:
> > * size of the three memory mapped regions
> > * whether the top bits of the PCI address come from the top
> > or bottom of the IMAP* registers
> > I believe (based on some experimentation and an educated guess)
> > that these both changed at the same point, but some of the board
> > TRMs claim to be part one way part the other, presumably due to
> > copy and paste error. In particular PB1176's TRM has a mangled
> > description of the IMAP* registers which didn't match what the
> > h/w actually did in my testing.)
>
> Bah, updated TRMs since my version.
>
> Right, so if I've traced everything correctly, this should work:
>
> /*
> * Slot INTA INTB INTC INTD
> * 31 PCI1 PCI2 PCI3 PCI0
> * 30 PCI0 PCI1 PCI2 PCI3
> * 29 PCI3 PCI0 PCI1 PCI2
> */
> return IRQ_SIC_PCI0 + ((slot + 2 + pin - 1) & 3);
>
Assuming this is what you mean, I added the above code to
versatile_map_irq(). It does not work, unfortunately, at least not
in qemu 1.4.0.
This is what the kernel reports for interrupt numbers:
kernel irq result
--------------------------------------
3.10.6: 92 fails
3.10.6+above change: 94 fails
3.10.6+Paul's patch: 91 works
Now is this a qemu problem or a kernel problem ?
Thanks,
Guenter
WARNING: multiple messages have this Message-ID (diff)
From: Guenter Roeck <linux@roeck-us.net>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-devel@nongnu.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Arnd Bergmann <arnd.bergmann@linaro.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
Date: Mon, 12 Aug 2013 15:48:53 -0700 [thread overview]
Message-ID: <20130812224853.GA9580@roeck-us.net> (raw)
In-Reply-To: <20130812221250.GI23006@n2100.arm.linux.org.uk>
On Mon, Aug 12, 2013 at 11:12:50PM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 12, 2013 at 10:36:17PM +0100, Peter Maydell wrote:
> > On this point, yes. Equivalent bit from the PB926 TRM:
> > http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Cacdijji.html
> >
> > (There are differences between the PCI controllers on
> > the different boards. Differences I know of are:
> > * size of the three memory mapped regions
> > * whether the top bits of the PCI address come from the top
> > or bottom of the IMAP* registers
> > I believe (based on some experimentation and an educated guess)
> > that these both changed at the same point, but some of the board
> > TRMs claim to be part one way part the other, presumably due to
> > copy and paste error. In particular PB1176's TRM has a mangled
> > description of the IMAP* registers which didn't match what the
> > h/w actually did in my testing.)
>
> Bah, updated TRMs since my version.
>
> Right, so if I've traced everything correctly, this should work:
>
> /*
> * Slot INTA INTB INTC INTD
> * 31 PCI1 PCI2 PCI3 PCI0
> * 30 PCI0 PCI1 PCI2 PCI3
> * 29 PCI3 PCI0 PCI1 PCI2
> */
> return IRQ_SIC_PCI0 + ((slot + 2 + pin - 1) & 3);
>
Assuming this is what you mean, I added the above code to
versatile_map_irq(). It does not work, unfortunately, at least not
in qemu 1.4.0.
This is what the kernel reports for interrupt numbers:
kernel irq result
--------------------------------------
3.10.6: 92 fails
3.10.6+above change: 94 fails
3.10.6+Paul's patch: 91 works
Now is this a qemu problem or a kernel problem ?
Thanks,
Guenter
WARNING: multiple messages have this Message-ID (diff)
From: linux@roeck-us.net (Guenter Roeck)
To: linux-arm-kernel@lists.infradead.org
Subject: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
Date: Mon, 12 Aug 2013 15:48:53 -0700 [thread overview]
Message-ID: <20130812224853.GA9580@roeck-us.net> (raw)
In-Reply-To: <20130812221250.GI23006@n2100.arm.linux.org.uk>
On Mon, Aug 12, 2013 at 11:12:50PM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 12, 2013 at 10:36:17PM +0100, Peter Maydell wrote:
> > On this point, yes. Equivalent bit from the PB926 TRM:
> > http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Cacdijji.html
> >
> > (There are differences between the PCI controllers on
> > the different boards. Differences I know of are:
> > * size of the three memory mapped regions
> > * whether the top bits of the PCI address come from the top
> > or bottom of the IMAP* registers
> > I believe (based on some experimentation and an educated guess)
> > that these both changed at the same point, but some of the board
> > TRMs claim to be part one way part the other, presumably due to
> > copy and paste error. In particular PB1176's TRM has a mangled
> > description of the IMAP* registers which didn't match what the
> > h/w actually did in my testing.)
>
> Bah, updated TRMs since my version.
>
> Right, so if I've traced everything correctly, this should work:
>
> /*
> * Slot INTA INTB INTC INTD
> * 31 PCI1 PCI2 PCI3 PCI0
> * 30 PCI0 PCI1 PCI2 PCI3
> * 29 PCI3 PCI0 PCI1 PCI2
> */
> return IRQ_SIC_PCI0 + ((slot + 2 + pin - 1) & 3);
>
Assuming this is what you mean, I added the above code to
versatile_map_irq(). It does not work, unfortunately, at least not
in qemu 1.4.0.
This is what the kernel reports for interrupt numbers:
kernel irq result
--------------------------------------
3.10.6: 92 fails
3.10.6+above change: 94 fails
3.10.6+Paul's patch: 91 works
Now is this a qemu problem or a kernel problem ?
Thanks,
Guenter
next prev parent reply other threads:[~2013-08-12 22:48 UTC|newest]
Thread overview: 104+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-11 15:54 SCSI bus failures with qemu-arm in kernel 3.8+ Guenter Roeck
2013-08-11 15:54 ` Guenter Roeck
2013-08-11 22:04 ` Russell King - ARM Linux
2013-08-11 22:04 ` Russell King - ARM Linux
2013-08-12 0:40 ` Guenter Roeck
2013-08-12 0:40 ` Guenter Roeck
2013-08-12 0:40 ` [Qemu-devel] " Guenter Roeck
2013-08-12 16:24 ` Peter Maydell
2013-08-12 16:24 ` Peter Maydell
2013-08-12 16:24 ` Peter Maydell
2013-08-12 16:45 ` Russell King - ARM Linux
2013-08-12 16:45 ` Russell King - ARM Linux
2013-08-12 16:45 ` Russell King - ARM Linux
2013-08-12 17:33 ` Peter Maydell
2013-08-12 17:33 ` Peter Maydell
2013-08-12 17:33 ` Peter Maydell
2013-08-12 20:06 ` Russell King - ARM Linux
2013-08-12 20:06 ` Russell King - ARM Linux
2013-08-12 20:06 ` Russell King - ARM Linux
2013-08-12 20:49 ` Peter Maydell
2013-08-12 20:49 ` Peter Maydell
2013-08-12 20:49 ` Peter Maydell
2013-08-12 21:21 ` Russell King - ARM Linux
2013-08-12 21:21 ` Russell King - ARM Linux
2013-08-12 21:21 ` Russell King - ARM Linux
2013-08-12 21:36 ` Peter Maydell
2013-08-12 21:36 ` Peter Maydell
2013-08-12 21:36 ` Peter Maydell
2013-08-12 22:12 ` Russell King - ARM Linux
2013-08-12 22:12 ` Russell King - ARM Linux
2013-08-12 22:12 ` Russell King - ARM Linux
2013-08-12 22:48 ` Guenter Roeck [this message]
2013-08-12 22:48 ` Guenter Roeck
2013-08-12 22:48 ` Guenter Roeck
2013-08-12 23:04 ` Guenter Roeck
2013-08-12 23:04 ` Guenter Roeck
2013-08-12 23:04 ` Guenter Roeck
2013-08-14 10:33 ` Russell King - ARM Linux
2013-08-14 10:33 ` Russell King - ARM Linux
2013-08-14 10:33 ` Russell King - ARM Linux
2013-08-14 12:44 ` Peter Maydell
2013-08-14 12:44 ` Peter Maydell
2013-08-14 12:44 ` Peter Maydell
2013-08-14 12:49 ` Russell King - ARM Linux
2013-08-14 12:49 ` Russell King - ARM Linux
2013-08-14 12:49 ` Russell King - ARM Linux
2013-08-14 12:56 ` Peter Maydell
2013-08-14 12:56 ` Peter Maydell
2013-08-14 12:56 ` Peter Maydell
2013-08-14 14:41 ` Guenter Roeck
2013-08-14 14:41 ` Guenter Roeck
2013-08-14 14:41 ` Guenter Roeck
2013-08-14 15:26 ` [Qemu-devel] memory reads and writes Herbei Dacian
2013-08-12 17:48 ` [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+ Peter Maydell
2013-08-12 17:48 ` Peter Maydell
2013-08-12 17:48 ` Peter Maydell
2013-08-13 8:37 ` Rob Landley
2013-08-13 8:37 ` Rob Landley
2013-08-13 8:37 ` Rob Landley
2013-08-13 9:12 ` Peter Maydell
2013-08-13 9:12 ` Peter Maydell
2013-08-13 9:12 ` Peter Maydell
2013-08-13 11:30 ` Russell King - ARM Linux
2013-08-13 11:30 ` Russell King - ARM Linux
2013-08-13 11:30 ` Russell King - ARM Linux
2013-08-13 3:40 ` Guenter Roeck
2013-08-13 3:40 ` Guenter Roeck
2013-08-13 3:40 ` Guenter Roeck
2013-08-15 16:45 ` Peter Maydell
2013-08-15 16:45 ` Peter Maydell
2013-08-15 16:45 ` Peter Maydell
2013-08-15 17:54 ` Guenter Roeck
2013-08-15 17:54 ` Guenter Roeck
2013-08-15 17:54 ` Guenter Roeck
2013-08-15 18:05 ` Peter Maydell
2013-08-15 18:05 ` Peter Maydell
2013-08-15 18:05 ` Peter Maydell
2013-08-15 18:39 ` Guenter Roeck
2013-08-15 18:39 ` Guenter Roeck
2013-08-15 18:39 ` Guenter Roeck
2013-08-15 20:50 ` Guenter Roeck
2013-08-15 20:50 ` Guenter Roeck
2013-08-15 20:50 ` Guenter Roeck
2013-08-15 21:49 ` Peter Maydell
2013-08-15 21:49 ` Peter Maydell
2013-08-15 21:49 ` Peter Maydell
2013-08-15 22:18 ` Guenter Roeck
2013-08-15 22:18 ` Guenter Roeck
2013-08-15 22:18 ` Guenter Roeck
2013-08-15 22:23 ` Peter Maydell
2013-08-15 22:23 ` Peter Maydell
2013-08-15 22:23 ` Peter Maydell
2013-08-15 23:25 ` Guenter Roeck
2013-08-15 23:25 ` Guenter Roeck
2013-08-15 23:25 ` Guenter Roeck
2013-08-19 15:26 ` Guenter Roeck
2013-08-19 15:26 ` Guenter Roeck
2013-08-19 15:26 ` Guenter Roeck
2013-08-12 19:02 ` Paul Gortmaker
2013-08-12 19:02 ` Paul Gortmaker
2013-08-12 19:02 ` [Qemu-devel] " Paul Gortmaker
2013-08-12 20:58 ` Peter Maydell
2013-08-12 20:58 ` Peter Maydell
2013-08-12 20:58 ` [Qemu-devel] " Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130812224853.GA9580@roeck-us.net \
--to=linux@roeck-us.net \
--cc=arnd.bergmann@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=paul.gortmaker@windriver.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.