From: Boris Brezillon <boris.brezillon@bootlin.com> To: Peter Rosin <peda@axentia.se> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>, Josh Wu <rainyfeeling@outlook.com>, Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>, linux-kernel@vger.kernel.org, Nicolas Ferre <nicolas.ferre@microchip.com>, Marek Vasut <marek.vasut@gmail.com>, linux-mtd@lists.infradead.org, Richard Weinberger <richard@nod.at>, Brian Norris <computersforpeace@gmail.com>, David Woodhouse <dwmw2@infradead.org>, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Date: Mon, 2 Apr 2018 21:28:43 +0200 [thread overview] Message-ID: <20180402212843.164d5d21@bbrezillon> (raw) In-Reply-To: <e0d9bd59-8031-e387-676e-dc5811170a0c@axentia.se> On Mon, 2 Apr 2018 19:59:39 +0200 Peter Rosin <peda@axentia.se> wrote: > On 2018-04-02 14:22, Boris Brezillon wrote: > > On Thu, 29 Mar 2018 16:27:12 +0200 > > Peter Rosin <peda@axentia.se> wrote: > > > >> On 2018-03-29 15:44, Boris Brezillon wrote: > >>> On Thu, 29 Mar 2018 15:37:43 +0200 > >>> Peter Rosin <peda@axentia.se> wrote: > >>> > >>>> On 2018-03-29 15:33, Boris Brezillon wrote: > >>>>> On Thu, 29 Mar 2018 15:10:54 +0200 > >>>>> Peter Rosin <peda@axentia.se> wrote: > >>>>> > >>>>>> On a sama5d31 with a Full-HD dual LVDS panel (132MHz pixel clock) NAND > >>>>>> flash accesses have a tendency to cause display disturbances. Add a > >>>>>> module param to disable DMA from the NAND controller, since that fixes > >>>>>> the display problem for me. > >>>>>> > >>>>>> Signed-off-by: Peter Rosin <peda@axentia.se> > >>>>>> --- > >>>>>> drivers/mtd/nand/raw/atmel/nand-controller.c | 7 ++++++- > >>>>>> 1 file changed, 6 insertions(+), 1 deletion(-) > >>>>>> > >>>>>> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>>>> index b2f00b398490..2ff7a77c7b8e 100644 > >>>>>> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>>>> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>>>> @@ -129,6 +129,11 @@ > >>>>>> #define DEFAULT_TIMEOUT_MS 1000 > >>>>>> #define MIN_DMA_LEN 128 > >>>>>> > >>>>>> +static bool atmel_nand_avoid_dma __read_mostly; > >>>>>> + > >>>>>> +MODULE_PARM_DESC(avoiddma, "Avoid using DMA"); > >>>>>> +module_param_named(avoiddma, atmel_nand_avoid_dma, bool, 0400); > >>>>> > >>>>> I'm not a big fan of those driver specific cmdline parameters. Can't we > >>>>> instead give an higher priority to HLCDC master using the bus matrix? > >>>> > >>>> I don't know if it will be enough, but we sure can try. However, I have > >>>> no idea how to do that. I will happily test stuff though... > >>> > >>> There's no interface to configure that from Linux, but you can try to > >>> tweak it with devmem and if that does the trick, maybe we can expose a > >>> way to configure that from Linux. For more details, see the "Bus Matrix > >>> (MATRIX)" section in Atmel datasheets. > >> > >> I don't seem to succeed in changing the registers I think I need to change. > >> I can poke the "Write Protection Mode Register" by writing MAT0 and MAT1 to > >> it. > > > > You mean 0x4D415400, right? ("MAT0" != 0x4D415400). > > Bits 1 through 7 do not matter, so even though not equal they are (or > should be) equivalent. But I did use 0x4d415400. I simply used the > shorter syntax since that was easier to type and conveyed the relevant > info. Ok. > > >> But when I try to write to "Priority Registers B For Slaves" it doesn't > >> take, regardless of write protect mode. > > > > Did you check MATRIX_WPSR after writing to MATRIX_PRXSY? > > No, but did it again and checked, see transcript below. I don't use devmem2. Is 'readback' information accurate or is it always what's been written? Because when you write 0x33 to 0xFFFFECBC, 0x33 is read back, but just after that, when you read it again it's 0. > BTW, how do I > know which master is in use for the LCD controller? 8 or 9? Both? It's configurable on a per-layer basis through the SIF bit in LCDC_<layer>CFG0. The driver tries to dispatch the load on those 2 AHB masters [1]. > And > which DDR slave is the target? 7, 8, 9 or 10? More than one? This, I don't know. I guess all of them can be used. > > Cheers, > Peter > > # devmem2 0xffffede4 w > /dev/mem opened. > Memory mapped at address 0xb6f50000. > Value at address 0xFFFFEDE4 (0xb6f50de4): 0x0 > # devmem2 0xffffede4 w 0x4d415401 > /dev/mem opened. > Memory mapped at address 0xb6f0d000. > Value at address 0xFFFFEDE4 (0xb6f0dde4): 0x0 > Written 0x4D415401; readback 0x4D415401 > # devmem2 0xffffede4 w > /dev/mem opened. > Memory mapped at address 0xb6f55000. > Value at address 0xFFFFEDE4 (0xb6f55de4): 0x1 > # devmem2 0xffffede4 w 0x4d415400 > /dev/mem opened. > Memory mapped at address 0xb6fb5000. > Value at address 0xFFFFEDE4 (0xb6fb5de4): 0x1 > Written 0x4D415400; readback 0x4D415400 > # devmem2 0xffffede4 w > /dev/mem opened. > Memory mapped at address 0xb6fef000. > Value at address 0xFFFFEDE4 (0xb6fefde4): 0x0 > > > # devmem2 0xffffede8 w > /dev/mem opened. > Memory mapped at address 0xb6fe9000. > Value at address 0xFFFFEDE8 (0xb6fe9de8): 0x0 > > > # devmem2 0xffffecbc w > /dev/mem opened. > Memory mapped at address 0xb6ff0000. > Value at address 0xFFFFECBC (0xb6ff0cbc): 0x0 > # devmem2 0xffffecbc w 0x33 > /dev/mem opened. > Memory mapped at address 0xb6f79000. > Value at address 0xFFFFECBC (0xb6f79cbc): 0x0 > Written 0x33; readback 0x33 > # devmem2 0xffffecbc w > /dev/mem opened. > Memory mapped at address 0xb6efe000. > Value at address 0xFFFFECBC (0xb6efecbc): 0x0 > > > # devmem2 0xffffede8 w > /dev/mem opened. > Memory mapped at address 0xb6f9e000. > Value at address 0xFFFFEDE8 (0xb6f9ede8): 0x0 > [1]https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c#L498 -- Boris Brezillon, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@bootlin.com (Boris Brezillon) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Date: Mon, 2 Apr 2018 21:28:43 +0200 [thread overview] Message-ID: <20180402212843.164d5d21@bbrezillon> (raw) In-Reply-To: <e0d9bd59-8031-e387-676e-dc5811170a0c@axentia.se> On Mon, 2 Apr 2018 19:59:39 +0200 Peter Rosin <peda@axentia.se> wrote: > On 2018-04-02 14:22, Boris Brezillon wrote: > > On Thu, 29 Mar 2018 16:27:12 +0200 > > Peter Rosin <peda@axentia.se> wrote: > > > >> On 2018-03-29 15:44, Boris Brezillon wrote: > >>> On Thu, 29 Mar 2018 15:37:43 +0200 > >>> Peter Rosin <peda@axentia.se> wrote: > >>> > >>>> On 2018-03-29 15:33, Boris Brezillon wrote: > >>>>> On Thu, 29 Mar 2018 15:10:54 +0200 > >>>>> Peter Rosin <peda@axentia.se> wrote: > >>>>> > >>>>>> On a sama5d31 with a Full-HD dual LVDS panel (132MHz pixel clock) NAND > >>>>>> flash accesses have a tendency to cause display disturbances. Add a > >>>>>> module param to disable DMA from the NAND controller, since that fixes > >>>>>> the display problem for me. > >>>>>> > >>>>>> Signed-off-by: Peter Rosin <peda@axentia.se> > >>>>>> --- > >>>>>> drivers/mtd/nand/raw/atmel/nand-controller.c | 7 ++++++- > >>>>>> 1 file changed, 6 insertions(+), 1 deletion(-) > >>>>>> > >>>>>> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>>>> index b2f00b398490..2ff7a77c7b8e 100644 > >>>>>> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>>>> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>>>> @@ -129,6 +129,11 @@ > >>>>>> #define DEFAULT_TIMEOUT_MS 1000 > >>>>>> #define MIN_DMA_LEN 128 > >>>>>> > >>>>>> +static bool atmel_nand_avoid_dma __read_mostly; > >>>>>> + > >>>>>> +MODULE_PARM_DESC(avoiddma, "Avoid using DMA"); > >>>>>> +module_param_named(avoiddma, atmel_nand_avoid_dma, bool, 0400); > >>>>> > >>>>> I'm not a big fan of those driver specific cmdline parameters. Can't we > >>>>> instead give an higher priority to HLCDC master using the bus matrix? > >>>> > >>>> I don't know if it will be enough, but we sure can try. However, I have > >>>> no idea how to do that. I will happily test stuff though... > >>> > >>> There's no interface to configure that from Linux, but you can try to > >>> tweak it with devmem and if that does the trick, maybe we can expose a > >>> way to configure that from Linux. For more details, see the "Bus Matrix > >>> (MATRIX)" section in Atmel datasheets. > >> > >> I don't seem to succeed in changing the registers I think I need to change. > >> I can poke the "Write Protection Mode Register" by writing MAT0 and MAT1 to > >> it. > > > > You mean 0x4D415400, right? ("MAT0" != 0x4D415400). > > Bits 1 through 7 do not matter, so even though not equal they are (or > should be) equivalent. But I did use 0x4d415400. I simply used the > shorter syntax since that was easier to type and conveyed the relevant > info. Ok. > > >> But when I try to write to "Priority Registers B For Slaves" it doesn't > >> take, regardless of write protect mode. > > > > Did you check MATRIX_WPSR after writing to MATRIX_PRXSY? > > No, but did it again and checked, see transcript below. I don't use devmem2. Is 'readback' information accurate or is it always what's been written? Because when you write 0x33 to 0xFFFFECBC, 0x33 is read back, but just after that, when you read it again it's 0. > BTW, how do I > know which master is in use for the LCD controller? 8 or 9? Both? It's configurable on a per-layer basis through the SIF bit in LCDC_<layer>CFG0. The driver tries to dispatch the load on those 2 AHB masters [1]. > And > which DDR slave is the target? 7, 8, 9 or 10? More than one? This, I don't know. I guess all of them can be used. > > Cheers, > Peter > > # devmem2 0xffffede4 w > /dev/mem opened. > Memory mapped at address 0xb6f50000. > Value at address 0xFFFFEDE4 (0xb6f50de4): 0x0 > # devmem2 0xffffede4 w 0x4d415401 > /dev/mem opened. > Memory mapped at address 0xb6f0d000. > Value at address 0xFFFFEDE4 (0xb6f0dde4): 0x0 > Written 0x4D415401; readback 0x4D415401 > # devmem2 0xffffede4 w > /dev/mem opened. > Memory mapped at address 0xb6f55000. > Value at address 0xFFFFEDE4 (0xb6f55de4): 0x1 > # devmem2 0xffffede4 w 0x4d415400 > /dev/mem opened. > Memory mapped at address 0xb6fb5000. > Value at address 0xFFFFEDE4 (0xb6fb5de4): 0x1 > Written 0x4D415400; readback 0x4D415400 > # devmem2 0xffffede4 w > /dev/mem opened. > Memory mapped at address 0xb6fef000. > Value at address 0xFFFFEDE4 (0xb6fefde4): 0x0 > > > # devmem2 0xffffede8 w > /dev/mem opened. > Memory mapped at address 0xb6fe9000. > Value at address 0xFFFFEDE8 (0xb6fe9de8): 0x0 > > > # devmem2 0xffffecbc w > /dev/mem opened. > Memory mapped at address 0xb6ff0000. > Value at address 0xFFFFECBC (0xb6ff0cbc): 0x0 > # devmem2 0xffffecbc w 0x33 > /dev/mem opened. > Memory mapped at address 0xb6f79000. > Value at address 0xFFFFECBC (0xb6f79cbc): 0x0 > Written 0x33; readback 0x33 > # devmem2 0xffffecbc w > /dev/mem opened. > Memory mapped at address 0xb6efe000. > Value at address 0xFFFFECBC (0xb6efecbc): 0x0 > > > # devmem2 0xffffede8 w > /dev/mem opened. > Memory mapped at address 0xb6f9e000. > Value at address 0xFFFFEDE8 (0xb6f9ede8): 0x0 > [1]https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c#L498 -- Boris Brezillon, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com
next prev parent reply other threads:[~2018-04-02 19:28 UTC|newest] Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-03-29 13:10 [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Peter Rosin 2018-03-29 13:10 ` Peter Rosin 2018-03-29 13:33 ` Boris Brezillon 2018-03-29 13:33 ` Boris Brezillon 2018-03-29 13:37 ` Peter Rosin 2018-03-29 13:37 ` Peter Rosin 2018-03-29 13:44 ` Boris Brezillon 2018-03-29 13:44 ` Boris Brezillon 2018-03-29 14:27 ` Peter Rosin 2018-03-29 14:27 ` Peter Rosin 2018-03-30 21:43 ` Peter Rosin 2018-03-30 21:43 ` Peter Rosin 2018-04-02 12:22 ` Boris Brezillon 2018-04-02 12:22 ` Boris Brezillon 2018-04-02 17:59 ` Peter Rosin 2018-04-02 17:59 ` Peter Rosin 2018-04-02 19:28 ` Boris Brezillon [this message] 2018-04-02 19:28 ` Boris Brezillon 2018-04-02 20:20 ` Boris Brezillon 2018-04-02 20:20 ` Boris Brezillon 2018-04-02 20:32 ` Boris Brezillon 2018-04-02 20:32 ` Boris Brezillon 2018-04-03 6:11 ` Peter Rosin 2018-04-03 6:11 ` Peter Rosin 2018-04-03 7:18 ` Boris Brezillon 2018-04-03 7:18 ` Boris Brezillon 2018-04-11 14:44 ` Peter Rosin 2018-04-11 14:44 ` Peter Rosin 2018-04-11 14:59 ` Boris Brezillon 2018-04-11 14:59 ` Boris Brezillon 2018-04-11 15:10 ` Peter Rosin 2018-04-11 15:10 ` Peter Rosin 2018-04-11 15:34 ` Boris Brezillon 2018-04-11 15:34 ` Boris Brezillon 2018-04-11 15:34 ` Nicolas Ferre 2018-04-11 15:34 ` Nicolas Ferre 2018-04-12 7:18 ` Peter Rosin 2018-04-12 7:18 ` Peter Rosin 2018-05-22 18:03 ` Peter Rosin 2018-05-22 18:03 ` Peter Rosin 2018-05-23 10:42 ` Boris Brezillon 2018-05-23 10:42 ` Boris Brezillon 2018-05-25 14:51 ` Tudor Ambarus 2018-05-25 14:51 ` Tudor Ambarus 2018-05-26 17:40 ` Peter Rosin 2018-05-26 17:40 ` Peter Rosin 2018-05-27 9:18 ` Peter Rosin 2018-05-27 9:18 ` Peter Rosin 2018-05-27 22:11 ` Peter Rosin 2018-05-27 22:11 ` Peter Rosin 2018-05-28 10:10 ` Peter Rosin 2018-05-28 10:10 ` Peter Rosin 2018-05-28 14:27 ` Boris Brezillon 2018-05-28 14:27 ` Boris Brezillon 2018-05-28 15:52 ` Peter Rosin 2018-05-28 15:52 ` Peter Rosin 2018-05-28 16:09 ` Boris Brezillon 2018-05-28 16:09 ` Boris Brezillon 2018-05-28 16:09 ` Nicolas Ferre 2018-05-28 16:09 ` Nicolas Ferre 2018-05-29 6:30 ` Eugen Hristev 2018-05-29 6:30 ` Eugen Hristev 2018-05-29 7:10 ` Peter Rosin 2018-05-29 7:10 ` Peter Rosin 2018-05-29 7:25 ` Eugen Hristev 2018-05-29 7:25 ` Eugen Hristev 2018-05-29 14:49 ` Boris Brezillon 2018-05-29 14:49 ` Boris Brezillon 2018-05-29 15:01 ` Eugen Hristev 2018-05-29 15:01 ` Eugen Hristev 2018-05-29 15:15 ` Boris Brezillon 2018-05-29 15:15 ` Boris Brezillon 2018-05-29 15:21 ` Eugen Hristev 2018-05-29 15:21 ` Eugen Hristev 2018-05-29 15:46 ` Boris Brezillon 2018-05-29 15:46 ` Boris Brezillon 2018-05-29 17:57 ` Boris Brezillon 2018-05-29 17:57 ` Boris Brezillon 2018-05-29 21:37 ` Peter Rosin 2018-05-29 21:37 ` Peter Rosin 2018-06-04 15:46 ` Tudor Ambarus 2018-06-04 15:46 ` Tudor Ambarus 2018-06-04 16:03 ` Boris Brezillon 2018-06-04 16:03 ` Boris Brezillon 2022-06-16 15:54 ` SAMA5D3 Display FIFO underflow (Was: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma) Ahmad Fatoum 2022-07-25 14:17 ` Ahmad Fatoum 2022-07-28 8:03 ` Tudor.Ambarus 2018-04-03 6:51 ` [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Peter Rosin 2018-04-03 6:51 ` Peter Rosin 2018-04-03 7:15 ` Boris Brezillon 2018-04-03 7:15 ` Boris Brezillon 2018-04-03 7:32 ` Boris Brezillon 2018-04-03 7:32 ` Boris Brezillon 2018-04-03 8:14 ` Peter Rosin 2018-04-03 8:14 ` Peter Rosin 2018-04-03 8:30 ` Boris Brezillon 2018-04-03 8:30 ` Boris Brezillon 2018-04-02 20:23 ` Peter Rosin 2018-04-02 20:23 ` Peter Rosin 2018-04-02 20:35 ` Boris Brezillon 2018-04-02 20:35 ` Boris Brezillon 2018-04-03 7:18 ` Alexandre Belloni 2018-04-03 7:18 ` Alexandre Belloni 2018-04-03 8:37 ` Peter Rosin 2018-04-03 8:37 ` Peter Rosin 2018-03-29 14:20 ` Nicolas Ferre 2018-03-29 14:20 ` Nicolas Ferre 2018-03-29 14:23 ` Peter Rosin 2018-03-29 14:23 ` Peter Rosin 2018-03-29 14:29 ` Boris Brezillon 2018-03-29 14:29 ` Boris Brezillon 2018-06-18 8:39 ` Boris Brezillon 2018-06-18 8:39 ` Boris Brezillon 2018-06-18 14:00 ` Miquel Raynal 2018-06-18 14:00 ` Miquel Raynal 2018-06-25 12:31 ` Miquel Raynal 2018-06-25 12:31 ` Miquel Raynal
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20180402212843.164d5d21@bbrezillon \ --to=boris.brezillon@bootlin.com \ --cc=alexandre.belloni@bootlin.com \ --cc=computersforpeace@gmail.com \ --cc=cyrille.pitchen@wedev4u.fr \ --cc=dwmw2@infradead.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mtd@lists.infradead.org \ --cc=marek.vasut@gmail.com \ --cc=nicolas.ferre@microchip.com \ --cc=peda@axentia.se \ --cc=rainyfeeling@outlook.com \ --cc=richard@nod.at \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.