[U-Boot] [PATCH 08/93] arm: Remove guruplug board

[Simon Glass <sjg@chromium.org>]

This board has not been converted to CONFIG_DM_BLK by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/arm/mach-kirkwood/Kconfig      |   1 -
 board/Marvell/guruplug/Kconfig      |  12 ---
 board/Marvell/guruplug/MAINTAINERS  |   6 --
 board/Marvell/guruplug/Makefile     |   7 --
 board/Marvell/guruplug/guruplug.c   | 138 --------------------------
 board/Marvell/guruplug/guruplug.h   |  22 -----
 board/Marvell/guruplug/kwbimage.cfg | 144 ----------------------------
 configs/guruplug_defconfig          |  43 ---------
 include/configs/guruplug.h          |  82 ----------------
 9 files changed, 455 deletions(-)
 delete mode 100644 board/Marvell/guruplug/Kconfig
 delete mode 100644 board/Marvell/guruplug/MAINTAINERS
 delete mode 100644 board/Marvell/guruplug/Makefile
 delete mode 100644 board/Marvell/guruplug/guruplug.c
 delete mode 100644 board/Marvell/guruplug/guruplug.h
 delete mode 100644 board/Marvell/guruplug/kwbimage.cfg
 delete mode 100644 configs/guruplug_defconfig
 delete mode 100644 include/configs/guruplug.h

diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 3b860c4f55f..00ed62591ea 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -73,7 +73,6 @@ config SYS_SOC
 source "board/Marvell/openrd/Kconfig"
 source "board/Marvell/dreamplug/Kconfig"
 source "board/Synology/ds109/Kconfig"
-source "board/Marvell/guruplug/Kconfig"
 source "board/Marvell/sheevaplug/Kconfig"
 source "board/buffalo/lsxl/Kconfig"
 source "board/cloudengines/pogo_e02/Kconfig"
diff --git a/board/Marvell/guruplug/Kconfig b/board/Marvell/guruplug/Kconfig
deleted file mode 100644
index 529e6e3b4ba..00000000000
--- a/board/Marvell/guruplug/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_GURUPLUG
-
-config SYS_BOARD
-	default "guruplug"
-
-config SYS_VENDOR
-	default "Marvell"
-
-config SYS_CONFIG_NAME
-	default "guruplug"
-
-endif
diff --git a/board/Marvell/guruplug/MAINTAINERS b/board/Marvell/guruplug/MAINTAINERS
deleted file mode 100644
index b5d07348316..00000000000
--- a/board/Marvell/guruplug/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-GURUPLUG BOARD
-M:	Siddarth Gore <gores@marvell.com>
-S:	Maintained
-F:	board/Marvell/guruplug/
-F:	include/configs/guruplug.h
-F:	configs/guruplug_defconfig
diff --git a/board/Marvell/guruplug/Makefile b/board/Marvell/guruplug/Makefile
deleted file mode 100644
index b0dfc0cd6d9..00000000000
--- a/board/Marvell/guruplug/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2009
-# Marvell Semiconductor <www.marvell.com>
-# Written-by: Siddarth Gore <gores@marvell.com>
-
-obj-y	:= guruplug.o
diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
deleted file mode 100644
index 466f85eb081..00000000000
--- a/board/Marvell/guruplug/guruplug.c
+++ /dev/null
@@ -1,138 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Siddarth Gore <gores@marvell.com>
- */
-
-#include <common.h>
-#include <miiphy.h>
-#include <asm/mach-types.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/soc.h>
-#include <asm/arch/mpp.h>
-#include "guruplug.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
-	/*
-	 * default gpio configuration
-	 * There are maximum 64 gpios controlled through 2 sets of registers
-	 * the  below configuration configures mainly initial LED status
-	 */
-	mvebu_config_gpio(GURUPLUG_OE_VAL_LOW,
-			  GURUPLUG_OE_VAL_HIGH,
-			  GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
-
-	/* Multi-Purpose Pins Functionality configuration */
-	static const u32 kwmpp_config[] = {
-		MPP0_NF_IO2,
-		MPP1_NF_IO3,
-		MPP2_NF_IO4,
-		MPP3_NF_IO5,
-		MPP4_NF_IO6,
-		MPP5_NF_IO7,
-		MPP6_SYSRST_OUTn,
-		MPP7_GPO,	/* GPIO_RST */
-		MPP8_TW_SDA,
-		MPP9_TW_SCK,
-		MPP10_UART0_TXD,
-		MPP11_UART0_RXD,
-		MPP12_SD_CLK,
-		MPP13_SD_CMD,
-		MPP14_SD_D0,
-		MPP15_SD_D1,
-		MPP16_SD_D2,
-		MPP17_SD_D3,
-		MPP18_NF_IO0,
-		MPP19_NF_IO1,
-		MPP20_GE1_0,
-		MPP21_GE1_1,
-		MPP22_GE1_2,
-		MPP23_GE1_3,
-		MPP24_GE1_4,
-		MPP25_GE1_5,
-		MPP26_GE1_6,
-		MPP27_GE1_7,
-		MPP28_GE1_8,
-		MPP29_GE1_9,
-		MPP30_GE1_10,
-		MPP31_GE1_11,
-		MPP32_GE1_12,
-		MPP33_GE1_13,
-		MPP34_GE1_14,
-		MPP35_GE1_15,
-		MPP36_GPIO,
-		MPP37_GPIO,
-		MPP38_GPIO,
-		MPP39_GPIO,
-		MPP40_TDM_SPI_SCK,
-		MPP41_TDM_SPI_MISO,
-		MPP42_TDM_SPI_MOSI,
-		MPP43_GPIO,
-		MPP44_GPIO,
-		MPP45_GPIO,
-		MPP46_GPIO, 	/* M_RLED */
-		MPP47_GPIO,	/* M_GLED */
-		MPP48_GPIO,	/* B_RLED */
-		MPP49_GPIO,	/* B_GLED */
-		0
-	};
-	kirkwood_mpp_conf(kwmpp_config, NULL);
-	return 0;
-}
-
-int board_init(void)
-{
-	/*
-	 * arch number of board
-	 */
-	gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
-
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
-
-	return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void mv_phy_88e1121_init(char *name)
-{
-	u16 reg;
-	u16 devadr;
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	/* command to read PHY dev address */
-	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
-		printf("Err..%s could not read PHY dev address\n",
-			__FUNCTION__);
-		return;
-	}
-
-	/*
-	 * Enable RGMII delay on Tx and Rx for CPU port
-	 * Ref: sec 4.7.2 of chip datasheet
-	 */
-	miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
-	miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, &reg);
-	reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
-	miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
-	miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
-
-	/* reset the phy */
-	miiphy_reset(name, devadr);
-
-	printf("88E1121 Initialized on %s\n", name);
-}
-
-void reset_phy(void)
-{
-	/* configure and initialize both PHY's */
-	mv_phy_88e1121_init("egiga0");
-	mv_phy_88e1121_init("egiga1");
-}
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/guruplug/guruplug.h b/board/Marvell/guruplug/guruplug.h
deleted file mode 100644
index a7023668132..00000000000
--- a/board/Marvell/guruplug/guruplug.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Siddarth Gore <gores@marvell.com>
- */
-
-#ifndef __GURUPLUG_H
-#define __GURUPLUG_H
-
-#define GURUPLUG_OE_LOW		(~(0))
-#define GURUPLUG_OE_HIGH	(~(0))
-#define GURUPLUG_OE_VAL_LOW	0
-#define GURUPLUG_OE_VAL_HIGH	(0xf << 16) /* 4 LED Pins high */
-
-/* PHY related */
-#define MV88E1121_MAC_CTRL2_REG		21
-#define MV88E1121_PGADR_REG		22
-#define MV88E1121_RGMII_TXTM_CTRL	(1 << 4)
-#define MV88E1121_RGMII_RXTM_CTRL	(1 << 5)
-
-#endif /* __GURUPLUG_H */
diff --git a/board/Marvell/guruplug/kwbimage.cfg b/board/Marvell/guruplug/kwbimage.cfg
deleted file mode 100644
index 8a0d752c91c..00000000000
--- a/board/Marvell/guruplug/kwbimage.cfg
+++ /dev/null
@@ -1,144 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2009
-# Marvell Semiconductor <www.marvell.com>
-# Written-by: Siddarth Gore <gores@marvell.com>
-# Refer doc/README.kwbimage for more details about how-to configure
-# and create kirkwood boot image
-#
-
-# Boot Media configurations
-BOOT_FROM	nand
-NAND_ECC_MODE	default
-NAND_PAGE_SIZE	0x0800
-
-# SOC registers configuration using bootrom header extension
-# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-
-# Configure RGMII-0/1 interface pad voltage to 1.8V
-DATA 0xFFD100e0 0x1b1b9b9b
-
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz
-DATA 0xFFD01400 0x43000c30	# DDR Configuration register
-# bit13-0:  0xc30 (3120 DDR2 clks refresh rate)
-# bit23-14: zero
-# bit24: 1= enable exit self refresh mode on DDR access
-# bit25: 1 required
-# bit29-26: zero
-# bit31-30: 01
-
-DATA 0xFFD01404 0x37543000	# DDR Controller Control Low
-# bit 4:    0=addr/cmd in smame cycle
-# bit 5:    0=clk is driven during self refresh, we don't care for APX
-# bit 6:    0=use recommended falling edge of clk for addr/cmd
-# bit14:    0=input buffer always powered up
-# bit18:    1=cpu lock transaction enabled
-# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
-# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
-# bit30-28: 3 required
-# bit31:    0=no additional STARTBURST delay
-
-DATA 0xFFD01408 0x22125451	# DDR Timing (Low) (active cycles value +1)
-# bit3-0:   TRAS lsbs
-# bit7-4:   TRCD
-# bit11- 8: TRP
-# bit15-12: TWR
-# bit19-16: TWTR
-# bit20:    TRAS msb
-# bit23-21: 0x0
-# bit27-24: TRRD
-# bit31-28: TRTP
-
-DATA 0xFFD0140C 0x00000a33	#  DDR Timing (High)
-# bit6-0:   TRFC
-# bit8-7:   TR2R
-# bit10-9:  TR2W
-# bit12-11: TW2W
-# bit31-13: zero required
-
-DATA 0xFFD01410 0x000000cc	#  DDR Address Control
-# bit1-0:   01, Cs0width=x8
-# bit3-2:   10, Cs0size=1Gb
-# bit5-4:   01, Cs1width=x8
-# bit7-6:   10, Cs1size=1Gb
-# bit9-8:   00, Cs2width=nonexistent
-# bit11-10: 00, Cs2size =nonexistent
-# bit13-12: 00, Cs3width=nonexistent
-# bit15-14: 00, Cs3size =nonexistent
-# bit16:    0,  Cs0AddrSel
-# bit17:    0,  Cs1AddrSel
-# bit18:    0,  Cs2AddrSel
-# bit19:    0,  Cs3AddrSel
-# bit31-20: 0 required
-
-DATA 0xFFD01414 0x00000000	#  DDR Open Pages Control
-# bit0:    0,  OpenPage enabled
-# bit31-1: 0 required
-
-DATA 0xFFD01418 0x00000000	#  DDR Operation
-# bit3-0:   0x0, DDR cmd
-# bit31-4:  0 required
-
-DATA 0xFFD0141C 0x00000C52	#  DDR Mode
-# bit2-0:   2, BurstLen=2 required
-# bit3:     0, BurstType=0 required
-# bit6-4:   4, CL=5
-# bit7:     0, TestMode=0 normal
-# bit8:     0, DLL reset=0 normal
-# bit11-9:  6, auto-precharge write recovery ????????????
-# bit12:    0, PD must be zero
-# bit31-13: 0 required
-
-DATA 0xFFD01420 0x00000040	#  DDR Extended Mode
-# bit0:    0,  DDR DLL enabled
-# bit1:    0,  DDR drive strenght normal
-# bit2:    0,  DDR ODT control lsd (disabled)
-# bit5-3:  000, required
-# bit6:    1,  DDR ODT control msb, (disabled)
-# bit9-7:  000, required
-# bit10:   0,  differential DQS enabled
-# bit11:   0, required
-# bit12:   0, DDR output buffer enabled
-# bit31-13: 0 required
-
-DATA 0xFFD01424 0x0000F17F	#  DDR Controller Control High
-# bit2-0:  111, required
-# bit3  :  1  , MBUS Burst Chop disabled
-# bit6-4:  111, required
-# bit7  :  0
-# bit8  :  1  , add writepath sample stage, must be 1 for DDR freq >= 300MHz
-# bit9  :  0  , no half clock cycle addition to dataout
-# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
-# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
-# bit15-12: 1111 required
-# bit31-16: 0    required
-
-DATA 0xFFD01428 0x00085520	# DDR2 ODT Read Timing (default values)
-DATA 0xFFD0147C 0x00008552	# DDR2 ODT Write Timing (default values)
-
-DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
-DATA 0xFFD01504 0x0FFFFFF1	# CS[0]n Size
-# bit0:    1,  Window enabled
-# bit1:    0,  Write Protect disabled
-# bit3-2:  00, CS0 hit selected
-# bit23-4: ones, required
-# bit31-24: 0x0F, Size (i.e. 256MB)
-
-DATA 0xFFD01508 0x10000000	# CS[1]n Base address to 256Mb
-DATA 0xFFD0150C 0x0FFFFFF5	# CS[1]n Size 256Mb Window enabled for CS1
-
-DATA 0xFFD01514 0x00000000	# CS[2]n Size, window disabled
-DATA 0xFFD0151C 0x00000000	# CS[3]n Size, window disabled
-
-DATA 0xFFD01494 0x00030000	#  DDR ODT Control (Low)
-DATA 0xFFD01498 0x00000000	#  DDR ODT Control (High)
-# bit1-0:  00, ODT0 controlled by ODT Control (low) register above
-# bit3-2:  01, ODT1 active NEVER!
-# bit31-4: zero, required
-
-DATA 0xFFD0149C 0x0000E803	# CPU ODT Control
-DATA 0xFFD01480 0x00000001	# DDR Initialization Control
-#bit0=1, enable DDR init upon this register write
-
-# End of Header extension
-DATA 0x0 0x0
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
deleted file mode 100644
index 9998e48ab9c..00000000000
--- a/configs/guruplug_defconfig
+++ /dev/null
@@ -1,43 +0,0 @@
-CONFIG_ARM=y
-CONFIG_KIRKWOOD=y
-CONFIG_SYS_TEXT_BASE=0x600000
-CONFIG_TARGET_GURUPLUG=y
-CONFIG_IDENT_STRING="\nMarvell-GuruPlug"
-CONFIG_NR_DRAM_BANKS=2
-# CONFIG_SYS_MALLOC_F is not set
-CONFIG_BOOTDELAY=3
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_IDE=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:896K(uboot),128K(uboot_env),- at 1M(root)"
-CONFIG_CMD_UBI=y
-CONFIG_ISO_PARTITION=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus"
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_DM=y
-CONFIG_MVSATA_IDE=y
-# CONFIG_MMC is not set
-CONFIG_MVGBE=y
-CONFIG_MII=y
-CONFIG_DM_RTC=y
-CONFIG_RTC_MV=y
-CONFIG_SYS_NS16550=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_LZMA=y
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
deleted file mode 100644
index 739ab320f63..00000000000
--- a/include/configs/guruplug.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009-2014
- * Gerald Kerma <dreagle@doukki.net>
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Siddarth Gore <gores@marvell.com>
- */
-
-#ifndef _CONFIG_GURUPLUG_H
-#define _CONFIG_GURUPLUG_H
-
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_SHEEVA_88SV131	1	/* CPU Core subversion */
-
-/*
- * Standard filesystems
- */
-#define CONFIG_BZIP2
-
-/*
- * mv-plug-common.h should be defined after CMD configs since it used them
- * to enable certain macros
- */
-#include "mv-plug-common.h"
-
-/*
- *  Environment variables configurations
- */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_ENV_SECT_SIZE		0x20000	/* 128K */
-#endif
-/*
- * max 4k env size is enough, but in case of nand
- * it has to be rounded to sector size
- */
-#define CONFIG_ENV_SIZE			0x20000	/* 128k */
-#define CONFIG_ENV_OFFSET		0xE0000	/* env starts here */
-/*
- * Environment is right behind U-Boot in flash. Make sure U-Boot
- * doesn't grow into the environment area.
- */
-#define CONFIG_BOARD_SIZE_LIMIT		CONFIG_ENV_OFFSET
-
-/*
- * Default environment variables
- */
-#define CONFIG_BOOTCOMMAND \
-	"setenv bootargs ${console} ${mtdparts} ${bootargs_root}; "	\
-	"ubi part root; "						\
-	"ubifsmount ubi:rootfs; "					\
-	"ubifsload 0x800000 ${kernel}; "				\
-	"ubifsload 0x700000 ${fdt}; "					\
-	"ubifsumount; "							\
-	"fdt addr 0x700000; fdt resize; fdt chosen; "			\
-	"bootz 0x800000 - 0x700000"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"console=console=ttyS0,115200\0"				\
-	"mtdids=nand0=orion_nand\0"					\
-	"mtdparts="CONFIG_MTDPARTS_DEFAULT			\
-	"kernel=/boot/zImage\0"						\
-	"fdt=/boot/guruplug-server-plus.dtb\0"				\
-	"bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0"
-
-/*
- * Ethernet Driver configuration
- */
-#ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE_PORTS	{1, 1}	/* enable both ports */
-#define CONFIG_PHY_BASE_ADR	0
-#endif /* CONFIG_CMD_NET */
-
-/*
- * SATA Driver configuration
- */
-#ifdef CONFIG_MVSATA_IDE
-#define CONFIG_SYS_ATA_IDE0_OFFSET	MV_SATA_PORT0_OFFSET
-#endif /*CONFIG_MVSATA_IDE*/
-
-#endif /* _CONFIG_GURUPLUG_H */
-- 
2.19.1.1215.g8438c0b245-goog