From: Mark Brown <broonie@kernel.org> To: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: "Ramuthevar,Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>, linux-kernel <linux-kernel@vger.kernel.org>, linux-spi@vger.kernel.org, Vignesh R <vigneshr@ti.com>, Mark Rutland <mark.rutland@arm.com>, Rob Herring <robh+dt@kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>, dan.carpenter@oracle.com, cheol.yong.kim@intel.com, qi-ming.wu@intel.com Subject: Re: [PATCH v9 0/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller Date: Fri, 14 Feb 2020 12:11:45 +0000 [thread overview] Message-ID: <20200214121145.GF4827@sirena.org.uk> (raw) In-Reply-To: <CAAh8qsxnRSwonuEPrriuS=gUMTjt8ddUVy5HxegmoCk-FoE4qg@mail.gmail.com> [-- Attachment #1: Type: text/plain, Size: 769 bytes --] On Fri, Feb 14, 2020 at 01:02:22PM +0100, Simon Goldschmidt wrote: > On Fri, Feb 14, 2020 at 12:46 PM Ramuthevar,Vadivel MuruganX > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: > > Add support for the Cadence QSPI controller. This controller is > > present in the Intel Lightning Mountain(LGM) SoCs, Altera and TI SoCs. > > This driver has been tested on the Intel LGM SoCs. > This is v9 and still, none of the altera maintainers are on CC? > How will it be ensured that this doesn't break altera if it is merged? Given that this is a new driver I'd be very surprised if it broke other users? I can imagine it might not work for them and it would definitely be much better to get their review but it shouldn't be any worse than the current lack of support. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> To: Simon Goldschmidt <simon.k.r.goldschmidt-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: "Ramuthevar,Vadivel MuruganX" <vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>, linux-kernel <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Vignesh R <vigneshr-l0cyMroinI0@public.gmane.org>, Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>, Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>, dan.carpenter-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org, cheol.yong.kim-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, qi-ming.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org Subject: Re: [PATCH v9 0/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller Date: Fri, 14 Feb 2020 12:11:45 +0000 [thread overview] Message-ID: <20200214121145.GF4827@sirena.org.uk> (raw) In-Reply-To: <CAAh8qsxnRSwonuEPrriuS=gUMTjt8ddUVy5HxegmoCk-FoE4qg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> [-- Attachment #1: Type: text/plain, Size: 793 bytes --] On Fri, Feb 14, 2020 at 01:02:22PM +0100, Simon Goldschmidt wrote: > On Fri, Feb 14, 2020 at 12:46 PM Ramuthevar,Vadivel MuruganX > <vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> wrote: > > Add support for the Cadence QSPI controller. This controller is > > present in the Intel Lightning Mountain(LGM) SoCs, Altera and TI SoCs. > > This driver has been tested on the Intel LGM SoCs. > This is v9 and still, none of the altera maintainers are on CC? > How will it be ensured that this doesn't break altera if it is merged? Given that this is a new driver I'd be very surprised if it broke other users? I can imagine it might not work for them and it would definitely be much better to get their review but it shouldn't be any worse than the current lack of support. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --]
next prev parent reply other threads:[~2020-02-14 12:11 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-14 11:46 [PATCH v9 0/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller Ramuthevar,Vadivel MuruganX 2020-02-14 11:46 ` Ramuthevar,Vadivel MuruganX 2020-02-14 11:46 ` [PATCH v9 1/2] dt-bindings: spi: Add schema for Cadence QSPI Controller driver Ramuthevar,Vadivel MuruganX 2020-02-14 11:46 ` Ramuthevar,Vadivel MuruganX 2020-02-14 14:08 ` Mark Brown 2020-02-14 14:08 ` Mark Brown 2020-02-14 11:46 ` [PATCH v9 2/2] spi: cadence-quadpsi: Add support for the Cadence QSPI controller Ramuthevar,Vadivel MuruganX 2020-02-14 11:46 ` Ramuthevar,Vadivel MuruganX 2020-02-14 13:09 ` Mark Brown 2020-02-14 13:09 ` Mark Brown 2020-02-17 9:18 ` Ramuthevar, Vadivel MuruganX 2020-02-17 9:18 ` Ramuthevar, Vadivel MuruganX 2020-02-17 17:09 ` Mark Brown 2020-02-17 17:09 ` Mark Brown 2020-02-18 3:17 ` Ramuthevar, Vadivel MuruganX 2020-02-18 3:17 ` Ramuthevar, Vadivel MuruganX 2020-02-14 12:02 ` [PATCH v9 0/2] " Simon Goldschmidt 2020-02-14 12:02 ` Simon Goldschmidt 2020-02-14 12:11 ` Mark Brown [this message] 2020-02-14 12:11 ` Mark Brown 2020-02-14 12:50 ` Simon Goldschmidt 2020-02-14 12:50 ` Simon Goldschmidt 2020-02-14 13:15 ` Mark Brown 2020-02-14 13:15 ` Mark Brown 2020-02-14 13:49 ` Simon Goldschmidt 2020-02-14 13:49 ` Simon Goldschmidt 2020-02-14 14:16 ` Mark Brown 2020-02-14 14:16 ` Mark Brown 2020-02-17 10:09 ` Ramuthevar, Vadivel MuruganX 2020-02-17 10:09 ` Ramuthevar, Vadivel MuruganX [not found] ` <4712cdc4-34cd-990b-3d53-3d394ae1250b@linux.intel.com> 2020-02-17 11:52 ` Mark Brown 2020-02-17 11:52 ` Mark Brown 2020-02-17 12:18 ` Vignesh Raghavendra 2020-02-17 12:18 ` Vignesh Raghavendra 2020-02-18 8:56 ` Ramuthevar, Vadivel MuruganX 2020-02-18 8:56 ` Ramuthevar, Vadivel MuruganX 2020-02-17 10:11 ` Ramuthevar, Vadivel MuruganX 2020-02-17 10:11 ` Ramuthevar, Vadivel MuruganX
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