From: Matthew Brost <matthew.brost@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 39/47] drm/i915/guc: Don't complain about reset races Date: Thu, 24 Jun 2021 08:55:58 -0700 [thread overview] Message-ID: <20210624155557.GA3540@sdutt-i7> (raw) In-Reply-To: <20210624070516.21893-40-matthew.brost@intel.com> On Thu, Jun 24, 2021 at 12:05:08AM -0700, Matthew Brost wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > It is impossible to seal all race conditions of resets occurring > concurrent to other operations. At least, not without introducing > excesive mutex locking. Instead, don't complain if it occurs. In > particular, don't complain if trying to send a H2G during a reset. > Whatever the H2G was about should get redone once the reset is over. > > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 5 ++++- > drivers/gpu/drm/i915/gt/uc/intel_uc.c | 3 +++ > drivers/gpu/drm/i915/gt/uc/intel_uc.h | 2 ++ > 3 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > index dd6177c8d75c..3b32755f892e 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > @@ -727,7 +727,10 @@ int intel_guc_ct_send(struct intel_guc_ct *ct, const u32 *action, u32 len, > int ret; > > if (unlikely(!ct->enabled)) { > - WARN(1, "Unexpected send: action=%#x\n", *action); > + struct intel_guc *guc = ct_to_guc(ct); > + struct intel_uc *uc = container_of(guc, struct intel_uc, guc); > + > + WARN(!uc->reset_in_progress, "Unexpected send: action=%#x\n", *action); > return -ENODEV; > } > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > index b523a8521351..77c1fe2ed883 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > @@ -550,6 +550,7 @@ void intel_uc_reset_prepare(struct intel_uc *uc) > { > struct intel_guc *guc = &uc->guc; > > + uc->reset_in_progress = true; > > /* Nothing to do if GuC isn't supported */ > if (!intel_uc_supports_guc(uc)) > @@ -579,6 +580,8 @@ void intel_uc_reset_finish(struct intel_uc *uc) > { > struct intel_guc *guc = &uc->guc; > > + uc->reset_in_progress = false; > + > /* Firmware expected to be running when this function is called */ > if (intel_guc_is_fw_running(guc) && intel_uc_uses_guc_submission(uc)) > intel_guc_submission_reset_finish(guc); > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h b/drivers/gpu/drm/i915/gt/uc/intel_uc.h > index eaa3202192ac..91315e3f1c58 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h > @@ -30,6 +30,8 @@ struct intel_uc { > > /* Snapshot of GuC log from last failed load */ > struct drm_i915_gem_object *load_err_log; > + > + bool reset_in_progress; > }; > > void intel_uc_init_early(struct intel_uc *uc); > -- > 2.28.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 39/47] drm/i915/guc: Don't complain about reset races Date: Thu, 24 Jun 2021 08:55:58 -0700 [thread overview] Message-ID: <20210624155557.GA3540@sdutt-i7> (raw) In-Reply-To: <20210624070516.21893-40-matthew.brost@intel.com> On Thu, Jun 24, 2021 at 12:05:08AM -0700, Matthew Brost wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > It is impossible to seal all race conditions of resets occurring > concurrent to other operations. At least, not without introducing > excesive mutex locking. Instead, don't complain if it occurs. In > particular, don't complain if trying to send a H2G during a reset. > Whatever the H2G was about should get redone once the reset is over. > > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 5 ++++- > drivers/gpu/drm/i915/gt/uc/intel_uc.c | 3 +++ > drivers/gpu/drm/i915/gt/uc/intel_uc.h | 2 ++ > 3 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > index dd6177c8d75c..3b32755f892e 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > @@ -727,7 +727,10 @@ int intel_guc_ct_send(struct intel_guc_ct *ct, const u32 *action, u32 len, > int ret; > > if (unlikely(!ct->enabled)) { > - WARN(1, "Unexpected send: action=%#x\n", *action); > + struct intel_guc *guc = ct_to_guc(ct); > + struct intel_uc *uc = container_of(guc, struct intel_uc, guc); > + > + WARN(!uc->reset_in_progress, "Unexpected send: action=%#x\n", *action); > return -ENODEV; > } > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > index b523a8521351..77c1fe2ed883 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > @@ -550,6 +550,7 @@ void intel_uc_reset_prepare(struct intel_uc *uc) > { > struct intel_guc *guc = &uc->guc; > > + uc->reset_in_progress = true; > > /* Nothing to do if GuC isn't supported */ > if (!intel_uc_supports_guc(uc)) > @@ -579,6 +580,8 @@ void intel_uc_reset_finish(struct intel_uc *uc) > { > struct intel_guc *guc = &uc->guc; > > + uc->reset_in_progress = false; > + > /* Firmware expected to be running when this function is called */ > if (intel_guc_is_fw_running(guc) && intel_uc_uses_guc_submission(uc)) > intel_guc_submission_reset_finish(guc); > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h b/drivers/gpu/drm/i915/gt/uc/intel_uc.h > index eaa3202192ac..91315e3f1c58 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h > @@ -30,6 +30,8 @@ struct intel_uc { > > /* Snapshot of GuC log from last failed load */ > struct drm_i915_gem_object *load_err_log; > + > + bool reset_in_progress; > }; > > void intel_uc_init_early(struct intel_uc *uc); > -- > 2.28.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-06-24 16:03 UTC|newest] Thread overview: 336+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-24 7:04 [PATCH 00/47] GuC submission support Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 01/47] drm/i915/guc: Relax CTB response timeout Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-24 17:23 ` Michal Wajdeczko 2021-06-24 17:23 ` [Intel-gfx] " Michal Wajdeczko 2021-06-24 7:04 ` [PATCH 02/47] drm/i915/guc: Improve error message for unsolicited CT response Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-25 11:58 ` Michal Wajdeczko 2021-06-25 11:58 ` Michal Wajdeczko 2021-06-24 7:04 ` [PATCH 03/47] drm/i915/guc: Increase size of CTB buffers Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-24 13:49 ` Michal Wajdeczko 2021-06-24 13:49 ` [Intel-gfx] " Michal Wajdeczko 2021-06-24 15:41 ` Matthew Brost 2021-06-24 15:41 ` [Intel-gfx] " Matthew Brost 2021-06-25 12:03 ` Michal Wajdeczko 2021-06-25 12:03 ` [Intel-gfx] " Michal Wajdeczko 2021-06-24 7:04 ` [PATCH 04/47] drm/i915/guc: Add non blocking CTB send function Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-24 14:48 ` Michal Wajdeczko 2021-06-24 14:48 ` Michal Wajdeczko 2021-06-24 15:49 ` Matthew Brost 2021-06-24 15:49 ` Matthew Brost 2021-06-24 17:02 ` Michal Wajdeczko 2021-06-24 17:02 ` Michal Wajdeczko 2021-06-24 22:41 ` Matthew Brost 2021-06-24 22:41 ` Matthew Brost 2021-06-25 11:50 ` Michal Wajdeczko 2021-06-25 11:50 ` Michal Wajdeczko 2021-06-25 17:53 ` Matthew Brost 2021-06-25 17:53 ` Matthew Brost 2021-06-24 22:47 ` Matthew Brost 2021-06-24 22:47 ` Matthew Brost 2021-06-24 7:04 ` [PATCH 05/47] drm/i915/guc: Add stall timer to " Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-24 17:37 ` Michal Wajdeczko 2021-06-24 17:37 ` Michal Wajdeczko 2021-06-24 23:01 ` Matthew Brost 2021-06-24 23:01 ` Matthew Brost 2021-06-24 7:04 ` [PATCH 06/47] drm/i915/guc: Optimize CTB writes and reads Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-25 13:09 ` Michal Wajdeczko 2021-06-25 13:09 ` Michal Wajdeczko 2021-06-25 18:26 ` Matthew Brost 2021-06-25 18:26 ` Matthew Brost 2021-06-25 20:28 ` Matthew Brost 2021-06-25 20:28 ` Matthew Brost 2021-06-24 7:04 ` [PATCH 07/47] drm/i915/guc: Module load failure test for CT buffer creation Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 08/47] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-29 21:11 ` John Harrison 2021-06-29 21:11 ` [Intel-gfx] " John Harrison 2021-06-30 0:30 ` Matthew Brost 2021-06-30 0:30 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 09/47] drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-25 19:44 ` John Harrison 2021-06-25 19:44 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 10/47] drm/i915/guc: Add lrc descriptor context lookup array Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-25 13:17 ` Michal Wajdeczko 2021-06-25 13:17 ` [Intel-gfx] " Michal Wajdeczko 2021-06-25 17:26 ` Matthew Brost 2021-06-25 17:26 ` [Intel-gfx] " Matthew Brost 2021-06-29 21:20 ` John Harrison 2021-06-29 21:20 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 11/47] drm/i915/guc: Implement GuC submission tasklet Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-29 22:04 ` John Harrison 2021-06-29 22:04 ` [Intel-gfx] " John Harrison 2021-06-30 0:41 ` Matthew Brost 2021-06-30 0:41 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 12/47] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-29 22:09 ` John Harrison 2021-06-29 22:09 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 13/47] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-06-25 13:25 ` Michal Wajdeczko 2021-06-25 13:25 ` [Intel-gfx] " Michal Wajdeczko 2021-06-25 17:46 ` Matthew Brost 2021-06-25 17:46 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 14/47] drm/i915/guc: Insert fence on context when deregistering Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-09 22:39 ` John Harrison 2021-07-09 22:39 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 15/47] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-09 22:48 ` John Harrison 2021-07-09 22:48 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 16/47] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-09 22:53 ` John Harrison 2021-07-09 22:53 ` [Intel-gfx] " John Harrison 2021-07-10 3:00 ` Matthew Brost 2021-07-10 3:00 ` [Intel-gfx] " Matthew Brost 2021-07-12 17:57 ` John Harrison 2021-07-12 17:57 ` [Intel-gfx] " John Harrison 2021-07-12 18:11 ` Daniel Vetter 2021-07-12 18:11 ` Daniel Vetter 2021-06-24 7:04 ` [PATCH 17/47] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-09 22:59 ` John Harrison 2021-07-09 22:59 ` [Intel-gfx] " John Harrison 2021-07-10 3:36 ` Matthew Brost 2021-07-10 3:36 ` [Intel-gfx] " Matthew Brost 2021-07-12 17:54 ` John Harrison 2021-07-12 17:54 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 18/47] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-09 23:03 ` John Harrison 2021-07-09 23:03 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 19/47] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-15 1:51 ` Daniele Ceraolo Spurio 2021-07-15 1:51 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-06-24 7:04 ` [PATCH 20/47] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-09 23:53 ` John Harrison 2021-07-09 23:53 ` [Intel-gfx] " John Harrison 2021-07-15 0:07 ` Matthew Brost 2021-07-15 0:07 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 21/47] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-13 18:36 ` John Harrison 2021-07-13 18:36 ` [Intel-gfx] " John Harrison 2021-07-15 0:06 ` Matthew Brost 2021-07-15 0:06 ` [Intel-gfx] " Matthew Brost 2021-07-15 0:12 ` John Harrison 2021-07-15 0:12 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 22/47] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-10 0:16 ` John Harrison 2021-07-10 0:16 ` [Intel-gfx] " John Harrison 2021-07-10 3:55 ` Matthew Brost 2021-07-10 3:55 ` [Intel-gfx] " Matthew Brost 2021-07-17 4:09 ` Matthew Brost 2021-07-17 4:09 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 23/47] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-12 18:05 ` John Harrison 2021-07-12 18:05 ` [Intel-gfx] " John Harrison 2021-07-12 20:59 ` Matthew Brost 2021-07-12 20:59 ` [Intel-gfx] " Matthew Brost 2021-07-12 21:37 ` John Harrison 2021-07-12 21:37 ` [Intel-gfx] " John Harrison 2021-07-13 8:51 ` Michal Wajdeczko 2021-07-13 8:51 ` [Intel-gfx] " Michal Wajdeczko 2021-07-14 23:56 ` Matthew Brost 2021-07-14 23:56 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 24/47] drm/i915/guc: Add several request trace points Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-12 18:08 ` John Harrison 2021-07-12 18:08 ` [Intel-gfx] " John Harrison 2021-07-13 9:06 ` Tvrtko Ursulin 2021-07-13 9:06 ` Tvrtko Ursulin 2021-07-20 1:59 ` Matthew Brost 2021-07-20 1:59 ` Matthew Brost 2021-07-22 13:55 ` Tvrtko Ursulin 2021-07-22 13:55 ` Tvrtko Ursulin 2021-06-24 7:04 ` [PATCH 25/47] drm/i915: Add intel_context tracing Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-12 18:10 ` John Harrison 2021-07-12 18:10 ` [Intel-gfx] " John Harrison 2021-07-12 21:47 ` Matthew Brost 2021-07-12 21:47 ` [Intel-gfx] " Matthew Brost 2021-07-12 21:51 ` John Harrison 2021-07-12 21:51 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 26/47] drm/i915/guc: GuC virtual engines Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-15 1:21 ` Daniele Ceraolo Spurio 2021-07-15 1:21 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-06-24 7:04 ` [PATCH 27/47] drm/i915: Track 'serial' counts for " Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-12 18:11 ` John Harrison 2021-07-12 18:11 ` [Intel-gfx] " John Harrison 2021-07-12 20:06 ` Matthew Brost 2021-07-12 20:06 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:04 ` [PATCH 28/47] drm/i915: Hold reference to intel_context over life of i915_request Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-12 18:23 ` John Harrison 2021-07-12 18:23 ` [Intel-gfx] " John Harrison 2021-07-12 20:05 ` Matthew Brost 2021-07-12 20:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 21:36 ` Matthew Brost 2021-07-12 21:36 ` Matthew Brost 2021-07-12 21:48 ` John Harrison 2021-07-12 21:48 ` John Harrison 2021-06-24 7:04 ` [PATCH 29/47] drm/i915/guc: Disable bonding extension with GuC submission Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-12 18:23 ` John Harrison 2021-07-12 18:23 ` [Intel-gfx] " John Harrison 2021-06-24 7:04 ` [PATCH 30/47] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs Matthew Brost 2021-06-24 7:04 ` [Intel-gfx] " Matthew Brost 2021-07-12 19:19 ` John Harrison 2021-07-12 19:19 ` [Intel-gfx] " John Harrison 2021-06-24 7:05 ` [PATCH 31/47] drm/i915/guc: Reset implementation for new GuC interface Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 19:58 ` John Harrison 2021-07-12 19:58 ` [Intel-gfx] " John Harrison 2021-07-15 0:53 ` Matthew Brost 2021-07-15 0:53 ` [Intel-gfx] " Matthew Brost 2021-07-15 9:36 ` Tvrtko Ursulin 2021-07-15 9:36 ` Tvrtko Ursulin 2021-07-26 22:48 ` Matthew Brost 2021-07-26 22:48 ` Matthew Brost 2021-07-27 8:56 ` Tvrtko Ursulin 2021-07-27 8:56 ` Tvrtko Ursulin 2021-07-27 18:30 ` Matthew Brost 2021-07-27 18:30 ` Matthew Brost 2021-06-24 7:05 ` [PATCH 32/47] drm/i915: Reset GPU immediately if submission is disabled Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 20:01 ` John Harrison 2021-07-12 20:01 ` [Intel-gfx] " John Harrison 2021-06-24 7:05 ` [PATCH 33/47] drm/i915/guc: Add disable interrupts to guc sanitize Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 20:11 ` John Harrison 2021-07-12 20:11 ` [Intel-gfx] " John Harrison 2021-06-24 7:05 ` [PATCH 34/47] drm/i915/guc: Suspend/resume implementation for new interface Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 22:56 ` John Harrison 2021-07-12 22:56 ` [Intel-gfx] " John Harrison 2021-06-24 7:05 ` [PATCH 35/47] drm/i915/guc: Handle context reset notification Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 22:58 ` John Harrison 2021-07-12 22:58 ` [Intel-gfx] " John Harrison 2021-07-15 0:32 ` Matthew Brost 2021-07-15 0:32 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:05 ` [PATCH 36/47] drm/i915/guc: Handle engine reset failure notification Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 22:59 ` John Harrison 2021-07-12 22:59 ` [Intel-gfx] " John Harrison 2021-06-24 7:05 ` [PATCH 37/47] drm/i915/guc: Enable the timer expired interrupt for GuC Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 23:00 ` John Harrison 2021-07-12 23:00 ` [Intel-gfx] " John Harrison 2021-06-24 7:05 ` [PATCH 38/47] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:05 ` [PATCH 39/47] drm/i915/guc: Don't complain about reset races Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-24 15:55 ` Matthew Brost [this message] 2021-06-24 15:55 ` Matthew Brost 2021-06-24 7:05 ` [PATCH 40/47] drm/i915/guc: Enable GuC engine reset Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-24 16:19 ` Matthew Brost 2021-06-24 16:19 ` Matthew Brost 2021-06-24 7:05 ` [PATCH 41/47] drm/i915/guc: Capture error state on context reset Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-12 23:05 ` John Harrison 2021-07-12 23:05 ` [Intel-gfx] " John Harrison 2021-06-24 7:05 ` [PATCH 42/47] drm/i915/guc: Fix for error capture after full GPU reset with GuC Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-07-15 0:43 ` Matthew Brost 2021-07-15 0:43 ` Matthew Brost 2021-06-24 7:05 ` [PATCH 43/47] drm/i915/guc: Hook GuC scheduling policies up Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-25 0:59 ` Matthew Brost 2021-06-25 0:59 ` Matthew Brost 2021-06-25 19:10 ` John Harrison 2021-06-25 19:10 ` John Harrison 2021-07-10 18:56 ` Matthew Brost 2021-07-10 18:56 ` Matthew Brost 2021-06-24 7:05 ` [PATCH 44/47] drm/i915/guc: Connect reset modparam updates to GuC policy flags Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-25 1:10 ` Matthew Brost 2021-06-25 1:10 ` Matthew Brost 2021-06-24 7:05 ` [PATCH 45/47] drm/i915/guc: Include scheduling policies in the debugfs state dump Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-24 16:34 ` Matthew Brost 2021-06-24 16:34 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:05 ` [PATCH 46/47] drm/i915/guc: Add golden context to GuC ADS Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-24 7:05 ` [PATCH 47/47] drm/i915/guc: Unblock GuC submission on Gen11+ Matthew Brost 2021-06-24 7:05 ` [Intel-gfx] " Matthew Brost 2021-06-30 8:22 ` Martin Peres 2021-06-30 8:22 ` [Intel-gfx] " Martin Peres 2021-06-30 18:00 ` Matthew Brost 2021-06-30 18:00 ` [Intel-gfx] " Matthew Brost 2021-07-01 18:24 ` Martin Peres 2021-07-01 18:24 ` [Intel-gfx] " Martin Peres 2021-07-02 8:13 ` Martin Peres 2021-07-02 8:13 ` [Intel-gfx] " Martin Peres 2021-07-02 13:06 ` Michal Wajdeczko 2021-07-02 13:06 ` [Intel-gfx] " Michal Wajdeczko 2021-07-02 13:12 ` Martin Peres 2021-07-02 13:12 ` [Intel-gfx] " Martin Peres 2021-07-02 14:08 ` Michal Wajdeczko 2021-07-02 14:08 ` [Intel-gfx] " Michal Wajdeczko 2021-06-30 18:58 ` John Harrison 2021-06-30 18:58 ` [Intel-gfx] " John Harrison 2021-07-01 8:14 ` Pekka Paalanen 2021-07-01 8:14 ` [Intel-gfx] " Pekka Paalanen 2021-07-01 18:27 ` Martin Peres 2021-07-01 18:27 ` [Intel-gfx] " Martin Peres 2021-07-01 19:28 ` Daniel Vetter 2021-07-01 19:28 ` Daniel Vetter 2021-07-02 7:29 ` Pekka Paalanen 2021-07-02 7:29 ` Pekka Paalanen 2021-07-02 8:09 ` Martin Peres 2021-07-02 8:09 ` Martin Peres 2021-07-02 15:07 ` Michal Wajdeczko 2021-07-02 15:07 ` Michal Wajdeczko 2021-07-03 8:21 ` Martin Peres 2021-07-03 8:21 ` Martin Peres 2021-07-07 0:57 ` John Harrison 2021-07-07 0:57 ` John Harrison 2021-07-07 7:47 ` Pekka Paalanen 2021-07-07 7:47 ` Pekka Paalanen 2021-07-07 10:11 ` Michal Wajdeczko 2021-07-07 10:11 ` Michal Wajdeczko 2021-07-15 0:49 ` Matthew Brost 2021-07-15 0:49 ` Matthew Brost 2021-06-24 7:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GuC submission support Patchwork 2021-06-24 7:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-06-24 7:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2021-07-12 19:23 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for GuC submission support (rev2) Patchwork 2021-10-22 9:35 ` [PATCH 00/47] GuC submission support Joonas Lahtinen 2021-10-22 9:35 ` [Intel-gfx] " Joonas Lahtinen 2021-10-22 16:42 ` Matthew Brost 2021-10-22 16:42 ` [Intel-gfx] " Matthew Brost 2021-10-25 9:37 ` Joonas Lahtinen 2021-10-25 9:37 ` [Intel-gfx] " Joonas Lahtinen 2021-10-25 15:15 ` Matthew Brost 2021-10-25 15:15 ` [Intel-gfx] " Matthew Brost 2021-10-26 8:59 ` Joonas Lahtinen 2021-10-26 8:59 ` [Intel-gfx] " Joonas Lahtinen 2021-10-26 15:43 ` Matthew Brost 2021-10-26 15:43 ` [Intel-gfx] " Matthew Brost 2021-10-26 15:51 ` Matthew Brost 2021-10-26 15:51 ` [Intel-gfx] " Matthew Brost 2021-10-27 9:21 ` Joonas Lahtinen 2021-10-27 9:21 ` [Intel-gfx] " Joonas Lahtinen 2021-10-25 17:06 ` John Harrison 2021-10-25 17:06 ` [Intel-gfx] " John Harrison
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210624155557.GA3540@sdutt-i7 \ --to=matthew.brost@intel.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.