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From: Matthew Brost <matthew.brost@intel.com>
To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	daniele.ceraolospurio@intel.com, john.c.harrison@intel.com
Subject: Re: [PATCH 00/47] GuC submission support
Date: Tue, 26 Oct 2021 08:43:03 -0700	[thread overview]
Message-ID: <20211026154303.GA12465@jons-linux-dev-box> (raw)
In-Reply-To: <163523877564.3841.4449806608079864803@jlahtine-mobl.ger.corp.intel.com>

On Tue, Oct 26, 2021 at 11:59:35AM +0300, Joonas Lahtinen wrote:
> Quoting Matthew Brost (2021-10-25 18:15:09)
> > On Mon, Oct 25, 2021 at 12:37:02PM +0300, Joonas Lahtinen wrote:
> > > Quoting Matthew Brost (2021-10-22 19:42:19)
> > > > On Fri, Oct 22, 2021 at 12:35:04PM +0300, Joonas Lahtinen wrote:
> > > > > Hi Matt & John,
> > > > > 
> > > > > Can you please queue patches with the right Fixes: references to convert
> > > > > all the GuC tracepoints to be protected by the LOW_LEVEL_TRACEPOINTS
> > > > > protection for now. Please do so before next Wednesday so we get it
> > > > > queued in drm-intel-next-fixes.
> > > > > 
> > > > 
> > > > Don't we already do that? I checked i915_trace.h and every tracepoint I
> > > > added (intel_context class, i915_request_guc_submit) is protected by
> > > > LOW_LEVEL_TRACEPOINTS.
> > > > 
> > > > The only thing I changed outside of that protection is adding the guc_id
> > > > field to existing i915_request class tracepoints.
> > > 
> > > It's the first search hit for "guc" inside the i915_trace.h file :)
> > > 
> > > > Without the guc_id in
> > > > those tracepoints these are basically useless with GuC submission. We
> > > > could revert that if it is a huge deal but as I said then they are
> > > > useless...
> > > 
> > > Let's eliminate it for now and restore the tracepoint exactly as it was.
> > > 
> > 
> > Don't really agree - let's render tracepoints to be useless? Are
> > tracepoints ABI? I googled this and couldn't really find a definie
> > answer. If tracepoints are ABI, then OK I can revert this change but
> > still this is a poor technical decision (tracepoints should not be ABI).
> 
> Thats a very heated discussion in general. But the fact is that if
> tracepoint changes have caused regressions to applications, they have
> been forced to be remain untouched. You are free to raise the discussion
> with Linus/LKML if you feel that should not be the case. So the end
> result is that tracepoints are effectively in limbo, not ABI unless some
> application uses them like ABI.
> 

Not trying to start or fight a holy war. If the current rules are don't
change tracepoints, we won't. Patch posted, let's stay focused, get an
RB, and move on.

Matt

> Feel free to search the intel-gfx/lkml for "tracepoints" keyword and look
> for threads with many replies. It's not that I would not agree, it's more
> that I'm not in the mood for repeating that discussion over and over again
> and always land in the same spot.
> 
> So for now, we don't add anything new to tracepoints we can't guarantee
> to always be there untouched. Similarly, we don't guarantee any of them
> to remain stable. So we try to be compatible with the limbo.
> 
> I'm long overdue waiting for some stable consumer to step up for the
> tracepoints, so we can then start discussion what would actually be the
> best way of getting that information out for them. In ~5 years that has
> not happened.
> 
> > > If there is an immediate need, we should instead have an auxilary tracepoint
> > > which is enabled only through LOW_LEVEL_TRACEPOINTS and that amends the
> > > information of the basic tracepoint.
> > > 
> > 
> > Regardless of what I said above, I'll post 2 patches. The 1st just
> > remove the GuC, the 2nd modify the tracepoint to include guc_id if
> > LOW_LEVEL_TRACEPOINTS is defined.
> 
> Thanks. Let's get a patch merged which simply drops the guc_id for now
> to unblock things.
> 
> For the second, an auxilary tracepoint will be preferred instead of
> mutating the existing one (regardless of the LOW_LEVEL_TRACEPOINTS).
> 
> I only noticed a patch that mutates the tracepoints, can you
> double-check sending the first patch?
> 
> Regards, Joonas
> 
> > 
> > > For the longer term solution we should align towards the dma fence
> > > tracepoints. When those are combined with the OA information, one should
> > > be able to get a good understanding of both the software and hardware
> > > scheduling decisions.
> > > 
> > 
> > Not sure about this either. I use these tracepoins to correlate things
> > to the GuC log. Between the 2, if you know what you are doing you
> > basically can figure out everything that is happening. Fields in the
> > trace translate directly to fields in the GuC log. Some of these fields
> > are backend specific, not sure how these could be pushed the dma fence
> > tracepoints. For what it is worth, without these tracepoints we'd likely
> > still have a bunch of bugs in the GuC firmware. I understand these
> > points, several other i915 developers do, and several of the GuC
> > firmware developers do too.
> > 
> > Matt
> > 
> > > Regards, Joonas
> > > 
> > > > 
> > > > Matt
> > > > 
> > > > > There's the orthogonal track to discuss what would be the stable set of
> > > > > tracepoints we could expose. However, before that discussion is closed,
> > > > > let's keep a rather strict line to avoid potential maintenance burned.
> > > > > 
> > > > > We can then relax in the future as needed.
> > > > > 
> > > > > Regards, Joonas
> > > > > 
> > > > > Quoting Matthew Brost (2021-06-24 10:04:29)
> > > > > > As discussed in [1], [2] we are enabling GuC submission support in the
> > > > > > i915. This is a subset of the patches in step 5 described in [1],
> > > > > > basically it is absolute to enable CI with GuC submission on gen11+
> > > > > > platforms.
> > > > > > 
> > > > > > This series itself will likely be broken down into smaller patch sets to
> > > > > > merge. Likely into CTBs changes, basic submission, virtual engines, and
> > > > > > resets.
> > > > > > 
> > > > > > A following series will address the missing patches remaining from [1].
> > > > > > 
> > > > > > Locally tested on TGL machine and basic tests seem to be passing.
> > > > > > 
> > > > > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > > > > 
> > > > > > [1] https://patchwork.freedesktop.org/series/89844/
> > > > > > [2] https://patchwork.freedesktop.org/series/91417/
> > > > > > 
> > > > > > Daniele Ceraolo Spurio (1):
> > > > > >   drm/i915/guc: Unblock GuC submission on Gen11+
> > > > > > 
> > > > > > John Harrison (10):
> > > > > >   drm/i915/guc: Module load failure test for CT buffer creation
> > > > > >   drm/i915: Track 'serial' counts for virtual engines
> > > > > >   drm/i915/guc: Provide mmio list to be saved/restored on engine reset
> > > > > >   drm/i915/guc: Don't complain about reset races
> > > > > >   drm/i915/guc: Enable GuC engine reset
> > > > > >   drm/i915/guc: Fix for error capture after full GPU reset with GuC
> > > > > >   drm/i915/guc: Hook GuC scheduling policies up
> > > > > >   drm/i915/guc: Connect reset modparam updates to GuC policy flags
> > > > > >   drm/i915/guc: Include scheduling policies in the debugfs state dump
> > > > > >   drm/i915/guc: Add golden context to GuC ADS
> > > > > > 
> > > > > > Matthew Brost (36):
> > > > > >   drm/i915/guc: Relax CTB response timeout
> > > > > >   drm/i915/guc: Improve error message for unsolicited CT response
> > > > > >   drm/i915/guc: Increase size of CTB buffers
> > > > > >   drm/i915/guc: Add non blocking CTB send function
> > > > > >   drm/i915/guc: Add stall timer to non blocking CTB send function
> > > > > >   drm/i915/guc: Optimize CTB writes and reads
> > > > > >   drm/i915/guc: Add new GuC interface defines and structures
> > > > > >   drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor
> > > > > >   drm/i915/guc: Add lrc descriptor context lookup array
> > > > > >   drm/i915/guc: Implement GuC submission tasklet
> > > > > >   drm/i915/guc: Add bypass tasklet submission path to GuC
> > > > > >   drm/i915/guc: Implement GuC context operations for new inteface
> > > > > >   drm/i915/guc: Insert fence on context when deregistering
> > > > > >   drm/i915/guc: Defer context unpin until scheduling is disabled
> > > > > >   drm/i915/guc: Disable engine barriers with GuC during unpin
> > > > > >   drm/i915/guc: Extend deregistration fence to schedule disable
> > > > > >   drm/i915: Disable preempt busywait when using GuC scheduling
> > > > > >   drm/i915/guc: Ensure request ordering via completion fences
> > > > > >   drm/i915/guc: Disable semaphores when using GuC scheduling
> > > > > >   drm/i915/guc: Ensure G2H response has space in buffer
> > > > > >   drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC
> > > > > >   drm/i915/guc: Update GuC debugfs to support new GuC
> > > > > >   drm/i915/guc: Add several request trace points
> > > > > >   drm/i915: Add intel_context tracing
> > > > > >   drm/i915/guc: GuC virtual engines
> > > > > >   drm/i915: Hold reference to intel_context over life of i915_request
> > > > > >   drm/i915/guc: Disable bonding extension with GuC submission
> > > > > >   drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs
> > > > > >   drm/i915/guc: Reset implementation for new GuC interface
> > > > > >   drm/i915: Reset GPU immediately if submission is disabled
> > > > > >   drm/i915/guc: Add disable interrupts to guc sanitize
> > > > > >   drm/i915/guc: Suspend/resume implementation for new interface
> > > > > >   drm/i915/guc: Handle context reset notification
> > > > > >   drm/i915/guc: Handle engine reset failure notification
> > > > > >   drm/i915/guc: Enable the timer expired interrupt for GuC
> > > > > >   drm/i915/guc: Capture error state on context reset
> > > > > > 
> > > > > >  drivers/gpu/drm/i915/gem/i915_gem_context.c   |   30 +-
> > > > > >  drivers/gpu/drm/i915/gem/i915_gem_context.h   |    1 +
> > > > > >  drivers/gpu/drm/i915/gem/i915_gem_mman.c      |    3 +-
> > > > > >  drivers/gpu/drm/i915/gt/gen8_engine_cs.c      |    6 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_breadcrumbs.c   |   41 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_breadcrumbs.h   |   14 +-
> > > > > >  .../gpu/drm/i915/gt/intel_breadcrumbs_types.h |    7 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_context.c       |   41 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_context.h       |   31 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_context_types.h |   49 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_engine.h        |   72 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  182 +-
> > > > > >  .../gpu/drm/i915/gt/intel_engine_heartbeat.c  |   71 +-
> > > > > >  .../gpu/drm/i915/gt/intel_engine_heartbeat.h  |    4 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_engine_types.h  |   12 +-
> > > > > >  .../drm/i915/gt/intel_execlists_submission.c  |  234 +-
> > > > > >  .../drm/i915/gt/intel_execlists_submission.h  |   11 -
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt.c            |   21 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt.h            |    2 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt_pm.c         |    6 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt_requests.c   |   22 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt_requests.h   |    9 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_lrc_reg.h       |    1 -
> > > > > >  drivers/gpu/drm/i915/gt/intel_reset.c         |   20 +-
> > > > > >  .../gpu/drm/i915/gt/intel_ring_submission.c   |   28 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_rps.c           |    4 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_workarounds.c   |   46 +-
> > > > > >  .../gpu/drm/i915/gt/intel_workarounds_types.h |    1 +
> > > > > >  drivers/gpu/drm/i915/gt/mock_engine.c         |   41 +-
> > > > > >  drivers/gpu/drm/i915/gt/selftest_context.c    |   10 +
> > > > > >  drivers/gpu/drm/i915/gt/selftest_execlists.c  |   20 +-
> > > > > >  .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   15 +
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc.c        |   82 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  106 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    |  460 +++-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h    |    3 +
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c     |  318 ++-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h     |   22 +-
> > > > > >  .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c    |   25 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   88 +-
> > > > > >  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 2197 +++++++++++++++--
> > > > > >  .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   17 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_uc.c         |  102 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_uc.h         |   11 +
> > > > > >  drivers/gpu/drm/i915/i915_debugfs.c           |    2 +
> > > > > >  drivers/gpu/drm/i915/i915_debugfs_params.c    |   31 +
> > > > > >  drivers/gpu/drm/i915/i915_gem_evict.c         |    1 +
> > > > > >  drivers/gpu/drm/i915/i915_gpu_error.c         |   25 +-
> > > > > >  drivers/gpu/drm/i915/i915_reg.h               |    2 +
> > > > > >  drivers/gpu/drm/i915/i915_request.c           |  159 +-
> > > > > >  drivers/gpu/drm/i915/i915_request.h           |   21 +
> > > > > >  drivers/gpu/drm/i915/i915_scheduler.c         |    6 +
> > > > > >  drivers/gpu/drm/i915/i915_scheduler.h         |    6 +
> > > > > >  drivers/gpu/drm/i915/i915_scheduler_types.h   |    5 +
> > > > > >  drivers/gpu/drm/i915/i915_trace.h             |  197 +-
> > > > > >  .../gpu/drm/i915/selftests/igt_live_test.c    |    2 +-
> > > > > >  .../gpu/drm/i915/selftests/mock_gem_device.c  |    3 +-
> > > > > >  57 files changed, 4159 insertions(+), 787 deletions(-)
> > > > > > 
> > > > > > -- 
> > > > > > 2.28.0
> > > > > > 

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com>
To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	daniele.ceraolospurio@intel.com, john.c.harrison@intel.com
Subject: Re: [Intel-gfx] [PATCH 00/47] GuC submission support
Date: Tue, 26 Oct 2021 08:43:03 -0700	[thread overview]
Message-ID: <20211026154303.GA12465@jons-linux-dev-box> (raw)
In-Reply-To: <163523877564.3841.4449806608079864803@jlahtine-mobl.ger.corp.intel.com>

On Tue, Oct 26, 2021 at 11:59:35AM +0300, Joonas Lahtinen wrote:
> Quoting Matthew Brost (2021-10-25 18:15:09)
> > On Mon, Oct 25, 2021 at 12:37:02PM +0300, Joonas Lahtinen wrote:
> > > Quoting Matthew Brost (2021-10-22 19:42:19)
> > > > On Fri, Oct 22, 2021 at 12:35:04PM +0300, Joonas Lahtinen wrote:
> > > > > Hi Matt & John,
> > > > > 
> > > > > Can you please queue patches with the right Fixes: references to convert
> > > > > all the GuC tracepoints to be protected by the LOW_LEVEL_TRACEPOINTS
> > > > > protection for now. Please do so before next Wednesday so we get it
> > > > > queued in drm-intel-next-fixes.
> > > > > 
> > > > 
> > > > Don't we already do that? I checked i915_trace.h and every tracepoint I
> > > > added (intel_context class, i915_request_guc_submit) is protected by
> > > > LOW_LEVEL_TRACEPOINTS.
> > > > 
> > > > The only thing I changed outside of that protection is adding the guc_id
> > > > field to existing i915_request class tracepoints.
> > > 
> > > It's the first search hit for "guc" inside the i915_trace.h file :)
> > > 
> > > > Without the guc_id in
> > > > those tracepoints these are basically useless with GuC submission. We
> > > > could revert that if it is a huge deal but as I said then they are
> > > > useless...
> > > 
> > > Let's eliminate it for now and restore the tracepoint exactly as it was.
> > > 
> > 
> > Don't really agree - let's render tracepoints to be useless? Are
> > tracepoints ABI? I googled this and couldn't really find a definie
> > answer. If tracepoints are ABI, then OK I can revert this change but
> > still this is a poor technical decision (tracepoints should not be ABI).
> 
> Thats a very heated discussion in general. But the fact is that if
> tracepoint changes have caused regressions to applications, they have
> been forced to be remain untouched. You are free to raise the discussion
> with Linus/LKML if you feel that should not be the case. So the end
> result is that tracepoints are effectively in limbo, not ABI unless some
> application uses them like ABI.
> 

Not trying to start or fight a holy war. If the current rules are don't
change tracepoints, we won't. Patch posted, let's stay focused, get an
RB, and move on.

Matt

> Feel free to search the intel-gfx/lkml for "tracepoints" keyword and look
> for threads with many replies. It's not that I would not agree, it's more
> that I'm not in the mood for repeating that discussion over and over again
> and always land in the same spot.
> 
> So for now, we don't add anything new to tracepoints we can't guarantee
> to always be there untouched. Similarly, we don't guarantee any of them
> to remain stable. So we try to be compatible with the limbo.
> 
> I'm long overdue waiting for some stable consumer to step up for the
> tracepoints, so we can then start discussion what would actually be the
> best way of getting that information out for them. In ~5 years that has
> not happened.
> 
> > > If there is an immediate need, we should instead have an auxilary tracepoint
> > > which is enabled only through LOW_LEVEL_TRACEPOINTS and that amends the
> > > information of the basic tracepoint.
> > > 
> > 
> > Regardless of what I said above, I'll post 2 patches. The 1st just
> > remove the GuC, the 2nd modify the tracepoint to include guc_id if
> > LOW_LEVEL_TRACEPOINTS is defined.
> 
> Thanks. Let's get a patch merged which simply drops the guc_id for now
> to unblock things.
> 
> For the second, an auxilary tracepoint will be preferred instead of
> mutating the existing one (regardless of the LOW_LEVEL_TRACEPOINTS).
> 
> I only noticed a patch that mutates the tracepoints, can you
> double-check sending the first patch?
> 
> Regards, Joonas
> 
> > 
> > > For the longer term solution we should align towards the dma fence
> > > tracepoints. When those are combined with the OA information, one should
> > > be able to get a good understanding of both the software and hardware
> > > scheduling decisions.
> > > 
> > 
> > Not sure about this either. I use these tracepoins to correlate things
> > to the GuC log. Between the 2, if you know what you are doing you
> > basically can figure out everything that is happening. Fields in the
> > trace translate directly to fields in the GuC log. Some of these fields
> > are backend specific, not sure how these could be pushed the dma fence
> > tracepoints. For what it is worth, without these tracepoints we'd likely
> > still have a bunch of bugs in the GuC firmware. I understand these
> > points, several other i915 developers do, and several of the GuC
> > firmware developers do too.
> > 
> > Matt
> > 
> > > Regards, Joonas
> > > 
> > > > 
> > > > Matt
> > > > 
> > > > > There's the orthogonal track to discuss what would be the stable set of
> > > > > tracepoints we could expose. However, before that discussion is closed,
> > > > > let's keep a rather strict line to avoid potential maintenance burned.
> > > > > 
> > > > > We can then relax in the future as needed.
> > > > > 
> > > > > Regards, Joonas
> > > > > 
> > > > > Quoting Matthew Brost (2021-06-24 10:04:29)
> > > > > > As discussed in [1], [2] we are enabling GuC submission support in the
> > > > > > i915. This is a subset of the patches in step 5 described in [1],
> > > > > > basically it is absolute to enable CI with GuC submission on gen11+
> > > > > > platforms.
> > > > > > 
> > > > > > This series itself will likely be broken down into smaller patch sets to
> > > > > > merge. Likely into CTBs changes, basic submission, virtual engines, and
> > > > > > resets.
> > > > > > 
> > > > > > A following series will address the missing patches remaining from [1].
> > > > > > 
> > > > > > Locally tested on TGL machine and basic tests seem to be passing.
> > > > > > 
> > > > > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > > > > 
> > > > > > [1] https://patchwork.freedesktop.org/series/89844/
> > > > > > [2] https://patchwork.freedesktop.org/series/91417/
> > > > > > 
> > > > > > Daniele Ceraolo Spurio (1):
> > > > > >   drm/i915/guc: Unblock GuC submission on Gen11+
> > > > > > 
> > > > > > John Harrison (10):
> > > > > >   drm/i915/guc: Module load failure test for CT buffer creation
> > > > > >   drm/i915: Track 'serial' counts for virtual engines
> > > > > >   drm/i915/guc: Provide mmio list to be saved/restored on engine reset
> > > > > >   drm/i915/guc: Don't complain about reset races
> > > > > >   drm/i915/guc: Enable GuC engine reset
> > > > > >   drm/i915/guc: Fix for error capture after full GPU reset with GuC
> > > > > >   drm/i915/guc: Hook GuC scheduling policies up
> > > > > >   drm/i915/guc: Connect reset modparam updates to GuC policy flags
> > > > > >   drm/i915/guc: Include scheduling policies in the debugfs state dump
> > > > > >   drm/i915/guc: Add golden context to GuC ADS
> > > > > > 
> > > > > > Matthew Brost (36):
> > > > > >   drm/i915/guc: Relax CTB response timeout
> > > > > >   drm/i915/guc: Improve error message for unsolicited CT response
> > > > > >   drm/i915/guc: Increase size of CTB buffers
> > > > > >   drm/i915/guc: Add non blocking CTB send function
> > > > > >   drm/i915/guc: Add stall timer to non blocking CTB send function
> > > > > >   drm/i915/guc: Optimize CTB writes and reads
> > > > > >   drm/i915/guc: Add new GuC interface defines and structures
> > > > > >   drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor
> > > > > >   drm/i915/guc: Add lrc descriptor context lookup array
> > > > > >   drm/i915/guc: Implement GuC submission tasklet
> > > > > >   drm/i915/guc: Add bypass tasklet submission path to GuC
> > > > > >   drm/i915/guc: Implement GuC context operations for new inteface
> > > > > >   drm/i915/guc: Insert fence on context when deregistering
> > > > > >   drm/i915/guc: Defer context unpin until scheduling is disabled
> > > > > >   drm/i915/guc: Disable engine barriers with GuC during unpin
> > > > > >   drm/i915/guc: Extend deregistration fence to schedule disable
> > > > > >   drm/i915: Disable preempt busywait when using GuC scheduling
> > > > > >   drm/i915/guc: Ensure request ordering via completion fences
> > > > > >   drm/i915/guc: Disable semaphores when using GuC scheduling
> > > > > >   drm/i915/guc: Ensure G2H response has space in buffer
> > > > > >   drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC
> > > > > >   drm/i915/guc: Update GuC debugfs to support new GuC
> > > > > >   drm/i915/guc: Add several request trace points
> > > > > >   drm/i915: Add intel_context tracing
> > > > > >   drm/i915/guc: GuC virtual engines
> > > > > >   drm/i915: Hold reference to intel_context over life of i915_request
> > > > > >   drm/i915/guc: Disable bonding extension with GuC submission
> > > > > >   drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs
> > > > > >   drm/i915/guc: Reset implementation for new GuC interface
> > > > > >   drm/i915: Reset GPU immediately if submission is disabled
> > > > > >   drm/i915/guc: Add disable interrupts to guc sanitize
> > > > > >   drm/i915/guc: Suspend/resume implementation for new interface
> > > > > >   drm/i915/guc: Handle context reset notification
> > > > > >   drm/i915/guc: Handle engine reset failure notification
> > > > > >   drm/i915/guc: Enable the timer expired interrupt for GuC
> > > > > >   drm/i915/guc: Capture error state on context reset
> > > > > > 
> > > > > >  drivers/gpu/drm/i915/gem/i915_gem_context.c   |   30 +-
> > > > > >  drivers/gpu/drm/i915/gem/i915_gem_context.h   |    1 +
> > > > > >  drivers/gpu/drm/i915/gem/i915_gem_mman.c      |    3 +-
> > > > > >  drivers/gpu/drm/i915/gt/gen8_engine_cs.c      |    6 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_breadcrumbs.c   |   41 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_breadcrumbs.h   |   14 +-
> > > > > >  .../gpu/drm/i915/gt/intel_breadcrumbs_types.h |    7 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_context.c       |   41 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_context.h       |   31 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_context_types.h |   49 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_engine.h        |   72 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  182 +-
> > > > > >  .../gpu/drm/i915/gt/intel_engine_heartbeat.c  |   71 +-
> > > > > >  .../gpu/drm/i915/gt/intel_engine_heartbeat.h  |    4 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_engine_types.h  |   12 +-
> > > > > >  .../drm/i915/gt/intel_execlists_submission.c  |  234 +-
> > > > > >  .../drm/i915/gt/intel_execlists_submission.h  |   11 -
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt.c            |   21 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt.h            |    2 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt_pm.c         |    6 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt_requests.c   |   22 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_gt_requests.h   |    9 +-
> > > > > >  drivers/gpu/drm/i915/gt/intel_lrc_reg.h       |    1 -
> > > > > >  drivers/gpu/drm/i915/gt/intel_reset.c         |   20 +-
> > > > > >  .../gpu/drm/i915/gt/intel_ring_submission.c   |   28 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_rps.c           |    4 +
> > > > > >  drivers/gpu/drm/i915/gt/intel_workarounds.c   |   46 +-
> > > > > >  .../gpu/drm/i915/gt/intel_workarounds_types.h |    1 +
> > > > > >  drivers/gpu/drm/i915/gt/mock_engine.c         |   41 +-
> > > > > >  drivers/gpu/drm/i915/gt/selftest_context.c    |   10 +
> > > > > >  drivers/gpu/drm/i915/gt/selftest_execlists.c  |   20 +-
> > > > > >  .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   15 +
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc.c        |   82 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc.h        |  106 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c    |  460 +++-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h    |    3 +
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c     |  318 ++-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h     |   22 +-
> > > > > >  .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c    |   25 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   88 +-
> > > > > >  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 2197 +++++++++++++++--
> > > > > >  .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   17 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_uc.c         |  102 +-
> > > > > >  drivers/gpu/drm/i915/gt/uc/intel_uc.h         |   11 +
> > > > > >  drivers/gpu/drm/i915/i915_debugfs.c           |    2 +
> > > > > >  drivers/gpu/drm/i915/i915_debugfs_params.c    |   31 +
> > > > > >  drivers/gpu/drm/i915/i915_gem_evict.c         |    1 +
> > > > > >  drivers/gpu/drm/i915/i915_gpu_error.c         |   25 +-
> > > > > >  drivers/gpu/drm/i915/i915_reg.h               |    2 +
> > > > > >  drivers/gpu/drm/i915/i915_request.c           |  159 +-
> > > > > >  drivers/gpu/drm/i915/i915_request.h           |   21 +
> > > > > >  drivers/gpu/drm/i915/i915_scheduler.c         |    6 +
> > > > > >  drivers/gpu/drm/i915/i915_scheduler.h         |    6 +
> > > > > >  drivers/gpu/drm/i915/i915_scheduler_types.h   |    5 +
> > > > > >  drivers/gpu/drm/i915/i915_trace.h             |  197 +-
> > > > > >  .../gpu/drm/i915/selftests/igt_live_test.c    |    2 +-
> > > > > >  .../gpu/drm/i915/selftests/mock_gem_device.c  |    3 +-
> > > > > >  57 files changed, 4159 insertions(+), 787 deletions(-)
> > > > > > 
> > > > > > -- 
> > > > > > 2.28.0
> > > > > > 

  reply	other threads:[~2021-10-26 15:49 UTC|newest]

Thread overview: 336+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-24  7:04 [PATCH 00/47] GuC submission support Matthew Brost
2021-06-24  7:04 ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 01/47] drm/i915/guc: Relax CTB response timeout Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-24 17:23   ` Michal Wajdeczko
2021-06-24 17:23     ` [Intel-gfx] " Michal Wajdeczko
2021-06-24  7:04 ` [PATCH 02/47] drm/i915/guc: Improve error message for unsolicited CT response Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-25 11:58   ` Michal Wajdeczko
2021-06-25 11:58     ` Michal Wajdeczko
2021-06-24  7:04 ` [PATCH 03/47] drm/i915/guc: Increase size of CTB buffers Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-24 13:49   ` Michal Wajdeczko
2021-06-24 13:49     ` [Intel-gfx] " Michal Wajdeczko
2021-06-24 15:41     ` Matthew Brost
2021-06-24 15:41       ` [Intel-gfx] " Matthew Brost
2021-06-25 12:03       ` Michal Wajdeczko
2021-06-25 12:03         ` [Intel-gfx] " Michal Wajdeczko
2021-06-24  7:04 ` [PATCH 04/47] drm/i915/guc: Add non blocking CTB send function Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-24 14:48   ` Michal Wajdeczko
2021-06-24 14:48     ` Michal Wajdeczko
2021-06-24 15:49     ` Matthew Brost
2021-06-24 15:49       ` Matthew Brost
2021-06-24 17:02       ` Michal Wajdeczko
2021-06-24 17:02         ` Michal Wajdeczko
2021-06-24 22:41         ` Matthew Brost
2021-06-24 22:41           ` Matthew Brost
2021-06-25 11:50           ` Michal Wajdeczko
2021-06-25 11:50             ` Michal Wajdeczko
2021-06-25 17:53             ` Matthew Brost
2021-06-25 17:53               ` Matthew Brost
2021-06-24 22:47         ` Matthew Brost
2021-06-24 22:47           ` Matthew Brost
2021-06-24  7:04 ` [PATCH 05/47] drm/i915/guc: Add stall timer to " Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-24 17:37   ` Michal Wajdeczko
2021-06-24 17:37     ` Michal Wajdeczko
2021-06-24 23:01     ` Matthew Brost
2021-06-24 23:01       ` Matthew Brost
2021-06-24  7:04 ` [PATCH 06/47] drm/i915/guc: Optimize CTB writes and reads Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-25 13:09   ` Michal Wajdeczko
2021-06-25 13:09     ` Michal Wajdeczko
2021-06-25 18:26     ` Matthew Brost
2021-06-25 18:26       ` Matthew Brost
2021-06-25 20:28     ` Matthew Brost
2021-06-25 20:28       ` Matthew Brost
2021-06-24  7:04 ` [PATCH 07/47] drm/i915/guc: Module load failure test for CT buffer creation Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 08/47] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-29 21:11   ` John Harrison
2021-06-29 21:11     ` [Intel-gfx] " John Harrison
2021-06-30  0:30     ` Matthew Brost
2021-06-30  0:30       ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 09/47] drm/i915/guc: Remove GuC stage descriptor, add lrc descriptor Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-25 19:44   ` John Harrison
2021-06-25 19:44     ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 10/47] drm/i915/guc: Add lrc descriptor context lookup array Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-25 13:17   ` Michal Wajdeczko
2021-06-25 13:17     ` [Intel-gfx] " Michal Wajdeczko
2021-06-25 17:26     ` Matthew Brost
2021-06-25 17:26       ` [Intel-gfx] " Matthew Brost
2021-06-29 21:20       ` John Harrison
2021-06-29 21:20         ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 11/47] drm/i915/guc: Implement GuC submission tasklet Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-29 22:04   ` John Harrison
2021-06-29 22:04     ` [Intel-gfx] " John Harrison
2021-06-30  0:41     ` Matthew Brost
2021-06-30  0:41       ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 12/47] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-29 22:09   ` John Harrison
2021-06-29 22:09     ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 13/47] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-06-25 13:25   ` Michal Wajdeczko
2021-06-25 13:25     ` [Intel-gfx] " Michal Wajdeczko
2021-06-25 17:46     ` Matthew Brost
2021-06-25 17:46       ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 14/47] drm/i915/guc: Insert fence on context when deregistering Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-09 22:39   ` John Harrison
2021-07-09 22:39     ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 15/47] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-09 22:48   ` John Harrison
2021-07-09 22:48     ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 16/47] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-09 22:53   ` John Harrison
2021-07-09 22:53     ` [Intel-gfx] " John Harrison
2021-07-10  3:00     ` Matthew Brost
2021-07-10  3:00       ` [Intel-gfx] " Matthew Brost
2021-07-12 17:57       ` John Harrison
2021-07-12 17:57         ` [Intel-gfx] " John Harrison
2021-07-12 18:11         ` Daniel Vetter
2021-07-12 18:11           ` Daniel Vetter
2021-06-24  7:04 ` [PATCH 17/47] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-09 22:59   ` John Harrison
2021-07-09 22:59     ` [Intel-gfx] " John Harrison
2021-07-10  3:36     ` Matthew Brost
2021-07-10  3:36       ` [Intel-gfx] " Matthew Brost
2021-07-12 17:54       ` John Harrison
2021-07-12 17:54         ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 18/47] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-09 23:03   ` John Harrison
2021-07-09 23:03     ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 19/47] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-15  1:51   ` Daniele Ceraolo Spurio
2021-07-15  1:51     ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-24  7:04 ` [PATCH 20/47] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-09 23:53   ` John Harrison
2021-07-09 23:53     ` [Intel-gfx] " John Harrison
2021-07-15  0:07     ` Matthew Brost
2021-07-15  0:07       ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 21/47] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-13 18:36   ` John Harrison
2021-07-13 18:36     ` [Intel-gfx] " John Harrison
2021-07-15  0:06     ` Matthew Brost
2021-07-15  0:06       ` [Intel-gfx] " Matthew Brost
2021-07-15  0:12       ` John Harrison
2021-07-15  0:12         ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 22/47] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-10  0:16   ` John Harrison
2021-07-10  0:16     ` [Intel-gfx] " John Harrison
2021-07-10  3:55     ` Matthew Brost
2021-07-10  3:55       ` [Intel-gfx] " Matthew Brost
2021-07-17  4:09       ` Matthew Brost
2021-07-17  4:09         ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 23/47] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-12 18:05   ` John Harrison
2021-07-12 18:05     ` [Intel-gfx] " John Harrison
2021-07-12 20:59     ` Matthew Brost
2021-07-12 20:59       ` [Intel-gfx] " Matthew Brost
2021-07-12 21:37       ` John Harrison
2021-07-12 21:37         ` [Intel-gfx] " John Harrison
2021-07-13  8:51   ` Michal Wajdeczko
2021-07-13  8:51     ` [Intel-gfx] " Michal Wajdeczko
2021-07-14 23:56     ` Matthew Brost
2021-07-14 23:56       ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 24/47] drm/i915/guc: Add several request trace points Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-12 18:08   ` John Harrison
2021-07-12 18:08     ` [Intel-gfx] " John Harrison
2021-07-13  9:06   ` Tvrtko Ursulin
2021-07-13  9:06     ` Tvrtko Ursulin
2021-07-20  1:59     ` Matthew Brost
2021-07-20  1:59       ` Matthew Brost
2021-07-22 13:55       ` Tvrtko Ursulin
2021-07-22 13:55         ` Tvrtko Ursulin
2021-06-24  7:04 ` [PATCH 25/47] drm/i915: Add intel_context tracing Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-12 18:10   ` John Harrison
2021-07-12 18:10     ` [Intel-gfx] " John Harrison
2021-07-12 21:47     ` Matthew Brost
2021-07-12 21:47       ` [Intel-gfx] " Matthew Brost
2021-07-12 21:51       ` John Harrison
2021-07-12 21:51         ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 26/47] drm/i915/guc: GuC virtual engines Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-15  1:21   ` Daniele Ceraolo Spurio
2021-07-15  1:21     ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-24  7:04 ` [PATCH 27/47] drm/i915: Track 'serial' counts for " Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-12 18:11   ` John Harrison
2021-07-12 18:11     ` [Intel-gfx] " John Harrison
2021-07-12 20:06     ` Matthew Brost
2021-07-12 20:06       ` [Intel-gfx] " Matthew Brost
2021-06-24  7:04 ` [PATCH 28/47] drm/i915: Hold reference to intel_context over life of i915_request Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-12 18:23   ` John Harrison
2021-07-12 18:23     ` [Intel-gfx] " John Harrison
2021-07-12 20:05     ` Matthew Brost
2021-07-12 20:05       ` [Intel-gfx] " Matthew Brost
2021-07-12 21:36       ` Matthew Brost
2021-07-12 21:36         ` Matthew Brost
2021-07-12 21:48         ` John Harrison
2021-07-12 21:48           ` John Harrison
2021-06-24  7:04 ` [PATCH 29/47] drm/i915/guc: Disable bonding extension with GuC submission Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-12 18:23   ` John Harrison
2021-07-12 18:23     ` [Intel-gfx] " John Harrison
2021-06-24  7:04 ` [PATCH 30/47] drm/i915/guc: Direct all breadcrumbs for a class to single breadcrumbs Matthew Brost
2021-06-24  7:04   ` [Intel-gfx] " Matthew Brost
2021-07-12 19:19   ` John Harrison
2021-07-12 19:19     ` [Intel-gfx] " John Harrison
2021-06-24  7:05 ` [PATCH 31/47] drm/i915/guc: Reset implementation for new GuC interface Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 19:58   ` John Harrison
2021-07-12 19:58     ` [Intel-gfx] " John Harrison
2021-07-15  0:53     ` Matthew Brost
2021-07-15  0:53       ` [Intel-gfx] " Matthew Brost
2021-07-15  9:36   ` Tvrtko Ursulin
2021-07-15  9:36     ` Tvrtko Ursulin
2021-07-26 22:48     ` Matthew Brost
2021-07-26 22:48       ` Matthew Brost
2021-07-27  8:56       ` Tvrtko Ursulin
2021-07-27  8:56         ` Tvrtko Ursulin
2021-07-27 18:30         ` Matthew Brost
2021-07-27 18:30           ` Matthew Brost
2021-06-24  7:05 ` [PATCH 32/47] drm/i915: Reset GPU immediately if submission is disabled Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 20:01   ` John Harrison
2021-07-12 20:01     ` [Intel-gfx] " John Harrison
2021-06-24  7:05 ` [PATCH 33/47] drm/i915/guc: Add disable interrupts to guc sanitize Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 20:11   ` John Harrison
2021-07-12 20:11     ` [Intel-gfx] " John Harrison
2021-06-24  7:05 ` [PATCH 34/47] drm/i915/guc: Suspend/resume implementation for new interface Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 22:56   ` John Harrison
2021-07-12 22:56     ` [Intel-gfx] " John Harrison
2021-06-24  7:05 ` [PATCH 35/47] drm/i915/guc: Handle context reset notification Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 22:58   ` John Harrison
2021-07-12 22:58     ` [Intel-gfx] " John Harrison
2021-07-15  0:32     ` Matthew Brost
2021-07-15  0:32       ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 36/47] drm/i915/guc: Handle engine reset failure notification Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 22:59   ` John Harrison
2021-07-12 22:59     ` [Intel-gfx] " John Harrison
2021-06-24  7:05 ` [PATCH 37/47] drm/i915/guc: Enable the timer expired interrupt for GuC Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 23:00   ` John Harrison
2021-07-12 23:00     ` [Intel-gfx] " John Harrison
2021-06-24  7:05 ` [PATCH 38/47] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 39/47] drm/i915/guc: Don't complain about reset races Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-24 15:55   ` Matthew Brost
2021-06-24 15:55     ` Matthew Brost
2021-06-24  7:05 ` [PATCH 40/47] drm/i915/guc: Enable GuC engine reset Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-24 16:19   ` Matthew Brost
2021-06-24 16:19     ` Matthew Brost
2021-06-24  7:05 ` [PATCH 41/47] drm/i915/guc: Capture error state on context reset Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-12 23:05   ` John Harrison
2021-07-12 23:05     ` [Intel-gfx] " John Harrison
2021-06-24  7:05 ` [PATCH 42/47] drm/i915/guc: Fix for error capture after full GPU reset with GuC Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-07-15  0:43   ` Matthew Brost
2021-07-15  0:43     ` Matthew Brost
2021-06-24  7:05 ` [PATCH 43/47] drm/i915/guc: Hook GuC scheduling policies up Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-25  0:59   ` Matthew Brost
2021-06-25  0:59     ` Matthew Brost
2021-06-25 19:10     ` John Harrison
2021-06-25 19:10       ` John Harrison
2021-07-10 18:56       ` Matthew Brost
2021-07-10 18:56         ` Matthew Brost
2021-06-24  7:05 ` [PATCH 44/47] drm/i915/guc: Connect reset modparam updates to GuC policy flags Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-25  1:10   ` Matthew Brost
2021-06-25  1:10     ` Matthew Brost
2021-06-24  7:05 ` [PATCH 45/47] drm/i915/guc: Include scheduling policies in the debugfs state dump Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-24 16:34   ` Matthew Brost
2021-06-24 16:34     ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 46/47] drm/i915/guc: Add golden context to GuC ADS Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-24  7:05 ` [PATCH 47/47] drm/i915/guc: Unblock GuC submission on Gen11+ Matthew Brost
2021-06-24  7:05   ` [Intel-gfx] " Matthew Brost
2021-06-30  8:22   ` Martin Peres
2021-06-30  8:22     ` [Intel-gfx] " Martin Peres
2021-06-30 18:00     ` Matthew Brost
2021-06-30 18:00       ` [Intel-gfx] " Matthew Brost
2021-07-01 18:24       ` Martin Peres
2021-07-01 18:24         ` [Intel-gfx] " Martin Peres
2021-07-02  8:13         ` Martin Peres
2021-07-02  8:13           ` [Intel-gfx] " Martin Peres
2021-07-02 13:06           ` Michal Wajdeczko
2021-07-02 13:06             ` [Intel-gfx] " Michal Wajdeczko
2021-07-02 13:12             ` Martin Peres
2021-07-02 13:12               ` [Intel-gfx] " Martin Peres
2021-07-02 14:08               ` Michal Wajdeczko
2021-07-02 14:08                 ` [Intel-gfx] " Michal Wajdeczko
2021-06-30 18:58     ` John Harrison
2021-06-30 18:58       ` [Intel-gfx] " John Harrison
2021-07-01  8:14       ` Pekka Paalanen
2021-07-01  8:14         ` [Intel-gfx] " Pekka Paalanen
2021-07-01 18:27         ` Martin Peres
2021-07-01 18:27           ` [Intel-gfx] " Martin Peres
2021-07-01 19:28           ` Daniel Vetter
2021-07-01 19:28             ` Daniel Vetter
2021-07-02  7:29             ` Pekka Paalanen
2021-07-02  7:29               ` Pekka Paalanen
2021-07-02  8:09               ` Martin Peres
2021-07-02  8:09                 ` Martin Peres
2021-07-02 15:07                 ` Michal Wajdeczko
2021-07-02 15:07                   ` Michal Wajdeczko
2021-07-03  8:21                   ` Martin Peres
2021-07-03  8:21                     ` Martin Peres
2021-07-07  0:57                     ` John Harrison
2021-07-07  0:57                       ` John Harrison
2021-07-07  7:47                       ` Pekka Paalanen
2021-07-07  7:47                         ` Pekka Paalanen
2021-07-07 10:11                       ` Michal Wajdeczko
2021-07-07 10:11                         ` Michal Wajdeczko
2021-07-15  0:49   ` Matthew Brost
2021-07-15  0:49     ` Matthew Brost
2021-06-24  7:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GuC submission support Patchwork
2021-06-24  7:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-24  7:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-07-12 19:23 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for GuC submission support (rev2) Patchwork
2021-10-22  9:35 ` [PATCH 00/47] GuC submission support Joonas Lahtinen
2021-10-22  9:35   ` [Intel-gfx] " Joonas Lahtinen
2021-10-22 16:42   ` Matthew Brost
2021-10-22 16:42     ` [Intel-gfx] " Matthew Brost
2021-10-25  9:37     ` Joonas Lahtinen
2021-10-25  9:37       ` [Intel-gfx] " Joonas Lahtinen
2021-10-25 15:15       ` Matthew Brost
2021-10-25 15:15         ` [Intel-gfx] " Matthew Brost
2021-10-26  8:59         ` Joonas Lahtinen
2021-10-26  8:59           ` [Intel-gfx] " Joonas Lahtinen
2021-10-26 15:43           ` Matthew Brost [this message]
2021-10-26 15:43             ` Matthew Brost
2021-10-26 15:51           ` Matthew Brost
2021-10-26 15:51             ` [Intel-gfx] " Matthew Brost
2021-10-27  9:21             ` Joonas Lahtinen
2021-10-27  9:21               ` [Intel-gfx] " Joonas Lahtinen
2021-10-25 17:06       ` John Harrison
2021-10-25 17:06         ` [Intel-gfx] " John Harrison

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