From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>, Sundaresan Sujaritha <sujaritha.sundaresan@intel.com> Subject: [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Date: Wed, 21 Jul 2021 09:11:14 -0700 [thread overview] Message-ID: <20210721161120.24610-9-vinay.belgaumkar@intel.com> (raw) In-Reply-To: <20210721161120.24610-1-vinay.belgaumkar@intel.com> Add helpers to read the min/max frequency being used by SLPC. This is done by send a H2G command which forces SLPC to update the shared data struct which can then be read. v2: Address review comments (Michal W) Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 52 +++++++++++++++++++++ drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 + 2 files changed, 54 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index b40c39ba4049..c1cf8d46e360 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -290,6 +290,32 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val) return ret; } +/** + * intel_guc_slpc_get_max_freq() - Get max frequency limit for SLPC. + * @slpc: pointer to intel_guc_slpc. + * @val: pointer to val which will hold max frequency (MHz) + * + * This function will invoke GuC SLPC action to read the max frequency + * limit for unslice. + * + * Return: 0 on success, non-zero error code on failure. + */ +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val) +{ + intel_wakeref_t wakeref; + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915; + int ret = 0; + + with_intel_runtime_pm(&i915->runtime_pm, wakeref) { + /* Force GuC to update task data */ + slpc_query_task_state(slpc); + + *val = slpc_decode_max_freq(slpc); + } + + return ret; +} + /** * intel_guc_slpc_set_min_freq() - Set min frequency limit for SLPC. * @slpc: pointer to intel_guc_slpc. @@ -322,6 +348,32 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) return ret; } +/** + * intel_guc_slpc_get_min_freq() - Get min frequency limit for SLPC. + * @slpc: pointer to intel_guc_slpc. + * @val: pointer to val which will hold min frequency (MHz) + * + * This function will invoke GuC SLPC action to read the min frequency + * limit for unslice. + * + * Return: 0 on success, non-zero error code on failure. + */ +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val) +{ + intel_wakeref_t wakeref; + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915; + int ret = 0; + + with_intel_runtime_pm(&i915->runtime_pm, wakeref) { + /* Force GuC to update task data */ + slpc_query_task_state(slpc); + + *val = slpc_decode_min_freq(slpc); + } + + return ret; +} + /* * intel_guc_slpc_enable() - Start SLPC * @slpc: pointer to intel_guc_slpc. diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h index 3a1a7eaafc12..627c71a95777 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h @@ -32,5 +32,7 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc); void intel_guc_slpc_fini(struct intel_guc_slpc *slpc); int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val); int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val); +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val); +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val); #endif -- 2.25.0
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From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Date: Wed, 21 Jul 2021 09:11:14 -0700 [thread overview] Message-ID: <20210721161120.24610-9-vinay.belgaumkar@intel.com> (raw) In-Reply-To: <20210721161120.24610-1-vinay.belgaumkar@intel.com> Add helpers to read the min/max frequency being used by SLPC. This is done by send a H2G command which forces SLPC to update the shared data struct which can then be read. v2: Address review comments (Michal W) Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 52 +++++++++++++++++++++ drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 + 2 files changed, 54 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index b40c39ba4049..c1cf8d46e360 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -290,6 +290,32 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val) return ret; } +/** + * intel_guc_slpc_get_max_freq() - Get max frequency limit for SLPC. + * @slpc: pointer to intel_guc_slpc. + * @val: pointer to val which will hold max frequency (MHz) + * + * This function will invoke GuC SLPC action to read the max frequency + * limit for unslice. + * + * Return: 0 on success, non-zero error code on failure. + */ +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val) +{ + intel_wakeref_t wakeref; + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915; + int ret = 0; + + with_intel_runtime_pm(&i915->runtime_pm, wakeref) { + /* Force GuC to update task data */ + slpc_query_task_state(slpc); + + *val = slpc_decode_max_freq(slpc); + } + + return ret; +} + /** * intel_guc_slpc_set_min_freq() - Set min frequency limit for SLPC. * @slpc: pointer to intel_guc_slpc. @@ -322,6 +348,32 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) return ret; } +/** + * intel_guc_slpc_get_min_freq() - Get min frequency limit for SLPC. + * @slpc: pointer to intel_guc_slpc. + * @val: pointer to val which will hold min frequency (MHz) + * + * This function will invoke GuC SLPC action to read the min frequency + * limit for unslice. + * + * Return: 0 on success, non-zero error code on failure. + */ +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val) +{ + intel_wakeref_t wakeref; + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915; + int ret = 0; + + with_intel_runtime_pm(&i915->runtime_pm, wakeref) { + /* Force GuC to update task data */ + slpc_query_task_state(slpc); + + *val = slpc_decode_min_freq(slpc); + } + + return ret; +} + /* * intel_guc_slpc_enable() - Start SLPC * @slpc: pointer to intel_guc_slpc. diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h index 3a1a7eaafc12..627c71a95777 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h @@ -32,5 +32,7 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc); void intel_guc_slpc_fini(struct intel_guc_slpc *slpc); int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val); int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val); +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val); +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val); #endif -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-07-21 16:12 UTC|newest] Thread overview: 107+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-21 16:11 [PATCH v2 00/14] drm/i915/guc: Enable GuC based power management features Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 16:11 ` [PATCH 01/14] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 16:11 ` [PATCH 02/14] drm/i915/guc/slpc: Initial definitions for SLPC Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 17:24 ` Michal Wajdeczko 2021-07-21 17:24 ` [Intel-gfx] " Michal Wajdeczko 2021-07-22 0:56 ` Belgaumkar, Vinay 2021-07-22 0:56 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 16:11 ` [PATCH 03/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 16:11 ` [PATCH 04/14] drm/i915/guc/slpc: Adding SLPC communication interfaces Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 17:25 ` Michal Wajdeczko 2021-07-21 17:25 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 19:26 ` Belgaumkar, Vinay 2021-07-23 19:26 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 16:11 ` [PATCH 05/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 17:26 ` Michal Wajdeczko 2021-07-21 17:26 ` Michal Wajdeczko 2021-07-23 19:30 ` Belgaumkar, Vinay 2021-07-23 19:30 ` Belgaumkar, Vinay 2021-07-21 16:11 ` [PATCH 06/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 17:38 ` Michal Wajdeczko 2021-07-21 17:38 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 19:28 ` Belgaumkar, Vinay 2021-07-23 19:28 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 23:44 ` kernel test robot 2021-07-21 23:44 ` kernel test robot 2021-07-21 23:44 ` [Intel-gfx] " kernel test robot 2021-07-22 2:36 ` kernel test robot 2021-07-22 2:36 ` kernel test robot 2021-07-22 2:36 ` [Intel-gfx] " kernel test robot 2021-07-22 18:07 ` kernel test robot 2021-07-22 18:07 ` kernel test robot 2021-07-22 18:07 ` [Intel-gfx] " kernel test robot 2021-07-22 18:07 ` [RFC PATCH] drm/i915/guc/slpc: slpc_decode_min_freq() can be static kernel test robot 2021-07-22 18:07 ` kernel test robot 2021-07-22 18:07 ` [Intel-gfx] " kernel test robot 2021-07-23 13:04 ` [PATCH 06/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events kernel test robot 2021-07-23 13:04 ` kernel test robot 2021-07-23 13:04 ` [Intel-gfx] " kernel test robot 2021-07-24 16:30 ` kernel test robot 2021-07-24 16:30 ` kernel test robot 2021-07-24 16:30 ` [Intel-gfx] " kernel test robot 2021-07-21 16:11 ` [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 17:42 ` Michal Wajdeczko 2021-07-21 17:42 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 19:35 ` Belgaumkar, Vinay 2021-07-23 19:35 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 16:11 ` Vinay Belgaumkar [this message] 2021-07-21 16:11 ` [Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar 2021-07-21 18:00 ` Michal Wajdeczko 2021-07-21 18:00 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 19:43 ` Belgaumkar, Vinay 2021-07-23 19:43 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 16:11 ` [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 18:05 ` Michal Wajdeczko 2021-07-21 18:05 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 19:49 ` Belgaumkar, Vinay 2021-07-23 19:49 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-22 1:29 ` kernel test robot 2021-07-22 1:29 ` kernel test robot 2021-07-22 1:29 ` [Intel-gfx] " kernel test robot 2021-07-24 0:31 ` kernel test robot 2021-07-24 0:31 ` kernel test robot 2021-07-24 0:31 ` [Intel-gfx] " kernel test robot 2021-07-24 0:31 ` [RFC PATCH] drm/i915/guc/slpc: intel_eval_slpc_support() can be static kernel test robot 2021-07-24 0:31 ` kernel test robot 2021-07-24 0:31 ` [Intel-gfx] " kernel test robot 2021-07-25 2:57 ` [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info kernel test robot 2021-07-25 2:57 ` kernel test robot 2021-07-25 2:57 ` [Intel-gfx] " kernel test robot 2021-07-21 16:11 ` [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 16:11 ` [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 18:09 ` Michal Wajdeczko 2021-07-21 18:09 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 22:25 ` Belgaumkar, Vinay 2021-07-23 22:25 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 16:11 ` [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 18:13 ` Michal Wajdeczko 2021-07-21 18:13 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 22:28 ` Belgaumkar, Vinay 2021-07-23 22:28 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 16:11 ` [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 16:11 ` [PATCH 14/14] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar 2021-07-21 16:11 ` [Intel-gfx] " Vinay Belgaumkar 2021-07-21 18:21 ` Michal Wajdeczko 2021-07-21 18:21 ` [Intel-gfx] " Michal Wajdeczko 2021-07-23 22:29 ` Belgaumkar, Vinay 2021-07-23 22:29 ` [Intel-gfx] " Belgaumkar, Vinay 2021-07-21 20:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Enable GuC based power management features Patchwork 2021-07-21 20:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-07-21 20:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-07-22 1:37 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2021-07-28 21:11 [PATCH v4 00/14] drm/i915/guc/slpc: " Vinay Belgaumkar 2021-07-28 21:11 ` [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar 2021-07-30 2:00 [PATCH v5 00/14] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar 2021-07-30 2:01 ` [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar 2021-07-30 20:21 [PATCH v6 00/14] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar 2021-07-30 20:21 ` [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
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