From: Auger Eric <eric.auger@redhat.com> To: Alexandru Elisei <alexandru.elisei@arm.com>, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, drjones@redhat.com Cc: andre.przywara@arm.com Subject: Re: [kvm-unit-tests PATCH 02/10] lib: arm/arm64: gicv2: Add missing barrier when sending IPIs Date: Tue, 1 Dec 2020 17:37:28 +0100 [thread overview] Message-ID: <43a43738-3169-c989-1067-4fa1964a83d7@redhat.com> (raw) In-Reply-To: <20201125155113.192079-3-alexandru.elisei@arm.com> Hi Alexandru, On 11/25/20 4:51 PM, Alexandru Elisei wrote: > GICv2 generates IPIs with a MMIO write to the GICD_SGIR register. A common > pattern for IPI usage is for the IPI receiver to read data written to > memory by the sender. The armv7 and armv8 architectures implement a > weakly-ordered memory model, which means that barriers are required to make > sure that the expected values are observed. > > It turns out that because the receiver CPU must observe the write to memory > that generated the IPI when reading the GICC_IAR MMIO register, we only > need to ensure ordering of memory accesses, and not completion. Use a > smp_wmb (DMB ISHST) barrier before sending the IPI. > > This also matches what the Linux GICv2 irqchip driver does (more details > in commit 8adbf57fc429 ("irqchip: gic: use dmb ishst instead of dsb when > raising a softirq")). > > Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Eric > --- > lib/arm/gic-v2.c | 4 ++++ > arm/gic.c | 2 ++ > 2 files changed, 6 insertions(+) > > diff --git a/lib/arm/gic-v2.c b/lib/arm/gic-v2.c > index dc6a97c600ec..da244c82de34 100644 > --- a/lib/arm/gic-v2.c > +++ b/lib/arm/gic-v2.c > @@ -45,6 +45,8 @@ void gicv2_ipi_send_single(int irq, int cpu) > { > assert(cpu < 8); > assert(irq < 16); > + > + smp_wmb(); > writel(1 << (cpu + 16) | irq, gicv2_dist_base() + GICD_SGIR); > } > > @@ -53,5 +55,7 @@ void gicv2_ipi_send_mask(int irq, const cpumask_t *dest) > u8 tlist = (u8)cpumask_bits(dest)[0]; > > assert(irq < 16); > + > + smp_wmb(); > writel(tlist << 16 | irq, gicv2_dist_base() + GICD_SGIR); > } > diff --git a/arm/gic.c b/arm/gic.c > index 512c83636a2e..401ffafe4299 100644 > --- a/arm/gic.c > +++ b/arm/gic.c > @@ -260,11 +260,13 @@ static void check_lpi_hits(int *expected, const char *msg) > > static void gicv2_ipi_send_self(void) > { > + smp_wmb(); > writel(2 << 24 | IPI_IRQ, gicv2_dist_base() + GICD_SGIR); > } > > static void gicv2_ipi_send_broadcast(void) > { > + smp_wmb(); > writel(1 << 24 | IPI_IRQ, gicv2_dist_base() + GICD_SGIR); > } > >
WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com> To: Alexandru Elisei <alexandru.elisei@arm.com>, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, drjones@redhat.com Cc: andre.przywara@arm.com Subject: Re: [kvm-unit-tests PATCH 02/10] lib: arm/arm64: gicv2: Add missing barrier when sending IPIs Date: Tue, 1 Dec 2020 17:37:28 +0100 [thread overview] Message-ID: <43a43738-3169-c989-1067-4fa1964a83d7@redhat.com> (raw) In-Reply-To: <20201125155113.192079-3-alexandru.elisei@arm.com> Hi Alexandru, On 11/25/20 4:51 PM, Alexandru Elisei wrote: > GICv2 generates IPIs with a MMIO write to the GICD_SGIR register. A common > pattern for IPI usage is for the IPI receiver to read data written to > memory by the sender. The armv7 and armv8 architectures implement a > weakly-ordered memory model, which means that barriers are required to make > sure that the expected values are observed. > > It turns out that because the receiver CPU must observe the write to memory > that generated the IPI when reading the GICC_IAR MMIO register, we only > need to ensure ordering of memory accesses, and not completion. Use a > smp_wmb (DMB ISHST) barrier before sending the IPI. > > This also matches what the Linux GICv2 irqchip driver does (more details > in commit 8adbf57fc429 ("irqchip: gic: use dmb ishst instead of dsb when > raising a softirq")). > > Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Eric > --- > lib/arm/gic-v2.c | 4 ++++ > arm/gic.c | 2 ++ > 2 files changed, 6 insertions(+) > > diff --git a/lib/arm/gic-v2.c b/lib/arm/gic-v2.c > index dc6a97c600ec..da244c82de34 100644 > --- a/lib/arm/gic-v2.c > +++ b/lib/arm/gic-v2.c > @@ -45,6 +45,8 @@ void gicv2_ipi_send_single(int irq, int cpu) > { > assert(cpu < 8); > assert(irq < 16); > + > + smp_wmb(); > writel(1 << (cpu + 16) | irq, gicv2_dist_base() + GICD_SGIR); > } > > @@ -53,5 +55,7 @@ void gicv2_ipi_send_mask(int irq, const cpumask_t *dest) > u8 tlist = (u8)cpumask_bits(dest)[0]; > > assert(irq < 16); > + > + smp_wmb(); > writel(tlist << 16 | irq, gicv2_dist_base() + GICD_SGIR); > } > diff --git a/arm/gic.c b/arm/gic.c > index 512c83636a2e..401ffafe4299 100644 > --- a/arm/gic.c > +++ b/arm/gic.c > @@ -260,11 +260,13 @@ static void check_lpi_hits(int *expected, const char *msg) > > static void gicv2_ipi_send_self(void) > { > + smp_wmb(); > writel(2 << 24 | IPI_IRQ, gicv2_dist_base() + GICD_SGIR); > } > > static void gicv2_ipi_send_broadcast(void) > { > + smp_wmb(); > writel(1 << 24 | IPI_IRQ, gicv2_dist_base() + GICD_SGIR); > } > > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2020-12-01 16:39 UTC|newest] Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-25 15:51 [kvm-unit-tests PATCH 00/10] GIC fixes and improvements Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-11-25 15:51 ` [kvm-unit-tests PATCH 01/10] lib: arm/arm64: gicv3: Add missing barrier when sending IPIs Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-01 16:37 ` Auger Eric 2020-12-01 16:37 ` Auger Eric 2020-12-01 17:37 ` Alexandru Elisei 2020-12-01 17:37 ` Alexandru Elisei 2020-11-25 15:51 ` [kvm-unit-tests PATCH 02/10] lib: arm/arm64: gicv2: " Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-01 16:37 ` Auger Eric [this message] 2020-12-01 16:37 ` Auger Eric 2020-11-25 15:51 ` [kvm-unit-tests PATCH 03/10] arm/arm64: gic: Remove memory synchronization from ipi_clear_active_handler() Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-01 16:37 ` Auger Eric 2020-12-01 16:37 ` Auger Eric 2020-12-02 14:02 ` Alexandru Elisei 2020-12-02 14:02 ` Alexandru Elisei 2020-12-02 14:14 ` Alexandru Elisei 2020-12-02 14:14 ` Alexandru Elisei 2020-12-03 9:41 ` Auger Eric 2020-12-03 9:41 ` Auger Eric 2020-11-25 15:51 ` [kvm-unit-tests PATCH 04/10] arm/arm64: gic: Remove unnecessary synchronization with stats_reset() Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-01 16:48 ` Auger Eric 2020-12-01 16:48 ` Auger Eric 2020-12-02 14:06 ` Alexandru Elisei 2020-12-02 14:06 ` Alexandru Elisei 2020-12-03 13:10 ` Auger Eric 2020-12-03 13:10 ` Auger Eric 2020-11-25 15:51 ` [kvm-unit-tests PATCH 05/10] arm/arm64: gic: Use correct memory ordering for the IPI test Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-03 13:10 ` Auger Eric 2020-12-03 13:10 ` Auger Eric 2020-12-03 13:21 ` Alexandru Elisei 2020-12-03 13:21 ` Alexandru Elisei 2020-11-25 15:51 ` [kvm-unit-tests PATCH 06/10] arm/arm64: gic: Check spurious and bad_sender in the active test Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-03 13:10 ` Auger Eric 2020-12-03 13:10 ` Auger Eric 2020-11-25 15:51 ` [kvm-unit-tests PATCH 07/10] arm/arm64: gic: Wait for writes to acked or spurious to complete Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-03 13:21 ` Auger Eric 2020-12-03 13:21 ` Auger Eric 2020-11-25 15:51 ` [kvm-unit-tests PATCH 08/10] arm/arm64: gic: Split check_acked() into two functions Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-03 13:39 ` Auger Eric 2020-12-03 13:39 ` Auger Eric 2020-12-10 14:45 ` Alexandru Elisei 2020-12-10 14:45 ` Alexandru Elisei 2020-12-15 13:58 ` Auger Eric 2020-12-15 13:58 ` Auger Eric 2020-12-16 11:40 ` Alexandru Elisei 2020-12-16 11:40 ` Alexandru Elisei 2020-12-16 12:37 ` Auger Eric 2020-12-16 12:37 ` Auger Eric 2020-11-25 15:51 ` [kvm-unit-tests PATCH 09/10] arm/arm64: gic: Make check_acked() more generic Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-12-03 14:59 ` Auger Eric 2020-12-03 14:59 ` Auger Eric 2020-11-25 15:51 ` [kvm-unit-tests PATCH 10/10] arm64: gic: Use IPI test checking for the LPI tests Alexandru Elisei 2020-11-25 15:51 ` Alexandru Elisei 2020-11-26 9:30 ` Zenghui Yu 2020-11-26 9:30 ` Zenghui Yu 2020-11-27 14:50 ` Alexandru Elisei 2020-11-27 14:50 ` Alexandru Elisei 2020-11-30 13:59 ` Zenghui Yu 2020-11-30 13:59 ` Zenghui Yu 2020-11-30 14:19 ` Alexandru Elisei 2020-11-30 14:19 ` Alexandru Elisei 2020-12-01 15:09 ` Alexandru Elisei 2020-12-01 15:09 ` Alexandru Elisei 2020-11-30 17:48 ` Auger Eric 2020-11-30 17:48 ` Auger Eric 2020-12-03 14:59 ` Auger Eric 2020-12-03 14:59 ` Auger Eric 2020-12-09 10:29 ` Alexandru Elisei 2020-12-09 10:29 ` Alexandru Elisei
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