[U-Boot] Problem with mounting a jffs2 partition on flash.

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Dear U-boot Support,

My name is Denis and I'm representing Nokia.

We want to have flexibility in choosing which Linux kernel image to load for different HW configurations.
But we don't want to define several partitions and use hardcoded addresses on the flash to fetch the needed
Linux kernel image. We want to keep them in a one big partition and choose between them using their filenames.

That's why we want to mount a jffs2 partition on flash at U-boot stage. Unfortunately we've faced some problems and we need help from your side.
We have Altera SOCFPGA Arria V Board. We use U-boot from SOC Embedded Design Suite.  We have NOR flash with SPI interface (S25FL512S).

I prepared Jffs2 partition from Linux env using flash_eraseall -j command. It is perfectly mountable from Linux env, I can put files on it etc.
1.      Currently we are using U-boot 2013:
U-Boot 2013.01.01 (Jan 26 2016 - 11:50:12)
VERSION : 00.02.04.00

We are ok to upgrade our U-boot to a fresh one, however we faced other problems with it.

Here is the actual problem:

# mtdparts
...
---list_partitions---

device nor0 <snor0>, # parts = 4
#: name                size            offset          mask_flags
0: boot                0x00100000      0x00000000      0
1: bootenv             0x00080000      0x00100000      0
2: SomeInfo            0x01980000      0x00180000      0
3: jffs2spart          0x02500000      0x01b00000      0

--- mtd_part_info: partition number 0 for device nor0 (snor0)

active partition: nor0,0 - (boot) 0x00100000 @ 0x00000000

# chpart nor0,3
...
=> mtddevnum 3,
=> mtddevname jffs2spart
partition changed to nor0,3

# ls

--- jffs2_part_info: partition number 3 for device nor0 (snor0)
rescan: First time in use
raise: Signal # 8 caught
Scanning JFFS2 FS:  done.

******The directory Entries******

******The fragment Entries******

As you can see ls command fails.

I tried to change U-boot configuration several times, with no success.
I can paste my configuration if needed.

But first I would like to hear major hints. Because it could happen so, that I'm doing something wrong.

Your support would be greatly appreciated!


Best regards,
Denis Bakhvalov

MBB Radio Platforms, RFSW

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Wolfgang Denk]

Dear Denis,

In message <BFEE4BD273371E48B6EB70F96CEC5B54F2F018@DEMUMBX007.nsn-intra.net> you wrote:
> 
> That's why we want to mount a jffs2 partition on flash at U-boot stage. Unfortunately we've faced some problems and we need help from your side.
> We have Altera SOCFPGA Arria V Board. We use U-boot from SOC Embedded Design Suite.  We have NOR flash with SPI interface (S25FL512S).

1) Is there any specific reason for using JFFS2?  We consider this
   pretty much deprecated today and usually tend to prefer UBI/UBIFS.

2) Especially with SoCFPGA it is highly recommended to use current
   mainline code.

> I prepared Jffs2 partition from Linux env using flash_eraseall -j
> command. It is perfectly mountable from Linux env, I can put files on
> it etc.
> 
> 1.      Currently we are using U-boot 2013:
> U-Boot 2013.01.01 (Jan 26 2016 - 11:50:12)

As mentioned, it is highly recommended to use current mainline
instead.

> # ls
> 
> --- jffs2_part_info: partition number 3 for device nor0 (snor0)
> rescan: First time in use
> raise: Signal # 8 caught
> Scanning JFFS2 FS:  done.
> 
> ******The directory Entries******
> 
> ******The fragment Entries******
> 
> As you can see ls command fails.

OK - I understand this is with the OLD version of U-Boot, right?


You wrote:

> We are ok to upgrade our U-boot to a fresh one, however we faced
> other problems with it.

What exactly are these "other problems" ?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"It ain't so much the things we don't know that get  us  in  trouble.
It's  the  things  we know that ain't so." - Artemus Ward aka Charles
Farrar Brown

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi Wolfgang,

Thank you for your quick reply.

> 1) Is there any specific reason for using JFFS2?  We consider this
>   pretty much deprecated today and usually tend to prefer UBI/UBIFS.

Yes, I'm aware that jffs2 is quite old and ubifs is a successor of jffs2, but the reason is that current Linux Kernel has no support for UBI.
It means that if will use UBI in U-boot we can't see the contents in Lunix env after it starts.
I understand that it should have solution, but it requires recompiling Linux kernel which is also time consuming.

So, for a proof of concept I decided to make it work with jffs2.

> 2) Especially with SoCFPGA it is highly recommended to use current
>   mainline code.

> As mentioned, it is highly recommended to use current mainline
> instead.

> OK - I understand this is with the OLD version of U-Boot, right?
Yes, current logs are from OLD U-boot version.

> What exactly are these "other problems" ?

U-Boot launches, but after that it is hanging.
U-Boot 2016.01 (Feb 05 2016 - 14:15:47 +0100)

CPU:   Altera SoCFPGA Platform
FPGA:  Altera Arria V, D5, version 0x0
BOOT:  QSPI Flash (3.0V)
       Watchdog enabled
I2C:   ready
DRAM:

I will try to tackle this problem also.
However, I must say that I don't have much experience with U-Boot, so maybe I'm missing something obvious?

Can you please share some examples of correct configuration for such use case (jffs2 partition on NOR flash with SPI)?
I spent some time digging into the code, enabling different defines, so now it is complete mess in my sources.

Best regards,
Denis Bakhvalov

MBB Radio Platforms, RFSW

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Wolfgang Denk]

Dear Denis,

In message <BFEE4BD273371E48B6EB70F96CEC5B54F300DB@DEMUMBX007.nsn-intra.net> you wrote:
> 

> Yes, I'm aware that jffs2 is quite old and ubifs is a successor of
> jffs2, but the reason is that current Linux Kernel has no support for
> UBI.

What do you mean by "current" here?  UBI/UBIFS support in U-Boot was
actually adapted from the Linux kernel, so Linux support for UBI/UBIFS
predates the U-Boot code by a long, long time.

Do you mean you are using a prehistoric Linux kernel version?

> I understand that it should have solution, but it requires
> recompiling Linux kernel which is also time consuming.

Hm... just recompiling is only a matter of seconds (or, on a very slow
system, minutes max).  I understand there are other concerns that you
don't want to update?  Please be aware that there it is likely that
there other incompatibilities / bugs in such an ancient kernel...

> > What exactly are these "other problems" ?
> 
> U-Boot launches, but after that it is hanging.
> U-Boot 2016.01 (Feb 05 2016 - 14:15:47 +0100)
> 
> CPU:   Altera SoCFPGA Platform
> FPGA:  Altera Arria V, D5, version 0x0
> BOOT:  QSPI Flash (3.0V)
>        Watchdog enabled
> I2C:   ready
> DRAM:
> 
> I will try to tackle this problem also.
> However, I must say that I don't have much experience with U-Boot,
> so maybe I'm missing something obvious?

It appears it is hanging in the DRAM initialization phase.  This is a
very common issue.  Please make sure your memory configuration is
correct.

> Can you please share some examples of correct configuration for
> such use case (jffs2 partition on NOR flash with SPI)?

You can deal with this later; first you need to have the system
running at all.  You should focus on this first.


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Far back in the mists of ancient time, in the great and glorious days
of the former Galactic Empire, life was wild, rich  and  largely  tax
free.         - Douglas Adams, _The Hitchhiker's Guide to the Galaxy_

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Calvin Johnson]

Hi Denis,


> -----Original Message-----
> From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Wolfgang
> Denk
> Sent: Monday, February 08, 2016 5:53 PM
> To: Bakhvalov, Denis (Nokia - PL/Wroclaw) <denis.bakhvalov@nokia.com>
> Cc: u-boot at lists.denx.de
> Subject: Re: [U-Boot] Problem with mounting a jffs2 partition on flash.
> 
> Dear Denis,
> 
> In message
> <BFEE4BD273371E48B6EB70F96CEC5B54F300DB@DEMUMBX007.nsn-intra.net>
> you wrote:
> >
> 
> > Yes, I'm aware that jffs2 is quite old and ubifs is a successor of
> > jffs2, but the reason is that current Linux Kernel has no support for
> > UBI.
> 
> What do you mean by "current" here?  UBI/UBIFS support in U-Boot was
> actually adapted from the Linux kernel, so Linux support for UBI/UBIFS
> predates the U-Boot code by a long, long time.
> 
> Do you mean you are using a prehistoric Linux kernel version?
> 
> > I understand that it should have solution, but it requires recompiling
> > Linux kernel which is also time consuming.
> 
> Hm... just recompiling is only a matter of seconds (or, on a very slow system,
> minutes max).  I understand there are other concerns that you don't want to
> update?  Please be aware that there it is likely that there other incompatibilities
> / bugs in such an ancient kernel...
> 
> > > What exactly are these "other problems" ?
> >
> > U-Boot launches, but after that it is hanging.
> > U-Boot 2016.01 (Feb 05 2016 - 14:15:47 +0100)
> >
> > CPU:   Altera SoCFPGA Platform
> > FPGA:  Altera Arria V, D5, version 0x0
> > BOOT:  QSPI Flash (3.0V)
> >        Watchdog enabled
> > I2C:   ready
> > DRAM:
> >
> > I will try to tackle this problem also.
> > However, I must say that I don't have much experience with U-Boot, so
> > maybe I'm missing something obvious?
> 
> It appears it is hanging in the DRAM initialization phase.  This is a very common
> issue.  Please make sure your memory configuration is correct.

I would also suggest you to enable DEBUG flag to get more information that helps debug your issues.

> 
> > Can you please share some examples of correct configuration for such
> > use case (jffs2 partition on NOR flash with SPI)?
> 
> You can deal with this later; first you need to have the system running at all.
> You should focus on this first.
> 
> 
> Best regards,
> 
> Wolfgang Denk
> 
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Far
> back in the mists of ancient time, in the great and glorious days of the former
> Galactic Empire, life was wild, rich  and  largely  tax
> free.         - Douglas Adams, _The Hitchhiker's Guide to the Galaxy_
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

Calvin

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On Monday, February 08, 2016 at 01:22:33 PM, Wolfgang Denk wrote:
> Dear Denis,

Hi,

> In message <BFEE4BD273371E48B6EB70F96CEC5B54F300DB@DEMUMBX007.nsn-intra.net> 
you wrote:
> > Yes, I'm aware that jffs2 is quite old and ubifs is a successor of
> > jffs2, but the reason is that current Linux Kernel has no support for
> > UBI.
> 
> What do you mean by "current" here?  UBI/UBIFS support in U-Boot was
> actually adapted from the Linux kernel, so Linux support for UBI/UBIFS
> predates the U-Boot code by a long, long time.
> 
> Do you mean you are using a prehistoric Linux kernel version?
> 
> > I understand that it should have solution, but it requires
> > recompiling Linux kernel which is also time consuming.
> 
> Hm... just recompiling is only a matter of seconds (or, on a very slow
> system, minutes max).  I understand there are other concerns that you
> don't want to update?  Please be aware that there it is likely that
> there other incompatibilities / bugs in such an ancient kernel...
> 
> > > What exactly are these "other problems" ?
> > 
> > U-Boot launches, but after that it is hanging.
> > U-Boot 2016.01 (Feb 05 2016 - 14:15:47 +0100)
> > 
> > CPU:   Altera SoCFPGA Platform
> > FPGA:  Altera Arria V, D5, version 0x0
> > BOOT:  QSPI Flash (3.0V)
> > 
> >        Watchdog enabled
> > 
> > I2C:   ready
> > DRAM:
> > 
> > I will try to tackle this problem also.
> > However, I must say that I don't have much experience with U-Boot,
> > so maybe I'm missing something obvious?
> 
> It appears it is hanging in the DRAM initialization phase.  This is a
> very common issue.  Please make sure your memory configuration is
> correct.

It would be very helpful to see the whole boot output, not just U-Boot output.
For example SPL output is missing. Are you using mainline U-Boot SPL or not ?
How did you install the U-Boot on your board ?

> > Can you please share some examples of correct configuration for
> > such use case (jffs2 partition on NOR flash with SPI)?
> 
> You can deal with this later; first you need to have the system
> running at all.  You should focus on this first.
> 
> 
> Best regards,
> 
> Wolfgang Denk

Best regards,
Marek Vasut

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi,

Thank you for you responses!

@To Marek:

> It would be very helpful to see the whole boot output, not just U-Boot output.
> For example SPL output is missing. Are you using mainline U-Boot SPL or not ?

Here is the output from SPL:

U-Boot SPL 2013.01.01-svn564 (May 27 2015 - 17:58:12)
Board Type : XXXX // I changed it
Preloader Ver.: 00.01.03.00
QSPI Access Mode: Single Access
BOARD : Altera SOCFPGA Arria V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 800 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 12500 KHz
CLOCK: QSPI clock 400000 KHz
RESET: COLD
INFO : Watchdog enabled
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 512 MiB
SF: Read data capture delay calibrated to 3 (0 - 7)
SF: Detected S25FL512S with page size 512, total: 67108864

Here is the output from U-Boot:

U-Boot 2013.01.01-svn578 (Jan 08 2016 - 16:02:29)
VERSION : 00.02.04.00
U-Boot code: 01000040 -> 01049080  BSS: -> 01089908
IRQ Stack: 0badc0de
FIQ Stack: 0badc0de
CPU   : Altera SOCFPGA Platform
BOARD : XXXX  // I changed it
I2C:   ready
monitor len: 000898C8
ramsize: 1F000000
TLB table from 1eff0000 to 1eff4000
Top of RAM usable for U-Boot at: 1eff0000
Reserving 550k for U-Boot at: 1ef66000
Reserving 640k for malloc() at: 1eec6000
Reserving 32 Bytes for Board Info at: 1eec5fe0
Reserving 128 Bytes for Global Data at: 1eec5f60
Reserving 2048 Bytes for IRQ stack at: 1eec5760
New Stack Pointer is: 1eec5750
DRAM:  496 MiB
relocation Offset is: 1df65fc0
dram_bank_mmu_setup: bank: 0
monitor flash len: 00051840
Now running in RAM - U-Boot at: 1ef66000
spi_setup_slave: bus 0 cs 0 max_hz 50MHz mode 3
spi_claim_bus: bus:0 cs:0
cadence_qspi_apb_chipselect : chipselect 0 decode 0
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz Div 0x3
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 1000000Hz Div 0xf
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz Div 0x3
SF: Read data capture delay calibrated to 3 (0 - 7)
SF: Configuration Register : READ : CMD : 0x35
spi_claim_bus: bus:0 cs:0
cadence_qspi_apb_chipselect : chipselect 0 decode 0
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz Div 0x3
SF: Bank Register : WRITE : CMD : 0x17 : BANK : 0x80
SF: Opt Area Data : READ : CMD : { 0x4b : 0x00000010 }
spi_claim_bus: bus:0 cs:0
cadence_qspi_apb_chipselect : chipselect 0 decode 0
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz Div 0x3
SF: Detected S25FL512S with page size 512, total 67108864 bytes
SF: Detected S25FL512S with page size 512, total: 67108864
READ: 0x100000 => cmd = { 0x0b 0x0010000008 } len = 0x20000
spi_claim_bus: bus:0 cs:0
cadence_qspi_apb_chipselect : chipselect 0 decode 0
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz Div 0x3
READ: 0x140000 => cmd = { 0x0b 0x0014000008 } len = 0x20000
spi_claim_bus: bus:0 cs:0
cadence_qspi_apb_chipselect : chipselect 0 decode 0
cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz Div 0x3
Destroy Hash Table: 1efae2a0 table = 00000000
Create Hash Table: N=512
... 
// then a lot of prints setting env variables.

> How did you install the U-Boot on your board ?
U-boot is simply stored to flash using USB blaster from Altera.

@To Wolfgang:

> What do you mean by "current" here?  UBI/UBIFS support in U-Boot was
> actually adapted from the Linux kernel, so Linux support for UBI/UBIFS
> predates the U-Boot code by a long, long time.

Ok, I tried to make it work with UBI/UBIFS:

1. From Linux env I erased partition:
flasheraseall /dev/mtd5
2. I'm able to work with this partition is Linux env:
ubiattach /dev/ubi_ctrl -m 5
ubimkvol /dev/ubi0 -N myUbifs -s 35MiB
mount -t ubifs ubi0_0 /mnt
3. But from U-Boot it is not working:
All commands as before:
U-BOOT # sf probe 0 0 0
U-BOOT # mtdparts
...
---list_partitions---

device nor0 <snor0>, # parts = 4
 #: name                size            offset          mask_flags
 0: boot                0x00100000      0x00000000      0
 1: bootenv             0x00080000      0x00100000      0
 2: SomeInfo            0x01980000      0x00180000      0
 3: jffs2spart          0x02500000      0x01b00000      0

U-BOOT # ubi part ubifspart

---mtdparts_init---
last_ids  : nor0=snor0
env_ids   : nor0=snor0
last_parts: mtdparts=snor0:1M(boot),512k(bootenv),26112k(SomeInfo),-(ubifspart)
env_parts : mtdparts=snor0:1M(boot),512k(bootenv),26112k(SomeInfo),-(ubifspart)

last_partition : nor0,0
env_partition  : nor0,0
--- find_dev_and_part ---
id = ubifspart
--- find_dev_and_part ---
id = ubifspart
Creating 1 MTD partitions on "nor0":
0x000001b00000-0x000004000000 : "mtd=3"
raise: Signal # 8 caught
raise: Signal # 8 caught
UBI: attaching mtd1 to ubi0
raise: Signal # 8 caught
UBI: physical eraseblock size:   0 bytes (0 KiB)
UBI: logical eraseblock size:    -128 bytes
UBI: smallest flash I/O unit:    1
UBI: VID header offset:          64 (aligned 64)
UBI: data offset:                128
UBI: empty MTD device detected
UBI: create volume table (copy #1)
UBI error: ubi_scan_get_free_peb: no eraseblocks found
UBI error: ubi_init: cannot attach mtd1
UBI error: ubi_init: UBI error: cannot initialize UBI, error -28
UBI init error 28
Command failed, result=28U-BOOT #

I'm confused about those prints:
raise: Signal # 8 caught
There are just so much of them... Even when executing sf probe command.

> Do you mean you are using a prehistoric Linux kernel version?
No, Linux version is 3.10.31.

> It appears it is hanging in the DRAM initialization phase.  This is a
> very common issue.  Please make sure your memory configuration is
> correct.
> You can deal with this later; first you need to have the system
> running at all.  You should focus on this first.

This is what I'm going to do next.

Best regards,
Denis Bakhvalov

MBB Radio Platforms, RFSW

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On Tuesday, February 09, 2016 at 04:36:33 PM, Bakhvalov, Denis (Nokia - 
PL/Wroclaw) wrote:
> Hi,

Hi!

> Thank you for you responses!
> 
> @To Marek:
> > It would be very helpful to see the whole boot output, not just U-Boot
> > output. For example SPL output is missing. Are you using mainline U-Boot
> > SPL or not ?
> 
> Here is the output from SPL:
> 
> U-Boot SPL 2013.01.01-svn564 (May 27 2015 - 17:58:12)
> Board Type : XXXX // I changed it
> Preloader Ver.: 00.01.03.00
> QSPI Access Mode: Single Access
> BOARD : Altera SOCFPGA Arria V Board
> CLOCK: EOSC1 clock 25000 KHz
> CLOCK: EOSC2 clock 25000 KHz
> CLOCK: F2S_SDR_REF clock 0 KHz
> CLOCK: F2S_PER_REF clock 0 KHz
> CLOCK: MPU clock 800 MHz
> CLOCK: DDR clock 400 MHz
> CLOCK: UART clock 100000 KHz
> CLOCK: MMC clock 12500 KHz
> CLOCK: QSPI clock 400000 KHz
> RESET: COLD
> INFO : Watchdog enabled
> SDRAM: Initializing MMR registers
> SDRAM: Calibrating PHY
> SEQ.C: Preparing to start memory calibration
> SEQ.C: CALIBRATION PASSED
> SDRAM: 512 MiB
> SF: Read data capture delay calibrated to 3 (0 - 7)
> SF: Detected S25FL512S with page size 512, total: 67108864

That's not mainline SPL. Please use mainline SPL with mainline U-Boot.
Mixing and matching various versions of U-Boot and SPL is not supported.

Is there any reason why you are using non-mainline SPL ?

> Here is the output from U-Boot:
> 
> U-Boot 2013.01.01-svn578 (Jan 08 2016 - 16:02:29)
> VERSION : 00.02.04.00
> U-Boot code: 01000040 -> 01049080  BSS: -> 01089908
> IRQ Stack: 0badc0de
> FIQ Stack: 0badc0de
> CPU   : Altera SOCFPGA Platform
> BOARD : XXXX  // I changed it
> I2C:   ready
> monitor len: 000898C8
> ramsize: 1F000000
> TLB table from 1eff0000 to 1eff4000
> Top of RAM usable for U-Boot at: 1eff0000
> Reserving 550k for U-Boot at: 1ef66000
> Reserving 640k for malloc() at: 1eec6000
> Reserving 32 Bytes for Board Info at: 1eec5fe0
> Reserving 128 Bytes for Global Data at: 1eec5f60
> Reserving 2048 Bytes for IRQ stack at: 1eec5760
> New Stack Pointer is: 1eec5750
> DRAM:  496 MiB
> relocation Offset is: 1df65fc0
> dram_bank_mmu_setup: bank: 0
> monitor flash len: 00051840
> Now running in RAM - U-Boot at: 1ef66000
> spi_setup_slave: bus 0 cs 0 max_hz 50MHz mode 3
> spi_claim_bus: bus:0 cs:0
> cadence_qspi_apb_chipselect : chipselect 0 decode 0
> cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz
> Div 0x3 cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk
> 1000000Hz Div 0xf cadence_qspi_apb_config_baudrate_div: ref_clk
> 400000000Hz sclk 50000000Hz Div 0x3 SF: Read data capture delay calibrated
> to 3 (0 - 7)
> SF: Configuration Register : READ : CMD : 0x35
> spi_claim_bus: bus:0 cs:0
> cadence_qspi_apb_chipselect : chipselect 0 decode 0
> cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz
> Div 0x3 SF: Bank Register : WRITE : CMD : 0x17 : BANK : 0x80
> SF: Opt Area Data : READ : CMD : { 0x4b : 0x00000010 }
> spi_claim_bus: bus:0 cs:0
> cadence_qspi_apb_chipselect : chipselect 0 decode 0
> cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz
> Div 0x3 SF: Detected S25FL512S with page size 512, total 67108864 bytes
> SF: Detected S25FL512S with page size 512, total: 67108864
> READ: 0x100000 => cmd = { 0x0b 0x0010000008 } len = 0x20000
> spi_claim_bus: bus:0 cs:0
> cadence_qspi_apb_chipselect : chipselect 0 decode 0
> cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz
> Div 0x3 READ: 0x140000 => cmd = { 0x0b 0x0014000008 } len = 0x20000
> spi_claim_bus: bus:0 cs:0
> cadence_qspi_apb_chipselect : chipselect 0 decode 0
> cadence_qspi_apb_config_baudrate_div: ref_clk 400000000Hz sclk 50000000Hz
> Div 0x3 Destroy Hash Table: 1efae2a0 table = 00000000
> Create Hash Table: N=512
> ...
> // then a lot of prints setting env variables.

I thought you were using mainline U-Boot, but this output is from non-mainline
U-Boot now. And it also contains some odd debug prints which are not even 
present in the U-Boot Altera delivers. I have to admit, I am quite confused.

I suppose you have Arria V SoCDK and you're trying to run U-Boot 2016.01 on
it, right ? Can you load the mainline SPL and mainline U-Boot and see if
that works for you? If it does not, please share the entire boot log .

If you have a custom board, you will need to change the memory timing bits
based on the output from Quartus . This is slightly more involved in both
the altera setup and mainline setup.

> > How did you install the U-Boot on your board ?
> 
> U-boot is simply stored to flash using USB blaster from Altera.

I was more interested in the procedure you used. I usually install mainline
U-Boot onto a board which boots from QSPI this way:

$ quartus_hps -c 1 -o PV -a 0x0 u-boot-with-spl-dtb.sfp

> @To Wolfgang:
> > What do you mean by "current" here?  UBI/UBIFS support in U-Boot was
> > actually adapted from the Linux kernel, so Linux support for UBI/UBIFS
> > predates the U-Boot code by a long, long time.
> 
> Ok, I tried to make it work with UBI/UBIFS:
> 
> 1. From Linux env I erased partition:
> flasheraseall /dev/mtd5
> 2. I'm able to work with this partition is Linux env:
> ubiattach /dev/ubi_ctrl -m 5
> ubimkvol /dev/ubi0 -N myUbifs -s 35MiB
> mount -t ubifs ubi0_0 /mnt
> 3. But from U-Boot it is not working:
> All commands as before:
> U-BOOT # sf probe 0 0 0
> U-BOOT # mtdparts
> ...
> ---list_partitions---
> 
> device nor0 <snor0>, # parts = 4
>  #: name                size            offset          mask_flags
>  0: boot                0x00100000      0x00000000      0
>  1: bootenv             0x00080000      0x00100000      0
>  2: SomeInfo            0x01980000      0x00180000      0
>  3: jffs2spart          0x02500000      0x01b00000      0
> 
> U-BOOT # ubi part ubifspart
> 
> ---mtdparts_init---
> last_ids  : nor0=snor0
> env_ids   : nor0=snor0
> last_parts:
> mtdparts=snor0:1M(boot),512k(bootenv),26112k(SomeInfo),-(ubifspart)
> env_parts :
> mtdparts=snor0:1M(boot),512k(bootenv),26112k(SomeInfo),-(ubifspart)
> 
> last_partition : nor0,0
> env_partition  : nor0,0
> --- find_dev_and_part ---
> id = ubifspart
> --- find_dev_and_part ---
> id = ubifspart
> Creating 1 MTD partitions on "nor0":
> 0x000001b00000-0x000004000000 : "mtd=3"
> raise: Signal # 8 caught
> raise: Signal # 8 caught
> UBI: attaching mtd1 to ubi0
> raise: Signal # 8 caught
> UBI: physical eraseblock size:   0 bytes (0 KiB)
> UBI: logical eraseblock size:    -128 bytes
> UBI: smallest flash I/O unit:    1
> UBI: VID header offset:          64 (aligned 64)
> UBI: data offset:                128
> UBI: empty MTD device detected
> UBI: create volume table (copy #1)
> UBI error: ubi_scan_get_free_peb: no eraseblocks found
> UBI error: ubi_init: cannot attach mtd1
> UBI error: ubi_init: UBI error: cannot initialize UBI, error -28
> UBI init error 28
> Command failed, result=28U-BOOT #
> 
> I'm confused about those prints:
> raise: Signal # 8 caught
> There are just so much of them... Even when executing sf probe command.

Is this u-boot 2016.01 or the ancient version provided by Altera please ?

> > Do you mean you are using a prehistoric Linux kernel version?
> 
> No, Linux version is 3.10.31.

Is there any reason why you don't use Linux 4.4 ? There are customers who
are using this on socfpga just fine, including FPGA manager and DT overlays
to deal with the FPGA part.

> > It appears it is hanging in the DRAM initialization phase.  This is a
> > very common issue.  Please make sure your memory configuration is
> > correct.
> > You can deal with this later; first you need to have the system
> > running at all.  You should focus on this first.
> 
> This is what I'm going to do next.

I'm looking forward to your findings!

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi Marek,

> That's not mainline SPL. Please use mainline SPL with mainline U-Boot.
> Mixing and matching various versions of U-Boot and SPL is not supported.

> Is there any reason why you are using non-mainline SPL ?

We received information from Altera that we should stick to this previous version of SPL. 
Even if we decide to upgrade U-Boot itself.
I don't know why. They just wrote it. 
Although I will try both variants.

> I thought you were using mainline U-Boot, but this output is from non-mainline
> U-Boot now. And it also contains some odd debug prints which are not even 
> present in the U-Boot Altera delivers. I have to admit, I am quite confused.

Sorry for confusing you. We tried both variants.
With old version I had problems with creating jffs2/ubifs upon a partition that contains Linux kernel.

My colleague tried to build U-Boot 2016.01. But he failed with hanging U-Boot as a result.
I will try to do it once again and let you know about the results.

> I suppose you have Arria V SoCDK and you're trying to run U-Boot 2016.01 on
> it, right ? Can you load the mainline SPL and mainline U-Boot and see if
> that works for you? If it does not, please share the entire boot log .

I will try to do.

> If you have a custom board, you will need to change the memory timing bits
> based on the output from Quartus . This is slightly more involved in both
> the altera setup and mainline setup.

Thanks for that hint.

> I was more interested in the procedure you used. I usually install mainline
> U-Boot onto a board which boots from QSPI this way:

> $ quartus_hps -c 1 -o PV -a 0x0 u-boot-with-spl-dtb.sfp

Yes, exactly. But we have separated SPL and U-Boot images and put them separately (with two commands).

> Is this u-boot 2016.01 or the ancient version provided by Altera please ?

This is the old version (2013).

> Is there any reason why you don't use Linux 4.4 ? There are customers who
> are using this on socfpga just fine, including FPGA manager and DT overlays
> to deal with the FPGA part.

This is good question on which I'm not ready to answer yet.
I understand that the newer the better, but this is still not an easy decision.
Anyway I will think about that after I will solve my issue with U-Boot .

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/10/2016 02:18 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi Marek,

Hi Denis,

>> That's not mainline SPL. Please use mainline SPL with mainline U-Boot.
>> Mixing and matching various versions of U-Boot and SPL is not supported.
> 
>> Is there any reason why you are using non-mainline SPL ?
> 
> We received information from Altera that we should stick to this previous version of SPL. 
> Even if we decide to upgrade U-Boot itself.

That depends on who you talk to ;-)

> I don't know why. They just wrote it. 
> Although I will try both variants.

Please just use mainline everything. If you use Arria V SoCDK, you can
just grab 2016.01 , compile it and write u-boot-with-spl-dtb.sfp to
offset 0x0 of the QSPI and it should just magically work.

>> I thought you were using mainline U-Boot, but this output is from non-mainline
>> U-Boot now. And it also contains some odd debug prints which are not even 
>> present in the U-Boot Altera delivers. I have to admit, I am quite confused.
> 
> Sorry for confusing you. We tried both variants.
> With old version I had problems with creating jffs2/ubifs upon a partition that contains Linux kernel.

The UBI/UBIFS code in U-Boot was synced with Linux after 2013.01
release, so this doesn't surprise me. With the new 2016.01 , you
even get UBI fastmap as a bonus, which is entirely missing in the
older versions. The fastmap does make a significant difference.

> My colleague tried to build U-Boot 2016.01. But he failed with hanging U-Boot as a result.
> I will try to do it once again and let you know about the results.

That might as well be because you mixed the old SPL with new U-Boot.

>> I suppose you have Arria V SoCDK and you're trying to run U-Boot 2016.01 on
>> it, right ? Can you load the mainline SPL and mainline U-Boot and see if
>> that works for you? If it does not, please share the entire boot log .
> 
> I will try to do.

Thanks!

>> If you have a custom board, you will need to change the memory timing bits
>> based on the output from Quartus . This is slightly more involved in both
>> the altera setup and mainline setup.
> 
> Thanks for that hint.

Let me know if you need input on this.

>> I was more interested in the procedure you used. I usually install mainline
>> U-Boot onto a board which boots from QSPI this way:
> 
>> $ quartus_hps -c 1 -o PV -a 0x0 u-boot-with-spl-dtb.sfp
> 
> Yes, exactly. But we have separated SPL and U-Boot images and put them separately (with two commands).

Please don't :-)

>> Is this u-boot 2016.01 or the ancient version provided by Altera please ?
> 
> This is the old version (2013).
> 
>> Is there any reason why you don't use Linux 4.4 ? There are customers who
>> are using this on socfpga just fine, including FPGA manager and DT overlays
>> to deal with the FPGA part.
> 
> This is good question on which I'm not ready to answer yet.
> I understand that the newer the better, but this is still not an easy decision.

You get bugfixes and new features, some of which are extremely
convenient and make working with the FPGA part much less painful,
like the DToverlay support and FPGA manager parts. You should consider
using mainline.

> Anyway I will think about that after I will solve my issue with U-Boot .

Indeed.

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi Marek,

> Please just use mainline everything. If you use Arria V SoCDK, you can
> just grab 2016.01 , compile it and write u-boot-with-spl-dtb.sfp to
> offset 0x0 of the QSPI and it should just magically work.

I haven't found the file with the name u-boot-with-spl-dtb.sfp.

denis at DendiMachine:~/WorkSpace/u-boot$ ls -l
total 8544
drwxrwxr-x   2 denis denis    4096 lut 10 22:46 api
drwxrwxr-x  17 denis denis    4096 lut 10 22:46 arch
drwxrwxr-x 201 denis denis    4096 lut 10 22:46 board
drwxrwxr-x   2 denis denis    4096 sty 11 23:15 build
drwxrwxr-x   2 denis denis   12288 lut 11 10:50 cmd
drwxrwxr-x   4 denis denis   20480 lut 11 10:50 common
-rw-rw-r--   1 denis denis    2260 sty 11 22:32 config.mk
drwxrwxr-x   2 denis denis   61440 lut 10 22:46 configs
drwxrwxr-x   2 denis denis    4096 lut 11 10:45 disk
drwxrwxr-x   8 denis denis    4096 lut 10 22:46 doc
drwxrwxr-x  46 denis denis    4096 lut 11 10:45 drivers
drwxrwxr-x   2 denis denis    4096 lut 11 10:46 dts
drwxrwxr-x   4 denis denis    4096 sty 11 22:32 examples
drwxrwxr-x  12 denis denis    4096 lut 11 10:45 fs
drwxrwxr-x  28 denis denis   12288 lut 11 10:45 include
-rw-rw-r--   1 denis denis    1863 sty 11 22:32 Kbuild
-rw-rw-r--   1 denis denis    7669 lut 10 22:46 Kconfig
drwxrwxr-x  11 denis denis    4096 lut 11 10:50 lib
drwxrwxr-x   2 denis denis    4096 lut 10 22:46 Licenses
-rw-rw-r--   1 denis denis   10765 lut 10 22:46 MAINTAINERS
-rwxrwxr-x   1 denis denis   23247 sty 11 22:32 MAKEALL
-rw-rw-r--   1 denis denis   53021 lut 10 22:46 Makefile
drwxrwxr-x   2 denis denis    4096 lut 11 10:46 net
drwxrwxr-x   6 denis denis    4096 sty 11 22:32 post
-rw-rw-r--   1 denis denis  235198 lut 10 22:46 README
drwxrwxr-x   4 denis denis    4096 lut 10 22:46 scripts
-rw-rw-r--   1 denis denis      17 sty 11 22:32 snapshot.commit
drwxrwxr-x  11 denis denis    4096 lut 11 10:50 spl
-rw-rw-r--   1 denis denis   75047 lut 11 10:46 System.map
drwxrwxr-x  10 denis denis    4096 lut 11 10:46 test
drwxrwxr-x  15 denis denis    4096 lut 11 10:50 tools
-rwxrwxr-x   1 denis denis 3492298 lut 11 10:50 u-boot
-rw-rw-r--   1 denis denis  431333 lut 11 10:50 u-boot.bin
-rw-rw-r--   1 denis denis   26288 lut 11 10:46 u-boot.cfg
-rw-rw-r--   1 denis denis   16301 lut 11 10:46 u-boot.dtb
-rw-rw-r--   1 denis denis  431333 lut 11 10:50 u-boot-dtb.bin
-rw-rw-r--   1 denis denis  431397 lut 11 10:46 u-boot-dtb.img
-rw-rw-r--   1 denis denis  431397 lut 11 10:50 u-boot.img
-rw-rw-r--   1 denis denis    1286 lut 11 10:46 u-boot.lds
-rw-rw-r--   1 denis denis  561107 lut 11 10:50 u-boot.map
-rw-rw-r--   1 denis denis  415032 lut 11 10:50 u-boot-nodtb.bin
-rw-rw-r--   1 denis denis 1245202 lut 11 10:46 u-boot.srec
-rw-rw-r--   1 denis denis  693541 lut 11 10:50 u-boot-with-spl.sfp

denis at DendiMachine:~/WorkSpace/u-boot$ ls ./spl/ -l
total 1292
drwxrwxr-x 3 denis denis   4096 lut 11 10:46 arch
drwxrwxr-x 3 denis denis   4096 lut 11 10:46 board
drwxrwxr-x 2 denis denis   4096 lut 11 10:46 cmd
drwxrwxr-x 4 denis denis   4096 lut 11 10:46 common
drwxrwxr-x 9 denis denis   4096 lut 11 10:46 drivers
drwxrwxr-x 2 denis denis   4096 lut 11 10:46 dts
drwxrwxr-x 2 denis denis   4096 lut 11 10:46 fs
drwxrwxr-x 2 denis denis   4096 lut 11 10:45 include
drwxrwxr-x 3 denis denis   4096 lut 11 10:50 lib
-rwxrwxr-x 1 denis denis 932073 lut 11 10:50 u-boot-spl
-rw-rw-r-- 1 denis denis  53943 lut 11 10:50 u-boot-spl.bin
-rw-rw-r-- 1 denis denis  26129 lut 11 10:46 u-boot-spl.cfg
-rw-rw-r-- 1 denis denis    903 lut 11 10:46 u-boot-spl.dtb
-rw-rw-r-- 1 denis denis  53943 lut 11 10:50 u-boot-spl-dtb.bin
-rw-rw-r-- 1 denis denis   1192 lut 11 10:46 u-boot-spl.lds
-rw-rw-r-- 1 denis denis 137422 lut 11 10:50 u-boot-spl.map
-rwxrwxr-x 1 denis denis  52880 lut 11 10:50 u-boot-spl-nodtb.bin
-rw-rw-r-- 1 denis denis    160 lut 11 10:50 u-boot-spl-pad.bin
-rw-rw-r-- 1 denis denis  65536 lut 11 10:50 u-boot-spl.sfp

There is only target "u-boot-with-spl.sfp".
I'm a little bit confused which file is the proper one.
Can I use u-boot-with-spl.sfp from the root folder?

>>> I was more interested in the procedure you used. I usually install mainline
>>> U-Boot onto a board which boots from QSPI this way:
>> 
>>> $ quartus_hps -c 1 -o PV -a 0x0 u-boot-with-spl-dtb.sfp
>> 
>> Yes, exactly. But we have separated SPL and U-Boot images and put them separately (with two commands).

> Please don't :-)

Ok. Can you please briefly explain why?

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/11/2016 11:01 AM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi Marek,

Hi Denis,

>> Please just use mainline everything. If you use Arria V SoCDK, you can
>> just grab 2016.01 , compile it and write u-boot-with-spl-dtb.sfp to
>> offset 0x0 of the QSPI and it should just magically work.
> 
> I haven't found the file with the name u-boot-with-spl-dtb.sfp.

How did you compile the U-Boot ? Make sure to clean up your sources
before the build. Try this method:

$ make socfpga_arria5_defconfig
$ make -j9

This will produce the file, I just tested it.

You can try make u-boot-with-spl-dtb.sfp in case you're desperate.

> denis at DendiMachine:~/WorkSpace/u-boot$ ls -l
> total 8544
> drwxrwxr-x   2 denis denis    4096 lut 10 22:46 api
> drwxrwxr-x  17 denis denis    4096 lut 10 22:46 arch
> drwxrwxr-x 201 denis denis    4096 lut 10 22:46 board
> drwxrwxr-x   2 denis denis    4096 sty 11 23:15 build
> drwxrwxr-x   2 denis denis   12288 lut 11 10:50 cmd
> drwxrwxr-x   4 denis denis   20480 lut 11 10:50 common
> -rw-rw-r--   1 denis denis    2260 sty 11 22:32 config.mk
> drwxrwxr-x   2 denis denis   61440 lut 10 22:46 configs
> drwxrwxr-x   2 denis denis    4096 lut 11 10:45 disk
> drwxrwxr-x   8 denis denis    4096 lut 10 22:46 doc
> drwxrwxr-x  46 denis denis    4096 lut 11 10:45 drivers
> drwxrwxr-x   2 denis denis    4096 lut 11 10:46 dts
> drwxrwxr-x   4 denis denis    4096 sty 11 22:32 examples
> drwxrwxr-x  12 denis denis    4096 lut 11 10:45 fs
> drwxrwxr-x  28 denis denis   12288 lut 11 10:45 include
> -rw-rw-r--   1 denis denis    1863 sty 11 22:32 Kbuild
> -rw-rw-r--   1 denis denis    7669 lut 10 22:46 Kconfig
> drwxrwxr-x  11 denis denis    4096 lut 11 10:50 lib
> drwxrwxr-x   2 denis denis    4096 lut 10 22:46 Licenses
> -rw-rw-r--   1 denis denis   10765 lut 10 22:46 MAINTAINERS
> -rwxrwxr-x   1 denis denis   23247 sty 11 22:32 MAKEALL
> -rw-rw-r--   1 denis denis   53021 lut 10 22:46 Makefile
> drwxrwxr-x   2 denis denis    4096 lut 11 10:46 net
> drwxrwxr-x   6 denis denis    4096 sty 11 22:32 post
> -rw-rw-r--   1 denis denis  235198 lut 10 22:46 README
> drwxrwxr-x   4 denis denis    4096 lut 10 22:46 scripts
> -rw-rw-r--   1 denis denis      17 sty 11 22:32 snapshot.commit
> drwxrwxr-x  11 denis denis    4096 lut 11 10:50 spl
> -rw-rw-r--   1 denis denis   75047 lut 11 10:46 System.map
> drwxrwxr-x  10 denis denis    4096 lut 11 10:46 test
> drwxrwxr-x  15 denis denis    4096 lut 11 10:50 tools
> -rwxrwxr-x   1 denis denis 3492298 lut 11 10:50 u-boot
> -rw-rw-r--   1 denis denis  431333 lut 11 10:50 u-boot.bin
> -rw-rw-r--   1 denis denis   26288 lut 11 10:46 u-boot.cfg
> -rw-rw-r--   1 denis denis   16301 lut 11 10:46 u-boot.dtb
> -rw-rw-r--   1 denis denis  431333 lut 11 10:50 u-boot-dtb.bin
> -rw-rw-r--   1 denis denis  431397 lut 11 10:46 u-boot-dtb.img
> -rw-rw-r--   1 denis denis  431397 lut 11 10:50 u-boot.img
> -rw-rw-r--   1 denis denis    1286 lut 11 10:46 u-boot.lds
> -rw-rw-r--   1 denis denis  561107 lut 11 10:50 u-boot.map
> -rw-rw-r--   1 denis denis  415032 lut 11 10:50 u-boot-nodtb.bin
> -rw-rw-r--   1 denis denis 1245202 lut 11 10:46 u-boot.srec
> -rw-rw-r--   1 denis denis  693541 lut 11 10:50 u-boot-with-spl.sfp
> 
> denis at DendiMachine:~/WorkSpace/u-boot$ ls ./spl/ -l
> total 1292
> drwxrwxr-x 3 denis denis   4096 lut 11 10:46 arch
> drwxrwxr-x 3 denis denis   4096 lut 11 10:46 board
> drwxrwxr-x 2 denis denis   4096 lut 11 10:46 cmd
> drwxrwxr-x 4 denis denis   4096 lut 11 10:46 common
> drwxrwxr-x 9 denis denis   4096 lut 11 10:46 drivers
> drwxrwxr-x 2 denis denis   4096 lut 11 10:46 dts
> drwxrwxr-x 2 denis denis   4096 lut 11 10:46 fs
> drwxrwxr-x 2 denis denis   4096 lut 11 10:45 include
> drwxrwxr-x 3 denis denis   4096 lut 11 10:50 lib
> -rwxrwxr-x 1 denis denis 932073 lut 11 10:50 u-boot-spl
> -rw-rw-r-- 1 denis denis  53943 lut 11 10:50 u-boot-spl.bin
> -rw-rw-r-- 1 denis denis  26129 lut 11 10:46 u-boot-spl.cfg
> -rw-rw-r-- 1 denis denis    903 lut 11 10:46 u-boot-spl.dtb
> -rw-rw-r-- 1 denis denis  53943 lut 11 10:50 u-boot-spl-dtb.bin
> -rw-rw-r-- 1 denis denis   1192 lut 11 10:46 u-boot-spl.lds
> -rw-rw-r-- 1 denis denis 137422 lut 11 10:50 u-boot-spl.map
> -rwxrwxr-x 1 denis denis  52880 lut 11 10:50 u-boot-spl-nodtb.bin
> -rw-rw-r-- 1 denis denis    160 lut 11 10:50 u-boot-spl-pad.bin
> -rw-rw-r-- 1 denis denis  65536 lut 11 10:50 u-boot-spl.sfp
> 
> There is only target "u-boot-with-spl.sfp".
> I'm a little bit confused which file is the proper one.
> Can I use u-boot-with-spl.sfp from the root folder?

You cannot, since it doesn't contain the DT blob, which describes the
arria5 socdk hardware. The board won't boot without it.

>>>> I was more interested in the procedure you used. I usually install mainline
>>>> U-Boot onto a board which boots from QSPI this way:
>>>
>>>> $ quartus_hps -c 1 -o PV -a 0x0 u-boot-with-spl-dtb.sfp
>>>
>>> Yes, exactly. But we have separated SPL and U-Boot images and put them separately (with two commands).
> 
>> Please don't :-)
> 
> Ok. Can you please briefly explain why?

Mixing and matching SPL versions is not supported ; it is well possible
the non-mainline SPL behaves differently or configures the hardware
differently than the mainline u-boot expects (it does), which might
result in odd behavior.

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi Marek,

Here are my build steps:

denis at DendiMachine:~/WorkSpace/u-boot$ make clean
  CLEAN   dts/../arch/arm/dts
  CLEAN   dts
  CLEAN   examples/standalone
  CLEAN   tools
  CLEAN   tools/lib tools/common
  CLEAN   spl/arch spl/board spl/cmd spl/common spl/drivers spl/dts spl/fs spl/lib spl/u-boot-spl spl/u-boot-spl.bin spl/u-boot-spl.cfg spl/u-boot-spl.dtb spl/u-boot-spl-dtb.bin spl/u-boot-spl.lds spl/u-boot-spl.map spl/u-boot-spl-nodtb.bin spl/u-boot-spl-pad.bin spl/u-boot-spl.sfp
  CLEAN   u-boot u-boot.bin u-boot.cfg u-boot.dtb u-boot-dtb.bin u-boot-dtb.img u-boot.img u-boot.lds u-boot.map u-boot-nodtb.bin u-boot.srec System.map
denis at DendiMachine:~/WorkSpace/u-boot$ make distclean
  CLEAN   scripts/basic
  CLEAN   scripts/kconfig
  CLEAN   include/config include/generated spl
  CLEAN   .config .config.old include/autoconf.mk include/autoconf.mk.dep include/config.h
denis at DendiMachine:~/WorkSpace/u-boot$ make clean
denis at DendiMachine:~/WorkSpace/u-boot$ make distclean
denis at DendiMachine:~/WorkSpace/u-boot$ git pull
Already up-to-date.
denis at DendiMachine:~/WorkSpace/u-boot$ git describe
v2016.03-rc1-138-gcc8d698
denis at DendiMachine:~/WorkSpace/u-boot$ git status
On branch master
Your branch is up-to-date with 'origin/master'.

Changes not staged for commit:
  (use "git add <file>..." to update what will be committed)
  (use "git checkout -- <file>..." to discard changes in working directory)

	modified:   include/configs/socfpga_arria5_socdk.h    // here I only changed SDRAM configuration

no changes added to commit (use "git add" and/or "git commit -a")
denis at DendiMachine:~/WorkSpace/u-boot$ make socfpga_arria5_defconfig
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/kconfig/conf.o
  SHIPPED scripts/kconfig/zconf.tab.c
  SHIPPED scripts/kconfig/zconf.lex.c
  SHIPPED scripts/kconfig/zconf.hash.c
  HOSTCC  scripts/kconfig/zconf.tab.o
  HOSTLD  scripts/kconfig/conf
#
# configuration written to .config
#
denis at DendiMachine:~/WorkSpace/u-boot$ make -j9

But after compilation I don't have such file.

I have installed:
- linaro toolchain
- u-boot-tools
- device-tree-compiler

All env variables should be ok, because in other way it won't compile.

make u-boot-with-spl-dtb.sfp doesn't work for me because there is no such target in Makefile.
What I'm doing wrong?
I will try to clone sources and build it from the scratch.

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/11/2016 01:45 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi Marek,
> 
> Here are my build steps:
> 
> denis at DendiMachine:~/WorkSpace/u-boot$ make clean
>   CLEAN   dts/../arch/arm/dts
>   CLEAN   dts
>   CLEAN   examples/standalone
>   CLEAN   tools
>   CLEAN   tools/lib tools/common
>   CLEAN   spl/arch spl/board spl/cmd spl/common spl/drivers spl/dts spl/fs spl/lib spl/u-boot-spl spl/u-boot-spl.bin spl/u-boot-spl.cfg spl/u-boot-spl.dtb spl/u-boot-spl-dtb.bin spl/u-boot-spl.lds spl/u-boot-spl.map spl/u-boot-spl-nodtb.bin spl/u-boot-spl-pad.bin spl/u-boot-spl.sfp
>   CLEAN   u-boot u-boot.bin u-boot.cfg u-boot.dtb u-boot-dtb.bin u-boot-dtb.img u-boot.img u-boot.lds u-boot.map u-boot-nodtb.bin u-boot.srec System.map
> denis at DendiMachine:~/WorkSpace/u-boot$ make distclean
>   CLEAN   scripts/basic
>   CLEAN   scripts/kconfig
>   CLEAN   include/config include/generated spl
>   CLEAN   .config .config.old include/autoconf.mk include/autoconf.mk.dep include/config.h
> denis at DendiMachine:~/WorkSpace/u-boot$ make clean
> denis at DendiMachine:~/WorkSpace/u-boot$ make distclean
> denis at DendiMachine:~/WorkSpace/u-boot$ git pull
> Already up-to-date.
> denis at DendiMachine:~/WorkSpace/u-boot$ git describe
> v2016.03-rc1-138-gcc8d698

I see , so you're not building 2016.01 , but 2016.03-rc .

> denis at DendiMachine:~/WorkSpace/u-boot$ git status
> On branch master
> Your branch is up-to-date with 'origin/master'.
> 
> Changes not staged for commit:
>   (use "git add <file>..." to update what will be committed)
>   (use "git checkout -- <file>..." to discard changes in working directory)
> 
> 	modified:   include/configs/socfpga_arria5_socdk.h    // here I only changed SDRAM configuration
> 
> no changes added to commit (use "git add" and/or "git commit -a")
> denis at DendiMachine:~/WorkSpace/u-boot$ make socfpga_arria5_defconfig
>   HOSTCC  scripts/basic/fixdep
>   HOSTCC  scripts/kconfig/conf.o
>   SHIPPED scripts/kconfig/zconf.tab.c
>   SHIPPED scripts/kconfig/zconf.lex.c
>   SHIPPED scripts/kconfig/zconf.hash.c
>   HOSTCC  scripts/kconfig/zconf.tab.o
>   HOSTLD  scripts/kconfig/conf
> #
> # configuration written to .config
> #
> denis at DendiMachine:~/WorkSpace/u-boot$ make -j9
> 
> But after compilation I don't have such file.
> 
> I have installed:
> - linaro toolchain
> - u-boot-tools
> - device-tree-compiler

OK, there has been a patch applied after 2016.01 which renames the
artifacts. I expected it to cause confusion, but I didn't expect it
to happen so soon. And the patch is even broken, sigh.

Do this after make -j9 as a workaround for the breakage:

$ make u-boot-with-spl.sfp

And then use the "u-boot-with-spl.sfp" file and place it into the QSPI
NOR. I will send a fix for the broken patch.

> All env variables should be ok, because in other way it won't compile.
> 
> make u-boot-with-spl-dtb.sfp doesn't work for me because there is no such target in Makefile.
> What I'm doing wrong?
> I will try to clone sources and build it from the scratch.
> 
> Best regards,
> Denis Bakhvalov
> 

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

$ quartus_hps -c 1 -o PV -a 0x0 u-boot-with-spl.sfp.bin
// here ".bin" because current programmer requires so. I think it shouldn't be a problem.

From manual:
"HPS Flash Programmer
The utility accepts a Binary File with a required ".bin" extension.
The HPS flash programmer command-line syntax is:
quartus_hps <options> <file.bin>"

Info: Version 13.1.0 Build 162 10/23/2013 SJ Full Version

After that I power off/on the unit and nothing happened.
I also compared md5 while copying - everything should be ok.

I tried it 2 times with no success:
Looks like unit is no booting.
No output in the console is visible.

If I change the images back (that is currently in official release) - at least bootloader pass and u-boot is also launching.

Does it mean that there is something wrong with SPL configuration?
Or maybe I need some patches from altera in order to make them working?
Because I can see some traces of applied patches in the svn history.

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/11/2016 03:02 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> $ quartus_hps -c 1 -o PV -a 0x0 u-boot-with-spl.sfp.bin
> // here ".bin" because current programmer requires so. I think it shouldn't be a problem.

This looks fine. You should be able to avoid renaming the file to have a
.bin suffix, the quartus_hps should take any file. I only tested it
with quartus 15.1 though, so it is possible there was a change since
13.1 which is what you use.

> From manual:
> "HPS Flash Programmer
> The utility accepts a Binary File with a required ".bin" extension.
> The HPS flash programmer command-line syntax is:
> quartus_hps <options> <file.bin>"
> 
> Info: Version 13.1.0 Build 162 10/23/2013 SJ Full Version
> 
> After that I power off/on the unit and nothing happened.
> I also compared md5 while copying - everything should be ok.
> 
> I tried it 2 times with no success:
> Looks like unit is no booting.
> No output in the console is visible.

There is output, but it takes a while for the USB-to-UART chip to kick
in after restart, so you don't see it. I will send you two more patches,
so apply them and it should get you up and running. The QSPI NOR boot
was not enabled on AV/CV SoCDK.

You can also grab the latest stuff here:
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=summary

> If I change the images back (that is currently in official release) - at least bootloader pass and u-boot is also launching.
> 
> Does it mean that there is something wrong with SPL configuration?
> Or maybe I need some patches from altera in order to make them working?
> Because I can see some traces of applied patches in the svn history.
> 
> Best regards,
> Denis Bakhvalov
> 

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

> There is output, but it takes a while for the USB-to-UART chip to kick
> in after restart, so you don't see it. I will send you two more patches,
> so apply them and it should get you up and running. The QSPI NOR boot
> was not enabled on AV/CV SoCDK.

> You can also grab the latest stuff here:
> http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=summary

I made those changes, but still no progress.

Currently I'm building u-boot from 
git://git.denx.de/u-boot.git
Should I use
git://git.denx.de/u-boot-socfpga.git
?

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/11/2016 04:29 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
>> There is output, but it takes a while for the USB-to-UART chip to kick
>> in after restart, so you don't see it. I will send you two more patches,
>> so apply them and it should get you up and running. The QSPI NOR boot
>> was not enabled on AV/CV SoCDK.
> 
>> You can also grab the latest stuff here:
>> http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=summary
> 
> I made those changes, but still no progress.
> 
> Currently I'm building u-boot from 
> git://git.denx.de/u-boot.git
> Should I use
> git://git.denx.de/u-boot-socfpga.git
> ?

The fixes are pushed there, so yes, give it a try.

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi Marek,

I tried mainline U-boot with your patches as well as socfpga branch.
Still no success.
There is no output on the console.
Once again when I'm uploading old version of U-boot and preloader (from 2013) at least I can see the output on the console.

What could be the next step?

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/12/2016 09:44 AM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi Marek,

Hi Denis,

> I tried mainline U-boot with your patches as well as socfpga branch.
> Still no success.

Did you try the image I sent you ? That one is tested to work on AV SoCDK.

> There is no output on the console.
> Once again when I'm uploading old version of U-boot and preloader (from 2013) at least I can see the output on the console.
> 
> What could be the next step?

Press the "WARM RESET" button of the HPS (located top-right, if you have
the board oriented with HPS ethernet on the top-left). Do you
see any console output then ? You do use the top-right miniUSB port
for console, right ?

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

> > I tried mainline U-boot with your patches as well as socfpga branch.
> > Still no success.
>
> Did you try the image I sent you ? That one is tested to work on AV SoCDK.

I tried it also. The same result.

> > There is no output on the console.
> > Once again when I'm uploading old version of U-boot and preloader (from 2013) at least I can see the output on the console.
> > 
> > What could be the next step?
> 
> Press the "WARM RESET" button of the HPS (located top-right, if you have
> the board oriented with HPS ethernet on the top-left). Do you
> see any console output then ? You do use the top-right miniUSB port
> for console, right ?

Currently board is integrated in RF unit. I will put off the cover and press it.

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi Marek,

> > Press the "WARM RESET" button of the HPS (located top-right, if you have
> > the board oriented with HPS ethernet on the top-left). Do you
> > see any console output then ? You do use the top-right miniUSB port
> > for console, right ?
> 
> Currently board is integrated in RF unit. I will put off the cover and press it.

I took off the cover and:
1. We don't have socfpga dev kit. There is only fpga itself. 
Sorry for that, but I haven't ever opened the unit before.
I assume that the main board is produced by Nokia.
2. Maybe this is the problem, that we are targeting socfpga Dev Kit?
3. I can send you some photos to check.

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/12/2016 03:00 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi Marek,

Hi Denis,

>>> Press the "WARM RESET" button of the HPS (located top-right, if you have
>>> the board oriented with HPS ethernet on the top-left). Do you
>>> see any console output then ? You do use the top-right miniUSB port
>>> for console, right ?
>>
>> Currently board is integrated in RF unit. I will put off the cover and press it.
> 
> I took off the cover and:
> 1. We don't have socfpga dev kit. There is only fpga itself. 
> Sorry for that, but I haven't ever opened the unit before.

Oh, so this is a custom board. Do you use stock av_socdk configuration
of the u-boot provided by Altera or did you do some modifications to it?
That'd probably explain why it works for you.

> I assume that the main board is produced by Nokia.
> 2. Maybe this is the problem, that we are targeting socfpga Dev Kit?
> 3. I can send you some photos to check.

That's fine, just check if you did some modifications to the altera fork
of u-boot. Especially interesting would be PLL/pinmux/DRAM config.

Cheers!

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Bakhvalov, Denis]

Hi Marek,

> That's fine, just check if you did some modifications to the altera fork
> of u-boot. Especially interesting would be PLL/pinmux/DRAM config.

I tried to launch altera branch from here: https://github.com/altera-opensource/u-boot-socfpga.
It didn't work out of the box as well.
I will try to extract the difference in source codes and will let you know about the results.

Best regards,
Denis Bakhvalov

[U-Boot] Problem with mounting a jffs2 partition on flash.

[Marek Vasut]

On 02/12/2016 04:39 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi Marek,

Hi Denis,

>> That's fine, just check if you did some modifications to the altera fork
>> of u-boot. Especially interesting would be PLL/pinmux/DRAM config.
> 
> I tried to launch altera branch from here: https://github.com/altera-opensource/u-boot-socfpga.
> It didn't work out of the box as well.
> I will try to extract the difference in source codes and will let you know about the results.

Check this script, it's used to extract the configuration files from
Quartus project. The filenames it uses are the same as in your u-boot
source from altera, so that should give you an idea for where to look:

http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=blob;f=arch/arm/mach-socfpga/qts-filter.sh

If you collect these files, you can use the script to generate cleaned
up headers for mainline U-Boot , load it into
board/altera/socfpga/arria5_socdk/qts/ and recompile. That might fix
your boot problem.
Of course, to implement an official port, you should not hack the AV
SoCDK board file that way, it's only for a quick test.