* [Qemu-devel] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions
@ 2012-02-08 5:53 David Gibson
2012-02-08 6:54 ` malc
0 siblings, 1 reply; 7+ messages in thread
From: David Gibson @ 2012-02-08 5:53 UTC (permalink / raw)
To: agraf; +Cc: qemu-ppc, qemu-devel
From: Thomas Huth <thuth@linux.vnet.ibm.com>
These instructions for loading and storing byte-swapped 64-bit values have
been introduced in PowerISA 2.06.
Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
---
target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
1 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index b2780db..bb06b2b 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2897,6 +2897,18 @@ static inline void gen_qemu_ld32ur(DisasContext *ctx, TCGv arg1, TCGv arg2)
}
GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
+#if defined(TARGET_PPC64)
+/* ldbrx */
+static inline void gen_qemu_ld64ur(DisasContext *ctx, TCGv arg1, TCGv arg2)
+{
+ tcg_gen_qemu_ld64(arg1, arg2, ctx->mem_idx);
+ if (likely(!ctx->le_mode)) {
+ tcg_gen_bswap64_tl(arg1, arg1);
+ }
+}
+GEN_LDX(ldbr, ld64ur, 0x14, 0x10, PPC_64B);
+#endif /* TARGET_PPC64 */
+
/* sthbrx */
static inline void gen_qemu_st16r(DisasContext *ctx, TCGv arg1, TCGv arg2)
{
@@ -2927,6 +2939,22 @@ static inline void gen_qemu_st32r(DisasContext *ctx, TCGv arg1, TCGv arg2)
}
GEN_STX(stwbr, st32r, 0x16, 0x14, PPC_INTEGER);
+#if defined(TARGET_PPC64)
+/* stdbrx */
+static inline void gen_qemu_st64r(DisasContext *ctx, TCGv arg1, TCGv arg2)
+{
+ if (likely(!ctx->le_mode)) {
+ TCGv t0 = tcg_temp_new();
+ tcg_gen_bswap64_tl(t0, arg1);
+ tcg_gen_qemu_st64(t0, arg2, ctx->mem_idx);
+ tcg_temp_free(t0);
+ } else {
+ tcg_gen_qemu_st64(arg1, arg2, ctx->mem_idx);
+ }
+}
+GEN_STX(stdbr, st64r, 0x14, 0x14, PPC_64B);
+#endif /* TARGET_PPC64 */
+
/*** Integer load and store multiple ***/
/* lmw */
@@ -8849,6 +8877,7 @@ GEN_LDUX(lwa, ld32s, 0x15, 0x0B, PPC_64B)
GEN_LDX(lwa, ld32s, 0x15, 0x0A, PPC_64B)
GEN_LDUX(ld, ld64, 0x15, 0x01, PPC_64B)
GEN_LDX(ld, ld64, 0x15, 0x00, PPC_64B)
+GEN_LDX(ldbr, ld64ur, 0x14, 0x10, PPC_64B)
#endif
GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER)
GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER)
@@ -8878,6 +8907,7 @@ GEN_STS(stw, st32, 0x04, PPC_INTEGER)
#if defined(TARGET_PPC64)
GEN_STUX(std, st64, 0x15, 0x05, PPC_64B)
GEN_STX(std, st64, 0x15, 0x04, PPC_64B)
+GEN_STX(stdbr, st64r, 0x14, 0x14, PPC_64B)
#endif
GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER)
GEN_STX(stwbr, st32r, 0x16, 0x14, PPC_INTEGER)
--
1.7.8.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions
2012-02-08 5:53 [Qemu-devel] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions David Gibson
@ 2012-02-08 6:54 ` malc
2012-02-08 10:48 ` [Qemu-devel] [Qemu-ppc] " David Gibson
0 siblings, 1 reply; 7+ messages in thread
From: malc @ 2012-02-08 6:54 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, agraf, qemu-devel
On Wed, 8 Feb 2012, David Gibson wrote:
> From: Thomas Huth <thuth@linux.vnet.ibm.com>
>
> These instructions for loading and storing byte-swapped 64-bit values have
> been introduced in PowerISA 2.06.
>
> Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
> ---
> target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
> 1 files changed, 30 insertions(+), 0 deletions(-)
I seem to recall that POWER5 machine i had access to didn't have
ld/stdbrx while CBE did have it (or was it the other way around?)
so question is - is PPC_64B sufficient?
[..snip..]
> GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER)
> GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER)
> @@ -8878,6 +8907,7 @@ GEN_STS(stw, st32, 0x04, PPC_INTEGER)
> #if defined(TARGET_PPC64)
> GEN_STUX(std, st64, 0x15, 0x05, PPC_64B)
> GEN_STX(std, st64, 0x15, 0x04, PPC_64B)
> +GEN_STX(stdbr, st64r, 0x14, 0x14, PPC_64B)
> #endif
> GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER)
> GEN_STX(stwbr, st32r, 0x16, 0x14, PPC_INTEGER)
>
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions
2012-02-08 6:54 ` malc
@ 2012-02-08 10:48 ` David Gibson
2012-02-08 13:27 ` Thomas Huth
0 siblings, 1 reply; 7+ messages in thread
From: David Gibson @ 2012-02-08 10:48 UTC (permalink / raw)
To: malc; +Cc: qemu-ppc, qemu-devel
On Wed, Feb 08, 2012 at 10:54:21AM +0400, malc wrote:
> On Wed, 8 Feb 2012, David Gibson wrote:
>
> > From: Thomas Huth <thuth@linux.vnet.ibm.com>
> >
> > These instructions for loading and storing byte-swapped 64-bit values have
> > been introduced in PowerISA 2.06.
> >
> > Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
> > ---
> > target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
> > 1 files changed, 30 insertions(+), 0 deletions(-)
>
> I seem to recall that POWER5 machine i had access to didn't have
> ld/stdbrx while CBE did have it (or was it the other way around?)
> so question is - is PPC_64B sufficient?
Ah, I think it's not. I think I spotted that before, but then forgot
about it. Thanks for the reminder.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions
2012-02-08 10:48 ` [Qemu-devel] [Qemu-ppc] " David Gibson
@ 2012-02-08 13:27 ` Thomas Huth
2012-02-09 0:26 ` David Gibson
0 siblings, 1 reply; 7+ messages in thread
From: Thomas Huth @ 2012-02-08 13:27 UTC (permalink / raw)
To: qemu-ppc; +Cc: qemu-devel
Am Wed, 8 Feb 2012 21:48:40 +1100
schrieb David Gibson <david@gibson.dropbear.id.au>:
> On Wed, Feb 08, 2012 at 10:54:21AM +0400, malc wrote:
> > On Wed, 8 Feb 2012, David Gibson wrote:
> >
> > > From: Thomas Huth <thuth@linux.vnet.ibm.com>
> > >
> > > These instructions for loading and storing byte-swapped 64-bit values have
> > > been introduced in PowerISA 2.06.
> > >
> > > Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
> > > ---
> > > target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
> > > 1 files changed, 30 insertions(+), 0 deletions(-)
> >
> > I seem to recall that POWER5 machine i had access to didn't have
> > ld/stdbrx while CBE did have it (or was it the other way around?)
> > so question is - is PPC_64B sufficient?
>
> Ah, I think it's not. I think I spotted that before, but then forgot
> about it. Thanks for the reminder.
Maybe it's a better idea to use PPC_64BX here? ... but that flag seems
to be missing in POWERPC_INSNS_POWER7... David, could PPC_64BX also be
included in that flag list?
Thomas
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions
2012-02-08 13:27 ` Thomas Huth
@ 2012-02-09 0:26 ` David Gibson
2012-02-09 7:43 ` Thomas Huth
0 siblings, 1 reply; 7+ messages in thread
From: David Gibson @ 2012-02-09 0:26 UTC (permalink / raw)
To: Thomas Huth; +Cc: qemu-ppc, qemu-devel
On Wed, Feb 08, 2012 at 02:27:35PM +0100, Thomas Huth wrote:
> Am Wed, 8 Feb 2012 21:48:40 +1100
> schrieb David Gibson <david@gibson.dropbear.id.au>:
>
> > On Wed, Feb 08, 2012 at 10:54:21AM +0400, malc wrote:
> > > On Wed, 8 Feb 2012, David Gibson wrote:
> > >
> > > > From: Thomas Huth <thuth@linux.vnet.ibm.com>
> > > >
> > > > These instructions for loading and storing byte-swapped 64-bit values have
> > > > been introduced in PowerISA 2.06.
> > > >
> > > > Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
> > > > ---
> > > > target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
> > > > 1 files changed, 30 insertions(+), 0 deletions(-)
> > >
> > > I seem to recall that POWER5 machine i had access to didn't have
> > > ld/stdbrx while CBE did have it (or was it the other way around?)
> > > so question is - is PPC_64B sufficient?
> >
> > Ah, I think it's not. I think I spotted that before, but then forgot
> > about it. Thanks for the reminder.
>
> Maybe it's a better idea to use PPC_64BX here? ... but that flag seems
> to be missing in POWERPC_INSNS_POWER7... David, could PPC_64BX also be
> included in that flag list?
Um.. what exactly do you mean by 64BX?
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions
2012-02-09 0:26 ` David Gibson
@ 2012-02-09 7:43 ` Thomas Huth
2012-02-09 13:49 ` Alexander Graf
0 siblings, 1 reply; 7+ messages in thread
From: Thomas Huth @ 2012-02-09 7:43 UTC (permalink / raw)
To: qemu-ppc; +Cc: qemu-devel, David Gibson
Am Thu, 9 Feb 2012 11:26:09 +1100
schrieb David Gibson <dwg@au1.ibm.com>:
> On Wed, Feb 08, 2012 at 02:27:35PM +0100, Thomas Huth wrote:
> > Am Wed, 8 Feb 2012 21:48:40 +1100
> > schrieb David Gibson <david@gibson.dropbear.id.au>:
> >
> > > On Wed, Feb 08, 2012 at 10:54:21AM +0400, malc wrote:
> > > > On Wed, 8 Feb 2012, David Gibson wrote:
> > > >
> > > > > From: Thomas Huth <thuth@linux.vnet.ibm.com>
> > > > >
> > > > > These instructions for loading and storing byte-swapped 64-bit values have
> > > > > been introduced in PowerISA 2.06.
> > > > >
> > > > > Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
> > > > > ---
> > > > > target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
> > > > > 1 files changed, 30 insertions(+), 0 deletions(-)
> > > >
> > > > I seem to recall that POWER5 machine i had access to didn't have
> > > > ld/stdbrx while CBE did have it (or was it the other way around?)
> > > > so question is - is PPC_64B sufficient?
> > >
> > > Ah, I think it's not. I think I spotted that before, but then forgot
> > > about it. Thanks for the reminder.
> >
> > Maybe it's a better idea to use PPC_64BX here? ... but that flag seems
> > to be missing in POWERPC_INSNS_POWER7... David, could PPC_64BX also be
> > included in that flag list?
>
> Um.. what exactly do you mean by 64BX?
>
There is a definition in target-ppc/cpu.h:
/* New 64 bits extensions (PowerPC 2.0x) */
PPC_64BX = 0x0000000000000040ULL,
According to the comment, I thought the PPC_64BX might be designed
for new 64-bit instructions?
Thomas
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [Qemu-devel] [Qemu-ppc] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions
2012-02-09 7:43 ` Thomas Huth
@ 2012-02-09 13:49 ` Alexander Graf
0 siblings, 0 replies; 7+ messages in thread
From: Alexander Graf @ 2012-02-09 13:49 UTC (permalink / raw)
To: Thomas Huth; +Cc: qemu-ppc, qemu-devel
On 09.02.2012, at 08:43, Thomas Huth wrote:
> Am Thu, 9 Feb 2012 11:26:09 +1100
> schrieb David Gibson <dwg@au1.ibm.com>:
>
>> On Wed, Feb 08, 2012 at 02:27:35PM +0100, Thomas Huth wrote:
>>> Am Wed, 8 Feb 2012 21:48:40 +1100
>>> schrieb David Gibson <david@gibson.dropbear.id.au>:
>>>
>>>> On Wed, Feb 08, 2012 at 10:54:21AM +0400, malc wrote:
>>>>> On Wed, 8 Feb 2012, David Gibson wrote:
>>>>>
>>>>>> From: Thomas Huth <thuth@linux.vnet.ibm.com>
>>>>>>
>>>>>> These instructions for loading and storing byte-swapped 64-bit values have
>>>>>> been introduced in PowerISA 2.06.
>>>>>>
>>>>>> Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com>
>>>>>> ---
>>>>>> target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
>>>>>> 1 files changed, 30 insertions(+), 0 deletions(-)
>>>>>
>>>>> I seem to recall that POWER5 machine i had access to didn't have
>>>>> ld/stdbrx while CBE did have it (or was it the other way around?)
>>>>> so question is - is PPC_64B sufficient?
>>>>
>>>> Ah, I think it's not. I think I spotted that before, but then forgot
>>>> about it. Thanks for the reminder.
>>>
>>> Maybe it's a better idea to use PPC_64BX here? ... but that flag seems
>>> to be missing in POWERPC_INSNS_POWER7... David, could PPC_64BX also be
>>> included in that flag list?
>>
>> Um.. what exactly do you mean by 64BX?
>>
>
> There is a definition in target-ppc/cpu.h:
>
> /* New 64 bits extensions (PowerPC 2.0x) */
> PPC_64BX = 0x0000000000000040ULL,
>
> According to the comment, I thought the PPC_64BX might be designed
> for new 64-bit instructions?
Well, we need to be a bit more specific here to know what we're implementing. The flag above just indicates the lq opcode:
target-ppc/translate.c:GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX),
So how about we create a new PPC2 flag for BRX and add that in POWER7 INSNS? If you could find out if Cell also supports these instructions, that'd be great. I don't have a 2.05 spec handy and 2.04 doesn't implement it yet.
Alex
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2012-02-09 13:49 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-02-08 5:53 [Qemu-devel] [PATCH] PPC64: Add support for ldbrx and stdbrx instructions David Gibson
2012-02-08 6:54 ` malc
2012-02-08 10:48 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2012-02-08 13:27 ` Thomas Huth
2012-02-09 0:26 ` David Gibson
2012-02-09 7:43 ` Thomas Huth
2012-02-09 13:49 ` Alexander Graf
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