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From: Andy Duan <fugang.duan@nxp.com>
To: "A.S. Dong" <aisheng.dong@nxp.com>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"jslaby@suse.com" <jslaby@suse.com>,
	"stefan@agner.ch" <stefan@agner.ch>,
	Mingkai Hu <mingkai.hu@nxp.com>, "Y.B. Lu" <yangbo.lu@nxp.com>,
	"A.S. Dong" <aisheng.dong@nxp.com>
Subject: RE: [PATCH 0/6] tty: serial: lpuart: add imx7ulp support
Date: Tue, 9 May 2017 11:13:34 +0000	[thread overview]
Message-ID: <AM4PR0401MB2260B8A8481A967E980E1A1DFFEF0@AM4PR0401MB2260.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1494316248-24052-1-git-send-email-aisheng.dong@nxp.com>

From: Dong Aisheng <aisheng.dong@nxp.com> Sent: Tuesday, May 09, 2017 3:51 PM
>To: linux-serial@vger.kernel.org
>Cc: linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
>gregkh@linuxfoundation.org; jslaby@suse.com; Andy Duan
><fugang.duan@nxp.com>; stefan@agner.ch; Mingkai Hu
><mingkai.hu@nxp.com>; Y.B. Lu <yangbo.lu@nxp.com>; A.S. Dong
><aisheng.dong@nxp.com>
>Subject: [PATCH 0/6] tty: serial: lpuart: add imx7ulp support
>
>This patch series mainly intends to add imx7ulp support which is also using FSL
>lpuart.
>
>The lpuart in imx7ulp is basically the same as ls1021a. It's also
>32 bit width register, but unlike ls1021a, it's little endian.
>Besides that, imx7ulp lpuart has a minor different register layout from ls1021a
>that it has four extra registers (verid, param, global,
>pincfg) located at the beginning of register map, which are currently not used
>by the driver and less to be used later.
>
>Furthermore, this patch serial also add a new more accurate baud rate
>calculation method as MX7ULP can't divide a suitable baud rate with the
>default setting.
>
>Currently the new baud rate calculation is only enabled on MX7ULP.
>However, i guess the Layerscape may also be able to use it as there seems to
>be no difference in baud rate setting register after checking the Layerscape
>Reference Manual.
>
>As i don't have Layerscape boards, i can't test it, so i only enable it for MX7ULP
>by default to avoid a potential break.
>
>I copied LayerScape guys in this series and hope they can help test later.
>If it works on Layerscape as well, then they can switch to the new setting too
>and totally remove the old stuff.
>
>Dong Aisheng (6):
>  tty: serial: lpuart: introduce lpuart_soc_data to represent SoC
>    property
>  tty: serial: lpuart: add little endian 32 bit register support
>  dt-bindings: serial: fsl-lpuart: add i.MX7ULP support
>  tty: serial: lpuart: add imx7ulp support
>  tty: serial: lpuart: add earlycon support for imx7ulp
>  tty: serial: lpuart: add a more accurate baud rate calculation method
>
> .../devicetree/bindings/serial/fsl-lpuart.txt      |   2 +
> drivers/tty/serial/fsl_lpuart.c                    | 149 ++++++++++++++++++---
> 2 files changed, 136 insertions(+), 15 deletions(-)
>
>--
>2.7.4

The series looks fine.

Acked-by: Fugang Duan <fugang.duan@nxp.com>

WARNING: multiple messages have this Message-ID (diff)
From: Andy Duan <fugang.duan@nxp.com>
To: "linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"jslaby@suse.com" <jslaby@suse.com>,
	"stefan@agner.ch" <stefan@agner.ch>,
	Mingkai Hu <mingkai.hu@nxp.com>, "Y.B. Lu" <yangbo.lu@nxp.com>,
	"A.S. Dong" <aisheng.dong@nxp.com>
Subject: RE: [PATCH 0/6] tty: serial: lpuart: add imx7ulp support
Date: Tue, 9 May 2017 11:13:34 +0000	[thread overview]
Message-ID: <AM4PR0401MB2260B8A8481A967E980E1A1DFFEF0@AM4PR0401MB2260.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1494316248-24052-1-git-send-email-aisheng.dong@nxp.com>

From: Dong Aisheng <aisheng.dong@nxp.com> Sent: Tuesday, May 09, 2017 3:51 PM
>To: linux-serial@vger.kernel.org
>Cc: linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
>gregkh@linuxfoundation.org; jslaby@suse.com; Andy Duan
><fugang.duan@nxp.com>; stefan@agner.ch; Mingkai Hu
><mingkai.hu@nxp.com>; Y.B. Lu <yangbo.lu@nxp.com>; A.S. Dong
><aisheng.dong@nxp.com>
>Subject: [PATCH 0/6] tty: serial: lpuart: add imx7ulp support
>
>This patch series mainly intends to add imx7ulp support which is also using FSL
>lpuart.
>
>The lpuart in imx7ulp is basically the same as ls1021a. It's also
>32 bit width register, but unlike ls1021a, it's little endian.
>Besides that, imx7ulp lpuart has a minor different register layout from ls1021a
>that it has four extra registers (verid, param, global,
>pincfg) located at the beginning of register map, which are currently not used
>by the driver and less to be used later.
>
>Furthermore, this patch serial also add a new more accurate baud rate
>calculation method as MX7ULP can't divide a suitable baud rate with the
>default setting.
>
>Currently the new baud rate calculation is only enabled on MX7ULP.
>However, i guess the Layerscape may also be able to use it as there seems to
>be no difference in baud rate setting register after checking the Layerscape
>Reference Manual.
>
>As i don't have Layerscape boards, i can't test it, so i only enable it for MX7ULP
>by default to avoid a potential break.
>
>I copied LayerScape guys in this series and hope they can help test later.
>If it works on Layerscape as well, then they can switch to the new setting too
>and totally remove the old stuff.
>
>Dong Aisheng (6):
>  tty: serial: lpuart: introduce lpuart_soc_data to represent SoC
>    property
>  tty: serial: lpuart: add little endian 32 bit register support
>  dt-bindings: serial: fsl-lpuart: add i.MX7ULP support
>  tty: serial: lpuart: add imx7ulp support
>  tty: serial: lpuart: add earlycon support for imx7ulp
>  tty: serial: lpuart: add a more accurate baud rate calculation method
>
> .../devicetree/bindings/serial/fsl-lpuart.txt      |   2 +
> drivers/tty/serial/fsl_lpuart.c                    | 149 ++++++++++++++++++---
> 2 files changed, 136 insertions(+), 15 deletions(-)
>
>--
>2.7.4

The series looks fine.

Acked-by: Fugang Duan <fugang.duan@nxp.com>

WARNING: multiple messages have this Message-ID (diff)
From: fugang.duan@nxp.com (Andy Duan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/6] tty: serial: lpuart: add imx7ulp support
Date: Tue, 9 May 2017 11:13:34 +0000	[thread overview]
Message-ID: <AM4PR0401MB2260B8A8481A967E980E1A1DFFEF0@AM4PR0401MB2260.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1494316248-24052-1-git-send-email-aisheng.dong@nxp.com>

From: Dong Aisheng <aisheng.dong@nxp.com> Sent: Tuesday, May 09, 2017 3:51 PM
>To: linux-serial at vger.kernel.org
>Cc: linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
>gregkh at linuxfoundation.org; jslaby at suse.com; Andy Duan
><fugang.duan@nxp.com>; stefan at agner.ch; Mingkai Hu
><mingkai.hu@nxp.com>; Y.B. Lu <yangbo.lu@nxp.com>; A.S. Dong
><aisheng.dong@nxp.com>
>Subject: [PATCH 0/6] tty: serial: lpuart: add imx7ulp support
>
>This patch series mainly intends to add imx7ulp support which is also using FSL
>lpuart.
>
>The lpuart in imx7ulp is basically the same as ls1021a. It's also
>32 bit width register, but unlike ls1021a, it's little endian.
>Besides that, imx7ulp lpuart has a minor different register layout from ls1021a
>that it has four extra registers (verid, param, global,
>pincfg) located at the beginning of register map, which are currently not used
>by the driver and less to be used later.
>
>Furthermore, this patch serial also add a new more accurate baud rate
>calculation method as MX7ULP can't divide a suitable baud rate with the
>default setting.
>
>Currently the new baud rate calculation is only enabled on MX7ULP.
>However, i guess the Layerscape may also be able to use it as there seems to
>be no difference in baud rate setting register after checking the Layerscape
>Reference Manual.
>
>As i don't have Layerscape boards, i can't test it, so i only enable it for MX7ULP
>by default to avoid a potential break.
>
>I copied LayerScape guys in this series and hope they can help test later.
>If it works on Layerscape as well, then they can switch to the new setting too
>and totally remove the old stuff.
>
>Dong Aisheng (6):
>  tty: serial: lpuart: introduce lpuart_soc_data to represent SoC
>    property
>  tty: serial: lpuart: add little endian 32 bit register support
>  dt-bindings: serial: fsl-lpuart: add i.MX7ULP support
>  tty: serial: lpuart: add imx7ulp support
>  tty: serial: lpuart: add earlycon support for imx7ulp
>  tty: serial: lpuart: add a more accurate baud rate calculation method
>
> .../devicetree/bindings/serial/fsl-lpuart.txt      |   2 +
> drivers/tty/serial/fsl_lpuart.c                    | 149 ++++++++++++++++++---
> 2 files changed, 136 insertions(+), 15 deletions(-)
>
>--
>2.7.4

The series looks fine.

Acked-by: Fugang Duan <fugang.duan@nxp.com>

  parent reply	other threads:[~2017-05-09 11:13 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-09  7:50 [PATCH 0/6] tty: serial: lpuart: add imx7ulp support Dong Aisheng
2017-05-09  7:50 ` Dong Aisheng
2017-05-09  7:50 ` Dong Aisheng
2017-05-09  7:50 ` [PATCH 1/6] tty: serial: lpuart: introduce lpuart_soc_data to represent SoC property Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-10  3:50   ` Stefan Agner
2017-05-10  3:50     ` Stefan Agner
2017-05-10  6:06     ` Dong Aisheng
2017-05-10  6:06       ` Dong Aisheng
2017-05-10  6:06       ` Dong Aisheng
2017-05-09  7:50 ` [PATCH 2/6] tty: serial: lpuart: add little endian 32 bit register support Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-10  3:58   ` Stefan Agner
2017-05-10  3:58     ` Stefan Agner
2017-05-10  6:19     ` Dong Aisheng
2017-05-10  6:19       ` Dong Aisheng
2017-05-10  6:19       ` Dong Aisheng
2017-05-09  7:50 ` [PATCH 3/6] dt-bindings: serial: fsl-lpuart: add i.MX7ULP support Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-12 20:12   ` Rob Herring
2017-05-12 20:12     ` Rob Herring
2017-05-12 20:12     ` Rob Herring
2017-05-09  7:50 ` [PATCH 4/6] tty: serial: lpuart: add imx7ulp support Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-10  4:10   ` Stefan Agner
2017-05-10  4:10     ` Stefan Agner
2017-05-10  6:14     ` Dong Aisheng
2017-05-10  6:14       ` Dong Aisheng
2017-05-10  6:14       ` Dong Aisheng
2017-05-10 20:37       ` Stefan Agner
2017-05-10 20:37         ` Stefan Agner
2017-05-12 13:28         ` Dong Aisheng
2017-05-12 13:28           ` Dong Aisheng
2017-05-09  7:50 ` [PATCH 5/6] tty: serial: lpuart: add earlycon support for imx7ulp Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-09  7:50 ` [PATCH 6/6] tty: serial: lpuart: add a more accurate baud rate calculation method Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-09  7:50   ` Dong Aisheng
2017-05-28  0:04   ` Andy Shevchenko
2017-05-28  0:04     ` Andy Shevchenko
2017-05-31 14:18     ` A.S. Dong
2017-05-31 14:18       ` A.S. Dong
2017-06-02 17:11       ` Andy Shevchenko
2017-06-02 17:11         ` Andy Shevchenko
2017-06-09  8:01         ` A.S. Dong
2017-06-09  8:01           ` A.S. Dong
2017-06-09  9:26           ` Andy Shevchenko
2017-06-09  9:26             ` Andy Shevchenko
2017-06-09 14:20             ` A.S. Dong
2017-06-09 14:20               ` A.S. Dong
2017-06-09 15:48               ` Andy Shevchenko
2017-06-09 15:48                 ` Andy Shevchenko
2017-06-12 14:23                 ` A.S. Dong
2017-06-12 14:23                   ` A.S. Dong
2017-05-09 11:13 ` Andy Duan [this message]
2017-05-09 11:13   ` [PATCH 0/6] tty: serial: lpuart: add imx7ulp support Andy Duan
2017-05-09 11:13   ` Andy Duan

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