* [PATCH 0/4] Enable gigadevice and add new part #s
@ 2022-12-19 22:48 Victor Lim
2022-12-19 22:48 ` [PATCH 1/4] xilinx: zynq: Enable gigadevice Victor Lim
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: Victor Lim @ 2022-12-19 22:48 UTC (permalink / raw)
To: u-boot
Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma,
Victor Lim
Enabling gigadevice part #s.
These are the part #s added,
gd25b256: 3V QSPI, QE=1, 256Mbit
gd25b512: 3V QSPI, QE=1, 512Mbit
gd55b01g: 3V QSPI, QE=1, 1Gbit
gd55b02g: 3V QSPI, QE=1, 2Gbit
gd25f64: 3V QSPI, QE=1, 64Mbit, high performance
gd25f128: 3V QSPI, QE=1, 128Mbit, high performance
gd25f256: 3V QSPI, QE=1, 256Mbit, high performance
gd55f512: 3V QSPI, QE=1, 512Mbit, high performance
gd25t512: 3V QSPI, 512Mbit, ultra high performance
gd55t01g: 3V QSPI, 1Gbit, ultra high performance
gd55t02g: 3V QSPI, 2Gbit, ultra high performance
gd25x512: 3V OSPI, 512Mbit, ultra high performance
gd55x01g: 3V OSPI, 1Gbit, ultra high performance
gd55x02g: 3V OSPI, 2Gbit, ultra high performance
gd25lb256: 1.8V QSPI, QE=1, 256Mbit
gd25lb512: 1.8V QSPI, QE=1, 512Mbit
gd55lb01g: 1.8V QSPI, QE=1, 1Gbit
gd55lb02g: 1.8V QSPI, QE=1, 2Gbit
gd25lf64: 1.8V QSPI, QE=1, 64Mbit, high performance
gd25lf128: 1.8V QSPI, QE=1, 128Mbit, high performance
gd25lf256: 1.8V QSPI, QE=1, 256Mbit, high performance
gd55lf512: 1.8V QSPI, QE=1, 512Mbit, high performance
gd25lt512: 1.8V QSPI, 512Mbit, ultra high performance
gd55lt01g: 1.8V QSPI, 1Gbit, ultra high performance
gd55lt02g: 1.8V QSPI, 2Gbit, ultra high performance
gd25lx512: 1.8V OSPI, 512Mbit, ultra high performance
gd55lx01g: 1.8V OSPI, 1Gbit, ultra high performance
gd55lx02g: 1.8V OSPI, 2Gbit, ultra high performance
This is the link to the datasheet.
https://www.gigadevice.com/products/memory/flash/spi-nor/
Victor Lim (4):
xilinx: zynq: Enable gigadevice
arm64: zynqmp: Enable gigadevice
xilinx: versal: Enable gigadevice parts
mtd: spi-nor-ids: add gigadevice part #
configs/xilinx_versal_mini_qspi_defconfig | 1 +
configs/xilinx_zynq_virt_defconfig | 1 +
configs/xilinx_zynqmp_mini_qspi_defconfig | 1 +
configs/xilinx_zynqmp_virt_defconfig | 1 +
configs/zynq_cse_qspi_defconfig | 1 +
drivers/mtd/spi/spi-nor-ids.c | 68 +++++++++++++++++++++++
6 files changed, 73 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH 1/4] xilinx: zynq: Enable gigadevice 2022-12-19 22:48 [PATCH 0/4] Enable gigadevice and add new part #s Victor Lim @ 2022-12-19 22:48 ` Victor Lim 2022-12-19 22:48 ` [PATCH 2/4] arm64: zynqmp: " Victor Lim ` (3 subsequent siblings) 4 siblings, 0 replies; 12+ messages in thread From: Victor Lim @ 2022-12-19 22:48 UTC (permalink / raw) To: u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma, Victor Lim Enable gigadevice part #s Signed-off-by: Victor Lim <vlim@gigadevice.com> --- configs/xilinx_zynq_virt_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 611c5e993c..fe2321d658 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -103,6 +103,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..d58db07e71 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -71,6 +71,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/4] arm64: zynqmp: Enable gigadevice 2022-12-19 22:48 [PATCH 0/4] Enable gigadevice and add new part #s Victor Lim 2022-12-19 22:48 ` [PATCH 1/4] xilinx: zynq: Enable gigadevice Victor Lim @ 2022-12-19 22:48 ` Victor Lim 2022-12-19 22:48 ` [PATCH 3/4] xilinx: versal: Enable gigadevice parts Victor Lim ` (2 subsequent siblings) 4 siblings, 0 replies; 12+ messages in thread From: Victor Lim @ 2022-12-19 22:48 UTC (permalink / raw) To: u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma, Victor Lim Enable gigadevice part # Signed-off-by: Victor Lim <vlim@gigadevice.com> --- configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..2171d09fc3 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_POWER is not set CONFIG_ARM_DCC=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index e63b19b911..2893fdaa82 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -147,6 +147,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/4] xilinx: versal: Enable gigadevice parts 2022-12-19 22:48 [PATCH 0/4] Enable gigadevice and add new part #s Victor Lim 2022-12-19 22:48 ` [PATCH 1/4] xilinx: zynq: Enable gigadevice Victor Lim 2022-12-19 22:48 ` [PATCH 2/4] arm64: zynqmp: " Victor Lim @ 2022-12-19 22:48 ` Victor Lim 2022-12-19 22:48 ` [PATCH 4/4] mtd: spi-nor-ids: add gigadevice part # Victor Lim 2023-01-03 11:02 ` [PATCH 0/4] Enable gigadevice and add new part #s Michal Simek 4 siblings, 0 replies; 12+ messages in thread From: Victor Lim @ 2022-12-19 22:48 UTC (permalink / raw) To: u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma, Victor Lim Enable gigadevice in this file Signed-off-by: Victor Lim <vlim@gigadevice.com> --- configs/xilinx_versal_mini_qspi_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index bb53e6c913..247a011dae 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -65,6 +65,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_POWER is not set CONFIG_ARM_DCC=y -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/4] mtd: spi-nor-ids: add gigadevice part # 2022-12-19 22:48 [PATCH 0/4] Enable gigadevice and add new part #s Victor Lim ` (2 preceding siblings ...) 2022-12-19 22:48 ` [PATCH 3/4] xilinx: versal: Enable gigadevice parts Victor Lim @ 2022-12-19 22:48 ` Victor Lim 2023-01-03 11:02 ` [PATCH 0/4] Enable gigadevice and add new part #s Michal Simek 4 siblings, 0 replies; 12+ messages in thread From: Victor Lim @ 2022-12-19 22:48 UTC (permalink / raw) To: u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma, Victor Lim Adding the following parts to the list gd25b256: 3V QSPI, QE=1, 256Mbit gd25b512: 3V QSPI, QE=1, 512Mbit gd55b01g: 3V QSPI, QE=1, 1Gbit gd55b02g: 3V QSPI, QE=1, 2Gbit gd25f64: 3V QSPI, QE=1, 64Mbit, high performance gd25f128: 3V QSPI, QE=1, 128Mbit, high performance gd25f256: 3V QSPI, QE=1, 256Mbit, high performance gd55f512: 3V QSPI, QE=1, 512Mbit, high performance gd25t512: 3V QSPI, 512Mbit, ultra high performance gd55t01g: 3V QSPI, 1Gbit, ultra high performance gd55t02g: 3V QSPI, 2Gbit, ultra high performance gd25x512: 3V OSPI, 512Mbit, ultra high performance gd55x01g: 3V OSPI, 1Gbit, ultra high performance gd55x02g: 3V OSPI, 2Gbit, ultra high performance gd25lb256: 1.8V QSPI, QE=1, 256Mbit gd25lb512: 1.8V QSPI, QE=1, 512Mbit gd55lb01g: 1.8V QSPI, QE=1, 1Gbit gd55lb02g: 1.8V QSPI, QE=1, 2Gbit gd25lf64: 1.8V QSPI, QE=1, 64Mbit, high performance gd25lf128: 1.8V QSPI, QE=1, 128Mbit, high performance gd25lf256: 1.8V QSPI, QE=1, 256Mbit, high performance gd55lf512: 1.8V QSPI, QE=1, 512Mbit, high performance gd25lt512: 1.8V QSPI, 512Mbit, ultra high performance gd55lt01g: 1.8V QSPI, 1Gbit, ultra high performance gd55lt02g: 1.8V QSPI, 2Gbit, ultra high performance gd25lx512: 1.8V OSPI, 512Mbit, ultra high performance gd55lx01g: 1.8V OSPI, 1Gbit, ultra high performance gd55lx02g: 1.8V OSPI, 2Gbit, ultra high performance This is the link to the datasheet. https://www.gigadevice.com/products/memory/flash/spi-nor/ Signed-off-by: Victor Lim <vlim@gigadevice.com> --- drivers/mtd/spi/spi-nor-ids.c | 68 +++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 74e93d6209..ba73eef87f 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -118,6 +118,36 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + /* adding these 3V QSPI flash parts */ + {INFO("gd25b256", 0xc84019, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES) }, + {INFO("gd25b512", 0xc8471A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55b01g", 0xc8471B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55b02g", 0xc8471C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25f64", 0xc84317, 0, 64 * 1024, 128, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25f128", 0xc84318, 0, 64 * 1024, 256, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25f256", 0xc84319, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55f512", 0xc8431A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25t512", 0xc8461A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55t01g", 0xc8461B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55t02g", 0xc8461C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + /* adding these 3V OSPI flash parts */ + {INFO("gd25x512", 0xc8481A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55x01g", 0xc8481B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55x02g", 0xc8481C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, { INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | @@ -128,10 +158,48 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + /* adding these 1.8V QSPI flash parts */ + {INFO("gd25lb256", 0xc86719, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lb512", 0xc8671A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lb01g", 0xc8671B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lb02g", 0xc8671C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lf80", 0xc86314, 0, 64 * 1024, 16, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25lf16", 0xc86315, 0, 64 * 1024, 32, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)}, + {INFO("gd25lf32", 0xc86316, 0, 64 * 1024, 64, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lf64", 0xc86317, 0, 64 * 1024, 128, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lf128", 0xc86318, 0, 64 * 1024, 256, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) }, + {INFO("gd25lf255", 0xc86319, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lf511", 0xc8631A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lt256", 0xc86619, 0, 64 * 1024, 512, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd25lt512", 0xc8661A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lt01g", 0xc8661B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lt02g", 0xc8661C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)}, { INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, + /* adding these 1.8V OSPI flash parts */ + {INFO("gd25lx512", 0xc8681A, 0, 64 * 1024, 1024, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lx01g", 0xc8681B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lx02g", 0xc8681C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ /* ISSI */ -- 2.25.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] Enable gigadevice and add new part #s 2022-12-19 22:48 [PATCH 0/4] Enable gigadevice and add new part #s Victor Lim ` (3 preceding siblings ...) 2022-12-19 22:48 ` [PATCH 4/4] mtd: spi-nor-ids: add gigadevice part # Victor Lim @ 2023-01-03 11:02 ` Michal Simek 2023-01-04 18:50 ` Vlim 4 siblings, 1 reply; 12+ messages in thread From: Michal Simek @ 2023-01-03 11:02 UTC (permalink / raw) To: Victor Lim, u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma On 12/19/22 23:48, Victor Lim wrote: > Enabling gigadevice part #s. > These are the part #s added, > gd25b256: 3V QSPI, QE=1, 256Mbit > gd25b512: 3V QSPI, QE=1, 512Mbit > gd55b01g: 3V QSPI, QE=1, 1Gbit > gd55b02g: 3V QSPI, QE=1, 2Gbit > gd25f64: 3V QSPI, QE=1, 64Mbit, high performance > gd25f128: 3V QSPI, QE=1, 128Mbit, high performance > gd25f256: 3V QSPI, QE=1, 256Mbit, high performance > gd55f512: 3V QSPI, QE=1, 512Mbit, high performance > gd25t512: 3V QSPI, 512Mbit, ultra high performance > gd55t01g: 3V QSPI, 1Gbit, ultra high performance > gd55t02g: 3V QSPI, 2Gbit, ultra high performance > gd25x512: 3V OSPI, 512Mbit, ultra high performance > gd55x01g: 3V OSPI, 1Gbit, ultra high performance > gd55x02g: 3V OSPI, 2Gbit, ultra high performance > gd25lb256: 1.8V QSPI, QE=1, 256Mbit > gd25lb512: 1.8V QSPI, QE=1, 512Mbit > gd55lb01g: 1.8V QSPI, QE=1, 1Gbit > gd55lb02g: 1.8V QSPI, QE=1, 2Gbit > gd25lf64: 1.8V QSPI, QE=1, 64Mbit, high performance > gd25lf128: 1.8V QSPI, QE=1, 128Mbit, high performance > gd25lf256: 1.8V QSPI, QE=1, 256Mbit, high performance > gd55lf512: 1.8V QSPI, QE=1, 512Mbit, high performance > gd25lt512: 1.8V QSPI, 512Mbit, ultra high performance > gd55lt01g: 1.8V QSPI, 1Gbit, ultra high performance > gd55lt02g: 1.8V QSPI, 2Gbit, ultra high performance > gd25lx512: 1.8V OSPI, 512Mbit, ultra high performance > gd55lx01g: 1.8V OSPI, 1Gbit, ultra high performance > gd55lx02g: 1.8V OSPI, 2Gbit, ultra high performance > > This is the link to the datasheet. > https://www.gigadevice.com/products/memory/flash/spi-nor/ > >> Victor Lim (4): > xilinx: zynq: Enable gigadevice > arm64: zynqmp: Enable gigadevice > xilinx: versal: Enable gigadevice parts > mtd: spi-nor-ids: add gigadevice part # > > configs/xilinx_versal_mini_qspi_defconfig | 1 + > configs/xilinx_zynq_virt_defconfig | 1 + > configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + > configs/xilinx_zynqmp_virt_defconfig | 1 + > configs/zynq_cse_qspi_defconfig | 1 + > drivers/mtd/spi/spi-nor-ids.c | 68 +++++++++++++++++++++++ > 6 files changed, 73 insertions(+) > First of all this should be v3 series. Second. When I run this for i in `ls configs/xilinx_*`; do NAME=`basename $i`; echo $NAME; make $NAME; make savedefconfig; cp defconfig $i; done I see that locations your added entries are not correct. Third b4 am -g is showing that base is not upstream version. Please use next branch as base. Definitely this series is better then previous one. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] Enable gigadevice and add new part #s 2023-01-03 11:02 ` [PATCH 0/4] Enable gigadevice and add new part #s Michal Simek @ 2023-01-04 18:50 ` Vlim 2023-01-05 7:25 ` Michal Simek 0 siblings, 1 reply; 12+ messages in thread From: Vlim @ 2023-01-04 18:50 UTC (permalink / raw) To: Michal Simek, u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma Thanks, Michal, Thanks for the feedback. I do have some questions regarding the following comments, Second. When I run this for i in `ls configs/xilinx_*`; do NAME=`basename $i`; echo $NAME; make $NAME; make savedefconfig; cp defconfig $i; done I see that locations your added entries are not correct. Third b4 am -g is showing that base is not upstream version. Please use next branch as base. Regarding the location of the entry, I believe you want me to add the entry in the alphabetical order? This way it is the first line of this group of information. CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y However, I am not sure about the following requirement, please provide additional information. Third b4 am -g is showing that base is not upstream version. Please use next branch as base. Also, for top posting, I am still not fully understood. It seems like I should not include the previous email. Let me try it here see if it is correct. Regards, Victor ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] Enable gigadevice and add new part #s 2023-01-04 18:50 ` Vlim @ 2023-01-05 7:25 ` Michal Simek 2023-01-05 19:47 ` Vlim 0 siblings, 1 reply; 12+ messages in thread From: Michal Simek @ 2023-01-05 7:25 UTC (permalink / raw) To: Vlim, Michal Simek, u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma On 1/4/23 19:50, Vlim wrote: > Thanks, Michal, > > Thanks for the feedback. > > I do have some questions regarding the following comments, > > Second. When I run this > > for i in `ls configs/xilinx_*`; do NAME=`basename $i`; echo $NAME; make $NAME; > make savedefconfig; cp defconfig $i; done > > I see that locations your added entries are not correct. > > Third b4 am -g is showing that base is not upstream version. > Please use next branch as base. Simply base your patches on upstream git repository not u-boot-xlnx. Use https://source.denx.de/u-boot/u-boot master or next branch. (next branch is preferred now for upcoming one week or so). > > Regarding the location of the entry, I believe you want me to add the entry in > the alphabetical order? Not really. I want to you follow Kconfig layout which is what make savedefconfig && cp defconfig configs/<defconfig> is for. > Also, for top posting, I am still not fully understood. > It seems like I should not include the previous email. > Let me try it here see if it is correct. Just put reaction below things you want to comment as I do here. Thanks, Michal ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] Enable gigadevice and add new part #s 2023-01-05 7:25 ` Michal Simek @ 2023-01-05 19:47 ` Vlim 2023-01-06 7:14 ` Michal Simek 0 siblings, 1 reply; 12+ messages in thread From: Vlim @ 2023-01-05 19:47 UTC (permalink / raw) To: Michal Simek, Michal Simek, u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma > Regarding the location of the entry, I believe you want me to add the entry in > the alphabetical order? Not really. I want to you follow Kconfig layout which is what make savedefconfig && cp defconfig configs/<defconfig> is for. Can you be more specific on this requirement? I believe this is pertaining to the defconfig files. Where is the correct line to insert the following entry? CONFIG_SPI_FLASH_GIGADEVICE=y Regards, Victor ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] Enable gigadevice and add new part #s 2023-01-05 19:47 ` Vlim @ 2023-01-06 7:14 ` Michal Simek 2023-01-06 19:53 ` Vlim 0 siblings, 1 reply; 12+ messages in thread From: Michal Simek @ 2023-01-06 7:14 UTC (permalink / raw) To: Vlim, Michal Simek, u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma On 1/5/23 20:47, Vlim wrote: >> Regarding the location of the entry, I believe you want me to add the entry in >> the alphabetical order? > > Not really. I want to you follow Kconfig layout which is what make savedefconfig > && cp defconfig configs/<defconfig> is for. > > Can you be more specific on this requirement? > I believe this is pertaining to the defconfig files. > Where is the correct line to insert the following entry? > CONFIG_SPI_FLASH_GIGADEVICE=y Again. Just enable that option and run for example make xilinx_zynqmp_virt_defconfig echo CONFIG_SPI_FLASH_GIGADEVICE=y >> .config make savedefconfig cp defconfig configs/xilinx_zynqmp_virt_defconfig git commit -a -s And that's it. Your symbol will be added to proper location. Thanks, Michal ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] Enable gigadevice and add new part #s 2023-01-06 7:14 ` Michal Simek @ 2023-01-06 19:53 ` Vlim 2023-01-09 7:59 ` Michal Simek 0 siblings, 1 reply; 12+ messages in thread From: Vlim @ 2023-01-06 19:53 UTC (permalink / raw) To: Michal Simek, Michal Simek, u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma Hi, Michal, On 1/5/23 20:47, Vlim wrote: >> Regarding the location of the entry, I believe you want me to add the entry in >> the alphabetical order? > > Not really. I want to you follow Kconfig layout which is what make savedefconfig > && cp defconfig configs/<defconfig> is for. > > Can you be more specific on this requirement? > I believe this is pertaining to the defconfig files. > Where is the correct line to insert the following entry? > CONFIG_SPI_FLASH_GIGADEVICE=y Again. Just enable that option and run for example make xilinx_zynqmp_virt_defconfig echo CONFIG_SPI_FLASH_GIGADEVICE=y >> .config make savedefconfig cp defconfig configs/xilinx_zynqmp_virt_defconfig git commit -a -s And that's it. Your symbol will be added to proper location. I did the make command, but it says nothing to be done. Do I need to install an additional software package in order to perform this function? victor@victor-17Z990-R-AAC9U1:~/Desktop/u-boot-xlnx/configs$ make zynq_cse_qspi_defconfig make: Nothing to be done for 'zynq_cse_qspi_defconfig'. victor@victor-17Z990-R-AAC9U1:~/Desktop/u-boot-xlnx/configs$ Regards, Victor ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] Enable gigadevice and add new part #s 2023-01-06 19:53 ` Vlim @ 2023-01-09 7:59 ` Michal Simek 0 siblings, 0 replies; 12+ messages in thread From: Michal Simek @ 2023-01-09 7:59 UTC (permalink / raw) To: Vlim, Michal Simek, u-boot Cc: vigneshr, jagan, michal.simek, vikhyat.goyal, ashok.reddy.soma On 1/6/23 20:53, Vlim wrote: > Hi, Michal, > > > > On 1/5/23 20:47, Vlim wrote: >>> Regarding the location of the entry, I believe you want me to add the entry in >>> the alphabetical order? >> >> Not really. I want to you follow Kconfig layout which is what make savedefconfig >> && cp defconfig configs/<defconfig> is for. >> >> Can you be more specific on this requirement? >> I believe this is pertaining to the defconfig files. >> Where is the correct line to insert the following entry? >> CONFIG_SPI_FLASH_GIGADEVICE=y > > Again. Just enable that option and run for example > make xilinx_zynqmp_virt_defconfig > > echo CONFIG_SPI_FLASH_GIGADEVICE=y >> .config > make savedefconfig > cp defconfig configs/xilinx_zynqmp_virt_defconfig > git commit -a -s > > And that's it. Your symbol will be added to proper location. > > I did the make command, but it says nothing to be done. > Do I need to install an additional software package in order to perform this > function? > > victor@victor-17Z990-R-AAC9U1:~/Desktop/u-boot-xlnx/configs$ make > zynq_cse_qspi_defconfig > make: Nothing to be done for 'zynq_cse_qspi_defconfig'. > victor@victor-17Z990-R-AAC9U1:~/Desktop/u-boot-xlnx/configs$ Please check that you use upstream tree without any your patches in. Here is how it should look like. [shm]$ git clone https://gitlab.denx.de/u-boot/u-boot.git Cloning into 'u-boot'... warning: redirecting to https://source.denx.de/u-boot/u-boot.git/ remote: Enumerating objects: 956, done. remote: Counting objects: 100% (798/798), done. remote: Compressing objects: 100% (245/245), done. remote: Total 566 (delta 449), reused 423 (delta 313), pack-reused 0 Receiving objects: 100% (566/566), 131.65 KiB | 1.13 MiB/s, done. Resolving deltas: 100% (449/449), completed with 146 local objects. [shm]$ cd u-boot/ [u-boot](master)$ ls api cmd disk env Kbuild MAINTAINERS README arch common doc examples Kconfig Makefile scripts board config.mk drivers fs lib net test boot configs dts include Licenses post tools [u-boot](master)$ arm64 [u-boot](master)$ make xilinx_zynqmp_virt_defconfig HOSTCC scripts/basic/fixdep HOSTCC scripts/kconfig/conf.o YACC scripts/kconfig/zconf.tab.c LEX scripts/kconfig/zconf.lex.c HOSTCC scripts/kconfig/zconf.tab.o HOSTLD scripts/kconfig/conf # # configuration written to .config # [u-boot](master)$ echo CONFIG_SPI_FLASH_GIGADEVICE=y >> .config [u-boot](master)$ make savedefconfig scripts/kconfig/conf --savedefconfig=defconfig Kconfig .config:2307:warning: override: reassigning to symbol SPI_FLASH_GIGADEVICE [u-boot](master)$ cp defconfig configs/xilinx_zynqmp_virt_defconfig [u-boot](master)$ git diff diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 4732c39bdbe1..b722850d6a5a 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -158,6 +158,7 @@ CONFIG_NAND_ARASAN=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_MAX_CHIPS=2 CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y Thanks, Michal ^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-01-09 8:00 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-12-19 22:48 [PATCH 0/4] Enable gigadevice and add new part #s Victor Lim 2022-12-19 22:48 ` [PATCH 1/4] xilinx: zynq: Enable gigadevice Victor Lim 2022-12-19 22:48 ` [PATCH 2/4] arm64: zynqmp: " Victor Lim 2022-12-19 22:48 ` [PATCH 3/4] xilinx: versal: Enable gigadevice parts Victor Lim 2022-12-19 22:48 ` [PATCH 4/4] mtd: spi-nor-ids: add gigadevice part # Victor Lim 2023-01-03 11:02 ` [PATCH 0/4] Enable gigadevice and add new part #s Michal Simek 2023-01-04 18:50 ` Vlim 2023-01-05 7:25 ` Michal Simek 2023-01-05 19:47 ` Vlim 2023-01-06 7:14 ` Michal Simek 2023-01-06 19:53 ` Vlim 2023-01-09 7:59 ` Michal Simek
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