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From: "Maciej W. Rozycki" <macro@mips.com>
To: Fredrik Noring <noring@nocrew.org>
Cc: <linux-mips@linux-mips.org>
Subject: Re: [PATCH v2] MIPS: Add basic R5900 support
Date: Tue, 17 Oct 2017 13:23:22 +0100	[thread overview]
Message-ID: <alpine.DEB.2.00.1710171301160.3886@tp.orcam.me.uk> (raw)
In-Reply-To: <20171015163937.GA2239@localhost.localdomain>

Hi Fredrik,

> Debian-based Black Rhino libc.so.6 declares "ELF 32-bit LSB MIPS-III
> version 1" but functions such as strcmp contain both 64-bit and multimedia
> instructions (presumably hand coded in assembly for the R5900):
> 
> 	6005ea90 <strcmp>:
> 	...
> 	6005eb50:	78880000 	lq	t0,0(a0)
> 	6005eb54:	710043a9 	pcpyud	t0,t0,zero
> 	6005eb58:	1000000c 	b	6005eb8c <strcmp+0xfc>
> 	6005eb5c:	71204ba9 	pcpyud	t1,t1,zero
> 	6005eb60:	dc880000 	ld	t0,0(a0)
> 	6005eb64:	24840008 	addiu	a0,a0,8
> 	6005eb68:	dca90000 	ld	t1,0(a1)
> 	6005eb6c:	710072a8 	pceqb	t6,t0,zero
> 	6005eb70:	71207aa8 	pceqb	t7,t1,zero
> 	6005eb74:	01cf7025 	or	t6,t6,t7
> 	6005eb78:	71097aa8 	pceqb	t7,t0,t1
> 	...
> 
> Hence corruption and register sign-extension failures. One can also note
> that according to the TX-79 manual, for a 32-bit kernel, several MIPS I
> instruction operations are undefined unless registers are sign-extended.

 That's a standard architectural requirement, not related to the kernel 
being 32-bit or 64-bit.  Overall all 32-bit ALU operations, except for SLL 
and SLLV, mandate that their input operands have been sign-extended from 
bit #31.

 I think you need to find another libc (or the whole userland), as I 
previously suggested.  I don't think we want to enable non-standard 
userland semantics, not as yet at least.  Having code supported like the 
snippet you have quoted above would I believe essentially boil down to 
Linux o64 ABI support, and anyway I think GAS should reject MMI 
instructions in the o32 assembly mode (which is something that was missed 
in R5900 support review).  I'll think on a suitable fix for GAS.

> It is unfortunate that these instructions seem untrappable by the R5900,
> instead silently causing strange behaviour and invalid results.

 Indeed, there's no way to trap with operations that break the 32-bit 
sign-extension requirement.  That's no different though from how the 
64-bit Linux kernel has operated for o32 software since forever; we don't 
clear the CP0.Status.UX bit for o32 tasks, although a discussion has been 
underway about changing it as it breaks indexed addressing (not a concern 
for the R5900, as a MIPS IV+ feature, e.g. LDXC1).  This has complications
though as we'd have to implement a TLB refill handler along with the XTLB 
refill handler, which is already taking space the former requires.

> Still left to explain is why the kernel stumbles on registers during
> initialisation, before user applications are invoked.

 Good luck!

  Maciej

WARNING: multiple messages have this Message-ID (diff)
From: "Maciej W. Rozycki" <macro@mips.com>
To: Fredrik Noring <noring@nocrew.org>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH v2] MIPS: Add basic R5900 support
Date: Tue, 17 Oct 2017 13:23:22 +0100	[thread overview]
Message-ID: <alpine.DEB.2.00.1710171301160.3886@tp.orcam.me.uk> (raw)
Message-ID: <20171017122322.j1Z07sUJs3qC_bWZzUbvnMXajc_7nWv5c7YbI6Q9IQk@z> (raw)
In-Reply-To: <20171015163937.GA2239@localhost.localdomain>

Hi Fredrik,

> Debian-based Black Rhino libc.so.6 declares "ELF 32-bit LSB MIPS-III
> version 1" but functions such as strcmp contain both 64-bit and multimedia
> instructions (presumably hand coded in assembly for the R5900):
> 
> 	6005ea90 <strcmp>:
> 	...
> 	6005eb50:	78880000 	lq	t0,0(a0)
> 	6005eb54:	710043a9 	pcpyud	t0,t0,zero
> 	6005eb58:	1000000c 	b	6005eb8c <strcmp+0xfc>
> 	6005eb5c:	71204ba9 	pcpyud	t1,t1,zero
> 	6005eb60:	dc880000 	ld	t0,0(a0)
> 	6005eb64:	24840008 	addiu	a0,a0,8
> 	6005eb68:	dca90000 	ld	t1,0(a1)
> 	6005eb6c:	710072a8 	pceqb	t6,t0,zero
> 	6005eb70:	71207aa8 	pceqb	t7,t1,zero
> 	6005eb74:	01cf7025 	or	t6,t6,t7
> 	6005eb78:	71097aa8 	pceqb	t7,t0,t1
> 	...
> 
> Hence corruption and register sign-extension failures. One can also note
> that according to the TX-79 manual, for a 32-bit kernel, several MIPS I
> instruction operations are undefined unless registers are sign-extended.

 That's a standard architectural requirement, not related to the kernel 
being 32-bit or 64-bit.  Overall all 32-bit ALU operations, except for SLL 
and SLLV, mandate that their input operands have been sign-extended from 
bit #31.

 I think you need to find another libc (or the whole userland), as I 
previously suggested.  I don't think we want to enable non-standard 
userland semantics, not as yet at least.  Having code supported like the 
snippet you have quoted above would I believe essentially boil down to 
Linux o64 ABI support, and anyway I think GAS should reject MMI 
instructions in the o32 assembly mode (which is something that was missed 
in R5900 support review).  I'll think on a suitable fix for GAS.

> It is unfortunate that these instructions seem untrappable by the R5900,
> instead silently causing strange behaviour and invalid results.

 Indeed, there's no way to trap with operations that break the 32-bit 
sign-extension requirement.  That's no different though from how the 
64-bit Linux kernel has operated for o32 software since forever; we don't 
clear the CP0.Status.UX bit for o32 tasks, although a discussion has been 
underway about changing it as it breaks indexed addressing (not a concern 
for the R5900, as a MIPS IV+ feature, e.g. LDXC1).  This has complications
though as we'd have to implement a TLB refill handler along with the XTLB 
refill handler, which is already taking space the former requires.

> Still left to explain is why the kernel stumbles on registers during
> initialisation, before user applications are invoked.

 Good luck!

  Maciej

  reply	other threads:[~2017-10-17 12:23 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-27 13:23 [PATCH] MIPS: Add basic R5900 support Fredrik Noring
2017-08-28 13:53 ` Ralf Baechle
2017-08-28 17:11   ` Maciej W. Rozycki
2017-08-29 17:33   ` Fredrik Noring
2017-08-29 17:24 ` Maciej W. Rozycki
2017-08-29 17:24   ` Maciej W. Rozycki
2017-08-30 13:23   ` Fredrik Noring
2017-08-31 15:11     ` Maciej W. Rozycki
2017-08-31 15:11       ` Maciej W. Rozycki
2017-09-02 10:28   ` Fredrik Noring
2017-09-09 10:13     ` Maciej W. Rozycki
2017-09-09 10:13       ` Maciej W. Rozycki
2017-09-11  5:21       ` Maciej W. Rozycki
2017-09-11  5:21         ` Maciej W. Rozycki
2017-09-12 17:59         ` Fredrik Noring
2017-09-15 11:12           ` Maciej W. Rozycki
2017-09-15 11:12             ` Maciej W. Rozycki
2017-09-15 13:19             ` Fredrik Noring
2017-09-15 18:28               ` Maciej W. Rozycki
2017-09-15 18:28                 ` Maciej W. Rozycki
2017-09-02 14:10   ` [PATCH v2] " Fredrik Noring
2017-09-11  5:18     ` Maciej W. Rozycki
2017-09-11  5:18       ` Maciej W. Rozycki
2017-09-11 15:17       ` Fredrik Noring
2017-09-14 13:50         ` Maciej W. Rozycki
2017-09-14 13:50           ` Maciej W. Rozycki
2017-09-16 13:34           ` Fredrik Noring
2017-09-18 17:05             ` Maciej W. Rozycki
2017-09-18 17:05               ` Maciej W. Rozycki
2017-09-18 19:24               ` Fredrik Noring
2017-09-19 12:44                 ` Maciej W. Rozycki
2017-09-19 12:44                   ` Maciej W. Rozycki
2017-09-20 14:54                   ` Fredrik Noring
2017-09-26 11:50                     ` Maciej W. Rozycki
2017-09-26 11:50                       ` Maciej W. Rozycki
2017-09-27 17:21                       ` Fredrik Noring
2017-09-28 12:13                         ` Maciej W. Rozycki
2017-09-28 12:13                           ` Maciej W. Rozycki
2017-09-30  6:56                           ` Fredrik Noring
2017-10-02  9:05                             ` Maciej W. Rozycki
2017-10-02  9:05                               ` Maciej W. Rozycki
2017-10-02 16:33                               ` Fredrik Noring
2017-10-29 17:20                               ` Fredrik Noring
2017-11-10 23:34                                 ` Maciej W. Rozycki
2017-11-10 23:34                                   ` Maciej W. Rozycki
2017-11-11 16:04                                   ` Fredrik Noring
2018-01-29 20:27                                     ` Fredrik Noring
2018-01-31 23:01                                       ` Maciej W. Rozycki
2018-02-11  7:29                                         ` [RFC] MIPS: R5900: Workaround for the short loop bug Fredrik Noring
2018-02-12  9:25                                           ` Maciej W. Rozycki
2018-02-12 15:22                                             ` Fredrik Noring
2018-02-11  7:46                                         ` [RFC] MIPS: R5900: Use SYNC.L for data cache and SYNC.P for instruction cache Fredrik Noring
2018-02-11  7:56                                         ` [RFC] MIPS: R5900: Workaround exception NOP execution bug (FLX05) Fredrik Noring
2018-02-12  9:28                                           ` Maciej W. Rozycki
2018-02-15 19:15                                             ` [RFC v2] " Fredrik Noring
2018-02-15 20:49                                               ` Maciej W. Rozycki
2018-02-17 11:16                                                 ` Fredrik Noring
2018-02-17 11:57                                                   ` Maciej W. Rozycki
2018-02-17 13:38                                                     ` Fredrik Noring
2018-02-17 15:03                                                       ` Maciej W. Rozycki
2018-02-17 20:04                                                         ` Fredrik Noring
2018-02-20 14:09                                                           ` Maciej W. Rozycki
2018-02-22 17:04                                                             ` Fredrik Noring
2018-02-18  8:47                                                 ` Fredrik Noring
2018-02-20 14:41                                                   ` Maciej W. Rozycki
2018-02-22 17:27                                                     ` Fredrik Noring
2018-02-11  8:01                                         ` [RFC] MIPS: R5900: Workaround for CACHE instruction near branch delay slot Fredrik Noring
2018-02-11 11:16                                           ` Aw: " "Jürgen Urban"
2018-02-11  8:09                                         ` [RFC] MIPS: R5900: The ERET instruction has issues with delay slot and CACHE Fredrik Noring
2018-02-11 11:07                                           ` Aw: " "Jürgen Urban"
2018-02-11  8:29                                         ` [RFC] MIPS: R5900: Use mandatory SYNC.L in exception handlers Fredrik Noring
2018-02-11 10:33                                           ` Aw: " "Jürgen Urban"
2018-02-12  9:22                                             ` Maciej W. Rozycki
2018-02-12  9:22                                               ` Maciej W. Rozycki
2018-02-18 10:30                                               ` Fredrik Noring
2018-02-17 14:43                                         ` [RFC] MIPS: R5900: Workaround for saving and restoring FPU registers Fredrik Noring
2018-02-17 15:18                                           ` Maciej W. Rozycki
2018-02-17 17:47                                             ` Fredrik Noring
2018-02-17 19:33                                               ` Maciej W. Rozycki
2018-02-18  9:26                                         ` [RFC] MIPS: R5900: Workaround where MSB must be 0 for the instruction cache Fredrik Noring
2018-02-18 11:08                                         ` [RFC] MIPS: R5900: Add mandatory SYNC.P to all M[FT]C0 instructions Fredrik Noring
2018-03-03 12:26                                         ` [RFC] MIPS: PS2: Interrupt request (IRQ) support Fredrik Noring
2018-03-03 13:09                                           ` Maciej W. Rozycki
2018-03-03 14:14                                             ` Fredrik Noring
2018-04-09 15:51                                             ` Fredrik Noring
2018-03-18 10:45                                           ` Fredrik Noring
2018-03-19 19:15                                             ` Thomas Gleixner
2018-06-18 18:52                                             ` [RFC v2] " Fredrik Noring
2017-10-30 17:55                               ` [PATCH v2] MIPS: Add basic R5900 support Fredrik Noring
2017-11-24 10:26                                 ` Maciej W. Rozycki
2017-11-24 10:26                                   ` Maciej W. Rozycki
2017-11-24 10:39                                   ` Maciej W. Rozycki
2017-11-24 10:39                                     ` Maciej W. Rozycki
2017-09-20 14:07               ` Fredrik Noring
2017-09-21 21:07                 ` Maciej W. Rozycki
2017-09-21 21:07                   ` Maciej W. Rozycki
2017-09-22 16:37                   ` Fredrik Noring
2017-09-22 16:37                     ` Fredrik Noring
2017-09-29 23:55                     ` Maciej W. Rozycki
2017-09-29 23:55                       ` Maciej W. Rozycki
2017-09-30 18:26                       ` Fredrik Noring
2017-10-02  9:11                         ` Maciej W. Rozycki
2017-10-02  9:11                           ` Maciej W. Rozycki
2017-10-03 19:49                           ` Fredrik Noring
2017-10-05 19:04                             ` Fredrik Noring
2017-10-06 20:28                           ` Fredrik Noring
2017-10-15 16:39                             ` Fredrik Noring
2017-10-17 12:23                               ` Maciej W. Rozycki [this message]
2017-10-17 12:23                                 ` Maciej W. Rozycki
2017-10-21 18:00                                 ` Fredrik Noring
2017-10-23 16:10                                   ` Maciej W. Rozycki
2017-10-23 16:10                                     ` Maciej W. Rozycki
2017-09-21 18:11               ` Paul Burton
2017-09-21 18:11                 ` Paul Burton
2017-09-21 19:48                 ` Maciej W. Rozycki
2017-09-21 19:48                   ` Maciej W. Rozycki
2017-10-29 18:42       ` Fredrik Noring

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