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From: "Maciej W. Rozycki" <macro@mips.com>
To: Fredrik Noring <noring@nocrew.org>, John Crispin <blogic@openwrt.org>
Cc: <linux-mips@linux-mips.org>
Subject: Re: [PATCH v2] MIPS: Add basic R5900 support
Date: Fri, 24 Nov 2017 10:26:14 +0000	[thread overview]
Message-ID: <alpine.DEB.2.00.1711240958370.3865@tp.orcam.me.uk> (raw)
In-Reply-To: <20171030175516.GA18586@localhost.localdomain>

Fredrik, John --

 John: can you please see the question below on the machine type you 
previously fiddled with?

> >  Given that the R5900 does not expand DSP support anyhow that sounds 
> > suspicious to me.
> 
> I've taken a closer look at the R5900 changes to the DSP kernel code now:
> 
> The R5900 has four three-operand instructions: MADD, MADDU, MULT and MULTU.
> In addition, it has ten instructions for pipeline 1: MULT1, MULTU1, DIV1,
> DIVU1, MADD1, MADDU1, MFHI1, MFLO1, MTHI1 and MTLO1. Those are the reason
> (parts of) the cpu_has_dsp infrastructure is used, as shown in the patch
> below. What are your thoughts on this?
> 
> The instructions are specific to the R5900, and notably incompatible with
> similar ones in the base MIPS32 architecture. They are also distinct from
> the (also R5900 specific) 128-bit multimedia instructions.

 They're still upper halves of the architectural HI/LO accumulator and 
also used by the 128-bit multiply and divide instructions.  I think they 
should be handled analogously to the 128-bit GPRs, rather than pretending 
they're a crippled version of the DSP ASE.

> By the way, "machine" is set to "Unknown" and "ASEs implemented" is empty
> in /proc/cpuinfo. What would be the proper values for the R5900?

 I have no idea what the machine type is supposed to be set to and why it 
is not omitted by default, given this piece:

		if (mips_get_machine_name())
			seq_printf(m, "machine\t\t\t: %s\n",
				mips_get_machine_name());

I think commit 9169a5d01114 ("MIPS: move mips_{set,get}_machine_name() to 
a more generic place") broke things.  Cc-ing the author for possible 
input.

 ASEs OTOH are specific to MIPS32 and MIPS64 architectures, as per 
respective architecture specification volumes (the MIPS16 ASE might be a 
prominent exception, having been defined as the first ASE ever mid way 
through between the MIPS IV and MIPS32/MIPS64 ISAs).  As the R5900 is not 
a MIPS32 or MIPS64 processor (and has no MIPS16 support) it does not have 
any ASEs implemented.  Vendor-specific architecture extensions do not 
count as ASEs.

  Maciej

WARNING: multiple messages have this Message-ID (diff)
From: "Maciej W. Rozycki" <macro@mips.com>
To: Fredrik Noring <noring@nocrew.org>, John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH v2] MIPS: Add basic R5900 support
Date: Fri, 24 Nov 2017 10:26:14 +0000	[thread overview]
Message-ID: <alpine.DEB.2.00.1711240958370.3865@tp.orcam.me.uk> (raw)
Message-ID: <20171124102614.Xut-Q5TpwrvJhXvV_Ub0bZ5E5HKtlrZsnOwoffRPO9U@z> (raw)
In-Reply-To: <20171030175516.GA18586@localhost.localdomain>

Fredrik, John --

 John: can you please see the question below on the machine type you 
previously fiddled with?

> >  Given that the R5900 does not expand DSP support anyhow that sounds 
> > suspicious to me.
> 
> I've taken a closer look at the R5900 changes to the DSP kernel code now:
> 
> The R5900 has four three-operand instructions: MADD, MADDU, MULT and MULTU.
> In addition, it has ten instructions for pipeline 1: MULT1, MULTU1, DIV1,
> DIVU1, MADD1, MADDU1, MFHI1, MFLO1, MTHI1 and MTLO1. Those are the reason
> (parts of) the cpu_has_dsp infrastructure is used, as shown in the patch
> below. What are your thoughts on this?
> 
> The instructions are specific to the R5900, and notably incompatible with
> similar ones in the base MIPS32 architecture. They are also distinct from
> the (also R5900 specific) 128-bit multimedia instructions.

 They're still upper halves of the architectural HI/LO accumulator and 
also used by the 128-bit multiply and divide instructions.  I think they 
should be handled analogously to the 128-bit GPRs, rather than pretending 
they're a crippled version of the DSP ASE.

> By the way, "machine" is set to "Unknown" and "ASEs implemented" is empty
> in /proc/cpuinfo. What would be the proper values for the R5900?

 I have no idea what the machine type is supposed to be set to and why it 
is not omitted by default, given this piece:

		if (mips_get_machine_name())
			seq_printf(m, "machine\t\t\t: %s\n",
				mips_get_machine_name());

I think commit 9169a5d01114 ("MIPS: move mips_{set,get}_machine_name() to 
a more generic place") broke things.  Cc-ing the author for possible 
input.

 ASEs OTOH are specific to MIPS32 and MIPS64 architectures, as per 
respective architecture specification volumes (the MIPS16 ASE might be a 
prominent exception, having been defined as the first ASE ever mid way 
through between the MIPS IV and MIPS32/MIPS64 ISAs).  As the R5900 is not 
a MIPS32 or MIPS64 processor (and has no MIPS16 support) it does not have 
any ASEs implemented.  Vendor-specific architecture extensions do not 
count as ASEs.

  Maciej

  reply	other threads:[~2017-11-24 10:26 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-27 13:23 [PATCH] MIPS: Add basic R5900 support Fredrik Noring
2017-08-28 13:53 ` Ralf Baechle
2017-08-28 17:11   ` Maciej W. Rozycki
2017-08-29 17:33   ` Fredrik Noring
2017-08-29 17:24 ` Maciej W. Rozycki
2017-08-29 17:24   ` Maciej W. Rozycki
2017-08-30 13:23   ` Fredrik Noring
2017-08-31 15:11     ` Maciej W. Rozycki
2017-08-31 15:11       ` Maciej W. Rozycki
2017-09-02 10:28   ` Fredrik Noring
2017-09-09 10:13     ` Maciej W. Rozycki
2017-09-09 10:13       ` Maciej W. Rozycki
2017-09-11  5:21       ` Maciej W. Rozycki
2017-09-11  5:21         ` Maciej W. Rozycki
2017-09-12 17:59         ` Fredrik Noring
2017-09-15 11:12           ` Maciej W. Rozycki
2017-09-15 11:12             ` Maciej W. Rozycki
2017-09-15 13:19             ` Fredrik Noring
2017-09-15 18:28               ` Maciej W. Rozycki
2017-09-15 18:28                 ` Maciej W. Rozycki
2017-09-02 14:10   ` [PATCH v2] " Fredrik Noring
2017-09-11  5:18     ` Maciej W. Rozycki
2017-09-11  5:18       ` Maciej W. Rozycki
2017-09-11 15:17       ` Fredrik Noring
2017-09-14 13:50         ` Maciej W. Rozycki
2017-09-14 13:50           ` Maciej W. Rozycki
2017-09-16 13:34           ` Fredrik Noring
2017-09-18 17:05             ` Maciej W. Rozycki
2017-09-18 17:05               ` Maciej W. Rozycki
2017-09-18 19:24               ` Fredrik Noring
2017-09-19 12:44                 ` Maciej W. Rozycki
2017-09-19 12:44                   ` Maciej W. Rozycki
2017-09-20 14:54                   ` Fredrik Noring
2017-09-26 11:50                     ` Maciej W. Rozycki
2017-09-26 11:50                       ` Maciej W. Rozycki
2017-09-27 17:21                       ` Fredrik Noring
2017-09-28 12:13                         ` Maciej W. Rozycki
2017-09-28 12:13                           ` Maciej W. Rozycki
2017-09-30  6:56                           ` Fredrik Noring
2017-10-02  9:05                             ` Maciej W. Rozycki
2017-10-02  9:05                               ` Maciej W. Rozycki
2017-10-02 16:33                               ` Fredrik Noring
2017-10-29 17:20                               ` Fredrik Noring
2017-11-10 23:34                                 ` Maciej W. Rozycki
2017-11-10 23:34                                   ` Maciej W. Rozycki
2017-11-11 16:04                                   ` Fredrik Noring
2018-01-29 20:27                                     ` Fredrik Noring
2018-01-31 23:01                                       ` Maciej W. Rozycki
2018-02-11  7:29                                         ` [RFC] MIPS: R5900: Workaround for the short loop bug Fredrik Noring
2018-02-12  9:25                                           ` Maciej W. Rozycki
2018-02-12 15:22                                             ` Fredrik Noring
2018-02-11  7:46                                         ` [RFC] MIPS: R5900: Use SYNC.L for data cache and SYNC.P for instruction cache Fredrik Noring
2018-02-11  7:56                                         ` [RFC] MIPS: R5900: Workaround exception NOP execution bug (FLX05) Fredrik Noring
2018-02-12  9:28                                           ` Maciej W. Rozycki
2018-02-15 19:15                                             ` [RFC v2] " Fredrik Noring
2018-02-15 20:49                                               ` Maciej W. Rozycki
2018-02-17 11:16                                                 ` Fredrik Noring
2018-02-17 11:57                                                   ` Maciej W. Rozycki
2018-02-17 13:38                                                     ` Fredrik Noring
2018-02-17 15:03                                                       ` Maciej W. Rozycki
2018-02-17 20:04                                                         ` Fredrik Noring
2018-02-20 14:09                                                           ` Maciej W. Rozycki
2018-02-22 17:04                                                             ` Fredrik Noring
2018-02-18  8:47                                                 ` Fredrik Noring
2018-02-20 14:41                                                   ` Maciej W. Rozycki
2018-02-22 17:27                                                     ` Fredrik Noring
2018-02-11  8:01                                         ` [RFC] MIPS: R5900: Workaround for CACHE instruction near branch delay slot Fredrik Noring
2018-02-11 11:16                                           ` Aw: " "Jürgen Urban"
2018-02-11  8:09                                         ` [RFC] MIPS: R5900: The ERET instruction has issues with delay slot and CACHE Fredrik Noring
2018-02-11 11:07                                           ` Aw: " "Jürgen Urban"
2018-02-11  8:29                                         ` [RFC] MIPS: R5900: Use mandatory SYNC.L in exception handlers Fredrik Noring
2018-02-11 10:33                                           ` Aw: " "Jürgen Urban"
2018-02-12  9:22                                             ` Maciej W. Rozycki
2018-02-12  9:22                                               ` Maciej W. Rozycki
2018-02-18 10:30                                               ` Fredrik Noring
2018-02-17 14:43                                         ` [RFC] MIPS: R5900: Workaround for saving and restoring FPU registers Fredrik Noring
2018-02-17 15:18                                           ` Maciej W. Rozycki
2018-02-17 17:47                                             ` Fredrik Noring
2018-02-17 19:33                                               ` Maciej W. Rozycki
2018-02-18  9:26                                         ` [RFC] MIPS: R5900: Workaround where MSB must be 0 for the instruction cache Fredrik Noring
2018-02-18 11:08                                         ` [RFC] MIPS: R5900: Add mandatory SYNC.P to all M[FT]C0 instructions Fredrik Noring
2018-03-03 12:26                                         ` [RFC] MIPS: PS2: Interrupt request (IRQ) support Fredrik Noring
2018-03-03 13:09                                           ` Maciej W. Rozycki
2018-03-03 14:14                                             ` Fredrik Noring
2018-04-09 15:51                                             ` Fredrik Noring
2018-03-18 10:45                                           ` Fredrik Noring
2018-03-19 19:15                                             ` Thomas Gleixner
2018-06-18 18:52                                             ` [RFC v2] " Fredrik Noring
2017-10-30 17:55                               ` [PATCH v2] MIPS: Add basic R5900 support Fredrik Noring
2017-11-24 10:26                                 ` Maciej W. Rozycki [this message]
2017-11-24 10:26                                   ` Maciej W. Rozycki
2017-11-24 10:39                                   ` Maciej W. Rozycki
2017-11-24 10:39                                     ` Maciej W. Rozycki
2017-09-20 14:07               ` Fredrik Noring
2017-09-21 21:07                 ` Maciej W. Rozycki
2017-09-21 21:07                   ` Maciej W. Rozycki
2017-09-22 16:37                   ` Fredrik Noring
2017-09-22 16:37                     ` Fredrik Noring
2017-09-29 23:55                     ` Maciej W. Rozycki
2017-09-29 23:55                       ` Maciej W. Rozycki
2017-09-30 18:26                       ` Fredrik Noring
2017-10-02  9:11                         ` Maciej W. Rozycki
2017-10-02  9:11                           ` Maciej W. Rozycki
2017-10-03 19:49                           ` Fredrik Noring
2017-10-05 19:04                             ` Fredrik Noring
2017-10-06 20:28                           ` Fredrik Noring
2017-10-15 16:39                             ` Fredrik Noring
2017-10-17 12:23                               ` Maciej W. Rozycki
2017-10-17 12:23                                 ` Maciej W. Rozycki
2017-10-21 18:00                                 ` Fredrik Noring
2017-10-23 16:10                                   ` Maciej W. Rozycki
2017-10-23 16:10                                     ` Maciej W. Rozycki
2017-09-21 18:11               ` Paul Burton
2017-09-21 18:11                 ` Paul Burton
2017-09-21 19:48                 ` Maciej W. Rozycki
2017-09-21 19:48                   ` Maciej W. Rozycki
2017-10-29 18:42       ` Fredrik Noring

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