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From: <Conor.Dooley@microchip.com>
To: <geert@linux-m68k.org>
Cc: <prabhakar.csengg@gmail.com>,
	<prabhakar.mahadev-lad.rj@bp.renesas.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<anup@brainfault.org>, <linux-renesas-soc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <biju.das.jz@bp.renesas.com>,
	<samuel@sholland.org>
Subject: Re: [PATCH v2 4/8] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option
Date: Fri, 19 Aug 2022 07:59:45 +0000	[thread overview]
Message-ID: <da391246-5b21-f486-c5cd-c4689711d7cb@microchip.com> (raw)
In-Reply-To: <CAMuHMdUPzukO8Cqk86NbPU-ytidr--Qumg6KzVcUqE4GWmumaQ@mail.gmail.com>

On 19/08/2022 08:35, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi Conor,
> 
> On Thu, Aug 18, 2022 at 8:54 PM <Conor.Dooley@microchip.com> wrote:
>> On 18/08/2022 19:19, Lad, Prabhakar wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>> On Thu, Aug 18, 2022 at 4:16 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>>>> On Mon, Aug 15, 2022 at 5:16 PM Lad Prabhakar
>>>> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
>>>>> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
>>>>> (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
>>>>> of the Renesas drivers depend on this config option.
>>>>>
>>>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>>>
>>>> Thanks for your patch!
>>>>
>>>> The technical part LGTM, so
>>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>>>
>>>>> --- a/arch/riscv/Kconfig.socs
>>>>> +++ b/arch/riscv/Kconfig.socs
>>>>> @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
>>>>>
>>>>>   endif # SOC_CANAAN
>>>>>
>>>>> +config ARCH_RENESAS
>>>>
>>>> We definitely want ARCH_RENESAS, as it serves as a gatekeeper for
>>>> Kconfig options for IP cores found on Renesas ARM and RISC-V SoCs.
>>>>
>>> Agreed, or else we will end up touching too many Kconfig files.
>>>
>>>>> +       bool
>>>>> +       select GPIOLIB
>>>>> +       select PINCTRL
>>>>> +       select SOC_BUS
>>>>> +
>>>>> +config SOC_RENESAS_RZFIVE
>>>>
>>>> Do we need this symbol? You could as well make ARCH_RENESAS above
>>>> visible, and defer the actual SoC selection to ARCH_R9A07G043 in
>>>> drivers/soc/renesas/Kconfig[1].
>>>>
>>> I think we could drop it and just defer the actual SoC selection to
>>> ARCH_R9A07G043 as you said.
>>>
>>>> I don't know what is the policy on RISC-V. ARM64 has a "single-symbol
>>>> in arch/arm64/Kconfig.platforms"-policy, so we handle SoC selection
>>>> in drivers/soc/renesas/Kconfig, and that is fine, as it avoids merge
>>>> conflicts.
>>>>
>>> Agreed.
>>>
>>> @Conor - Does the above sound OK?
>>
>> It's not my decision to be honest - Palmer's the boss :)
>>
>> I would rather have a single symbol & a single approach so that we are
>> all doing the same thing here. As of now, we have all basically done
>> different things for each SOC that was added - there's SOC_SIFIVE &
>> SOC_MICROCHIP_POLARFIRE which are obviously not doing the same thing
>> for starters & then how the symbol is used: selects vs depends + default
>> all varies between the symbols.
>>
>> I tried to make some changes to the PolarFire one a few months ago to
>> add some peripherals but Palmer was not too keen on the changes. We had
>> a conversation on IRC, the upshot of which was deciding to talk about it
>> at Plumbers (which is in 3 weeks) as none of them follow his original
>> intent:
>> <quote>
>> the original idea behind Kconfig.socs was to provide an easy place for
>> users to say "I want all the support for SOC X", and then just have one
>> Kconfig to turn that on
>> <\quote>
> 
> For whatever definition of "all"? Does this include e.g. all
> multi-media stuff?

Yeah.. gets unmaintainable fast!

> 
> For Renesas ARM SoCs, we make sure to select the critical core parts,
> cfr. the selects above, and in drivers/soc/renesas/Kconfig.
> These selects do not include optional drivers, including the serial
> port (cfr. your confusion about adding CONFIG_SERIAL_SH_SCI=y
> to the defconfig).

tbf, the reason it was done was fairly obvious, but since it wasn't
mentioned just wanted to double check it wasn't an accident ;)

I like the approach you suggested approach a lot tbh, makes a lot
of sense & doesn't involve having to merge the symbol for a core
driver through arch/riscv if something changes.

> All the rest is handled by the defconfigs (shmobile_defconfig on
> arm32, single defconfig on arm64, and out-of-tree renesas_defconfig
> in my renesas-devel tree).
> 
>> In theory, that's lovely but not really maintainable & none of us were
>> doing it anyway. Hopefully we can come up with a plan at Plumbers - so
>> feel free to chime in (or maybe it gets sorted out here and I don't
>> have to do any public speaking 😍).
> 
> Ah, there is my good reason for registering for LPC ;-)
> 
> Gr{oetje,eeting}s,
> 
>                          Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds


WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <geert@linux-m68k.org>
Cc: <prabhakar.csengg@gmail.com>,
	<prabhakar.mahadev-lad.rj@bp.renesas.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<anup@brainfault.org>, <linux-renesas-soc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <biju.das.jz@bp.renesas.com>,
	<samuel@sholland.org>
Subject: Re: [PATCH v2 4/8] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option
Date: Fri, 19 Aug 2022 07:59:45 +0000	[thread overview]
Message-ID: <da391246-5b21-f486-c5cd-c4689711d7cb@microchip.com> (raw)
In-Reply-To: <CAMuHMdUPzukO8Cqk86NbPU-ytidr--Qumg6KzVcUqE4GWmumaQ@mail.gmail.com>

On 19/08/2022 08:35, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi Conor,
> 
> On Thu, Aug 18, 2022 at 8:54 PM <Conor.Dooley@microchip.com> wrote:
>> On 18/08/2022 19:19, Lad, Prabhakar wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>> On Thu, Aug 18, 2022 at 4:16 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>>>> On Mon, Aug 15, 2022 at 5:16 PM Lad Prabhakar
>>>> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
>>>>> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
>>>>> (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
>>>>> of the Renesas drivers depend on this config option.
>>>>>
>>>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>>>
>>>> Thanks for your patch!
>>>>
>>>> The technical part LGTM, so
>>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>>>
>>>>> --- a/arch/riscv/Kconfig.socs
>>>>> +++ b/arch/riscv/Kconfig.socs
>>>>> @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
>>>>>
>>>>>   endif # SOC_CANAAN
>>>>>
>>>>> +config ARCH_RENESAS
>>>>
>>>> We definitely want ARCH_RENESAS, as it serves as a gatekeeper for
>>>> Kconfig options for IP cores found on Renesas ARM and RISC-V SoCs.
>>>>
>>> Agreed, or else we will end up touching too many Kconfig files.
>>>
>>>>> +       bool
>>>>> +       select GPIOLIB
>>>>> +       select PINCTRL
>>>>> +       select SOC_BUS
>>>>> +
>>>>> +config SOC_RENESAS_RZFIVE
>>>>
>>>> Do we need this symbol? You could as well make ARCH_RENESAS above
>>>> visible, and defer the actual SoC selection to ARCH_R9A07G043 in
>>>> drivers/soc/renesas/Kconfig[1].
>>>>
>>> I think we could drop it and just defer the actual SoC selection to
>>> ARCH_R9A07G043 as you said.
>>>
>>>> I don't know what is the policy on RISC-V. ARM64 has a "single-symbol
>>>> in arch/arm64/Kconfig.platforms"-policy, so we handle SoC selection
>>>> in drivers/soc/renesas/Kconfig, and that is fine, as it avoids merge
>>>> conflicts.
>>>>
>>> Agreed.
>>>
>>> @Conor - Does the above sound OK?
>>
>> It's not my decision to be honest - Palmer's the boss :)
>>
>> I would rather have a single symbol & a single approach so that we are
>> all doing the same thing here. As of now, we have all basically done
>> different things for each SOC that was added - there's SOC_SIFIVE &
>> SOC_MICROCHIP_POLARFIRE which are obviously not doing the same thing
>> for starters & then how the symbol is used: selects vs depends + default
>> all varies between the symbols.
>>
>> I tried to make some changes to the PolarFire one a few months ago to
>> add some peripherals but Palmer was not too keen on the changes. We had
>> a conversation on IRC, the upshot of which was deciding to talk about it
>> at Plumbers (which is in 3 weeks) as none of them follow his original
>> intent:
>> <quote>
>> the original idea behind Kconfig.socs was to provide an easy place for
>> users to say "I want all the support for SOC X", and then just have one
>> Kconfig to turn that on
>> <\quote>
> 
> For whatever definition of "all"? Does this include e.g. all
> multi-media stuff?

Yeah.. gets unmaintainable fast!

> 
> For Renesas ARM SoCs, we make sure to select the critical core parts,
> cfr. the selects above, and in drivers/soc/renesas/Kconfig.
> These selects do not include optional drivers, including the serial
> port (cfr. your confusion about adding CONFIG_SERIAL_SH_SCI=y
> to the defconfig).

tbf, the reason it was done was fairly obvious, but since it wasn't
mentioned just wanted to double check it wasn't an accident ;)

I like the approach you suggested approach a lot tbh, makes a lot
of sense & doesn't involve having to merge the symbol for a core
driver through arch/riscv if something changes.

> All the rest is handled by the defconfigs (shmobile_defconfig on
> arm32, single defconfig on arm64, and out-of-tree renesas_defconfig
> in my renesas-devel tree).
> 
>> In theory, that's lovely but not really maintainable & none of us were
>> doing it anyway. Hopefully we can come up with a plan at Plumbers - so
>> feel free to chime in (or maybe it gets sorted out here and I don't
>> have to do any public speaking 😍).
> 
> Ah, there is my good reason for registering for LPC ;-)
> 
> Gr{oetje,eeting}s,
> 
>                          Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2022-08-19  8:00 UTC|newest]

Thread overview: 92+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-15 15:14 [PATCH v2 0/8] Add support for Renesas RZ/Five SoC Lad Prabhakar
2022-08-15 15:14 ` Lad Prabhakar
2022-08-15 15:14 ` [PATCH v2 1/8] dt-bindings: riscv: Sort the CPU core list alphabetically Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-15 19:11   ` Conor.Dooley
2022-08-15 19:11     ` Conor.Dooley
2022-08-18 13:00   ` Geert Uytterhoeven
2022-08-18 13:00     ` Geert Uytterhoeven
2022-08-18 13:00   ` Geert Uytterhoeven
2022-08-18 13:00     ` Geert Uytterhoeven
2022-08-15 15:14 ` [PATCH v2 2/8] dt-bindings: riscv: Add Andes AX45MP core to the list Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-18 14:55   ` Geert Uytterhoeven
2022-08-18 14:55     ` Geert Uytterhoeven
2022-08-15 15:14 ` [PATCH v2 3/8] dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-15 19:14   ` Conor.Dooley
2022-08-15 19:14     ` Conor.Dooley
2022-08-15 19:40     ` Lad, Prabhakar
2022-08-15 19:40       ` Lad, Prabhakar
2022-08-15 19:42       ` Conor.Dooley
2022-08-15 19:42         ` Conor.Dooley
2022-08-16  7:52   ` Krzysztof Kozlowski
2022-08-16  7:52     ` Krzysztof Kozlowski
2022-08-18 15:00   ` Geert Uytterhoeven
2022-08-18 15:00     ` Geert Uytterhoeven
2022-08-18 18:14     ` Lad, Prabhakar
2022-08-18 18:14       ` Lad, Prabhakar
2022-08-15 15:14 ` [PATCH v2 4/8] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-15 19:10   ` Conor.Dooley
2022-08-15 19:10     ` Conor.Dooley
2022-08-15 19:57     ` Lad, Prabhakar
2022-08-15 19:57       ` Lad, Prabhakar
2022-08-15 20:05       ` Conor.Dooley
2022-08-15 20:05         ` Conor.Dooley
2022-08-15 21:44         ` Lad, Prabhakar
2022-08-15 21:44           ` Lad, Prabhakar
2022-08-18 15:16   ` Geert Uytterhoeven
2022-08-18 15:16     ` Geert Uytterhoeven
2022-08-18 18:19     ` Lad, Prabhakar
2022-08-18 18:19       ` Lad, Prabhakar
2022-08-18 18:53       ` Conor.Dooley
2022-08-18 18:53         ` Conor.Dooley
2022-08-19  7:35         ` Geert Uytterhoeven
2022-08-19  7:35           ` Geert Uytterhoeven
2022-08-19  7:59           ` Conor.Dooley [this message]
2022-08-19  7:59             ` Conor.Dooley
2022-08-15 15:14 ` [PATCH v2 5/8] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-19  8:04   ` Geert Uytterhoeven
2022-08-19  8:04     ` Geert Uytterhoeven
2022-08-19 11:42     ` Lad, Prabhakar
2022-08-19 11:42       ` Lad, Prabhakar
2022-08-19 18:40   ` Conor.Dooley
2022-08-19 18:40     ` Conor.Dooley
2022-08-20  8:45     ` Geert Uytterhoeven
2022-08-20  8:45       ` Geert Uytterhoeven
2022-08-20  8:49       ` Conor.Dooley
2022-08-20  8:49         ` Conor.Dooley
2022-08-20 12:07         ` Geert Uytterhoeven
2022-08-20 12:07           ` Geert Uytterhoeven
2022-08-15 15:14 ` [PATCH v2 6/8] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-15 19:00   ` Conor.Dooley
2022-08-15 19:00     ` Conor.Dooley
2022-08-15 20:16     ` Lad, Prabhakar
2022-08-15 20:16       ` Lad, Prabhakar
2022-08-19  8:25       ` Geert Uytterhoeven
2022-08-19  8:25         ` Geert Uytterhoeven
2022-08-19 11:39         ` Lad, Prabhakar
2022-08-19 11:39           ` Lad, Prabhakar
2022-08-19 18:15           ` Conor.Dooley
2022-08-19 18:15             ` Conor.Dooley
2022-08-19  8:11   ` Geert Uytterhoeven
2022-08-19  8:11     ` Geert Uytterhoeven
2022-08-15 15:14 ` [PATCH v2 7/8] MAINTAINERS: Add entry for Renesas RISC-V architecture Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-19  8:42   ` Geert Uytterhoeven
2022-08-19  8:42     ` Geert Uytterhoeven
2022-08-19  9:08     ` Lad, Prabhakar
2022-08-19  9:08       ` Lad, Prabhakar
2022-08-15 15:14 ` [PATCH v2 8/8] RISC-V: configs: defconfig: Enable Renesas RZ/Five SoC Lad Prabhakar
2022-08-15 15:14   ` Lad Prabhakar
2022-08-15 18:52   ` Conor.Dooley
2022-08-15 18:52     ` Conor.Dooley
2022-08-15 19:44     ` Lad, Prabhakar
2022-08-15 19:44       ` Lad, Prabhakar
2022-08-15 19:49       ` Conor.Dooley
2022-08-15 19:49         ` Conor.Dooley
2022-08-19  8:46   ` Geert Uytterhoeven
2022-08-19  8:46     ` Geert Uytterhoeven

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