From: Yu-cheng Yu <yu-cheng.yu@intel.com> To: x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>, Andy Lutomirski <luto@amacapital.net>, Balbir Singh <bsingharora@gmail.com>, Cyrill Gorcunov <gorcunov@gmail.com>, Dave Hansen <dave.hansen@linux.intel.com>, Eugene Syromiatnikov <esyr@redhat.com>, Florian Weimer <fweimer@redhat.com>, "H.J. Lu" <hjl.tools@gmail.com>, Jann Horn <jannh@google.com>, Jonathan Corbet <corbet@lwn.net>, Kees Cook <keescook@chromium.org>, Mike Kravetz <mike.kravetz@oracle.com>, Nadav Amit <nadav.amit@gmail.com>, Oleg Nesterov <oleg@redhat.com>, Pa Cc: Yu-cheng Yu <yu-cheng.yu@intel.com> Subject: [PATCH v5 01/27] x86/cpufeatures: Add CPUIDs for Control Flow Enforcement Technology (CET) Date: Thu, 11 Oct 2018 08:14:57 -0700 [thread overview] Message-ID: <20181011151523.27101-2-yu-cheng.yu@intel.com> (raw) In-Reply-To: <20181011151523.27101-1-yu-cheng.yu@intel.com> Add CPUIDs for Control Flow Enforcement Technology (CET). CPUID.(EAX=7,ECX=0):ECX[bit 7] Shadow stack CPUID.(EAX=7,ECX=0):EDX[bit 20] Indirect branch tracking Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> --- arch/x86/include/asm/cpufeatures.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 89a048c2faec..142b15da06fd 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -321,6 +321,7 @@ #define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys for Userspace */ #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */ #define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */ +#define X86_FEATURE_SHSTK (16*32+ 7) /* Shadow Stack */ #define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New Instructions */ #define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */ #define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */ @@ -341,6 +342,7 @@ #define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */ #define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */ #define X86_FEATURE_PCONFIG (18*32+18) /* Intel PCONFIG */ +#define X86_FEATURE_IBT (18*32+20) /* Indirect Branch Tracking */ #define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */ #define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */ #define X86_FEATURE_FLUSH_L1D (18*32+28) /* Flush L1D cache */ -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Yu-cheng Yu <yu-cheng.yu@intel.com> To: x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>, Andy Lutomirski <luto@amacapital.net>, Balbir Singh <bsingharora@gmail.com>, Cyrill Gorcunov <gorcunov@gmail.com>, Dave Hansen <dave.hansen@linux.intel.com>, Eugene Syromiatnikov <esyr@redhat.com>, Florian Weimer <fweimer@redhat.com>, "H.J. Lu" <hjl.tools@gmail.com>, Jann Horn <jannh@google.com>, Jonathan Corbet <corbet@lwn.net>, Kees Cook <keescook@chromium.org>, Mike Kravetz <mike.kravetz@oracle.com>, Nadav Amit <nadav.amit@gmail.com>, Oleg Nesterov <oleg@redhat.com>, Pavel Machek <pavel@ucw.cz>, Peter Zijlstra <peterz@infradead.org>, Randy Dunlap <rdunlap@infradead.org>, "Ravi V. Shankar" <ravi.v.shankar@intel.com>, Vedvyas Shanbhogue <vedvyas.shanbhogue@intel.com> Cc: Yu-cheng Yu <yu-cheng.yu@intel.com> Subject: [PATCH v5 01/27] x86/cpufeatures: Add CPUIDs for Control Flow Enforcement Technology (CET) Date: Thu, 11 Oct 2018 08:14:57 -0700 [thread overview] Message-ID: <20181011151523.27101-2-yu-cheng.yu@intel.com> (raw) Message-ID: <20181011151457.77jdx6wBZfpXDkxuiGRx8dXo_O59eQ5tbP2MZLhxOvw@z> (raw) In-Reply-To: <20181011151523.27101-1-yu-cheng.yu@intel.com> Add CPUIDs for Control Flow Enforcement Technology (CET). CPUID.(EAX=7,ECX=0):ECX[bit 7] Shadow stack CPUID.(EAX=7,ECX=0):EDX[bit 20] Indirect branch tracking Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> --- arch/x86/include/asm/cpufeatures.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 89a048c2faec..142b15da06fd 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -321,6 +321,7 @@ #define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys for Userspace */ #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */ #define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */ +#define X86_FEATURE_SHSTK (16*32+ 7) /* Shadow Stack */ #define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New Instructions */ #define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */ #define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */ @@ -341,6 +342,7 @@ #define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */ #define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */ #define X86_FEATURE_PCONFIG (18*32+18) /* Intel PCONFIG */ +#define X86_FEATURE_IBT (18*32+20) /* Indirect Branch Tracking */ #define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */ #define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */ #define X86_FEATURE_FLUSH_L1D (18*32+28) /* Flush L1D cache */ -- 2.17.1
next prev parent reply other threads:[~2018-10-11 15:14 UTC|newest] Thread overview: 160+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-11 15:14 [PATCH v5 00/27] Control Flow Enforcement: Shadow Stack Yu-cheng Yu 2018-10-11 15:14 ` Yu-cheng Yu 2018-10-11 15:14 ` Yu-cheng Yu [this message] 2018-10-11 15:14 ` [PATCH v5 01/27] x86/cpufeatures: Add CPUIDs for Control Flow Enforcement Technology (CET) Yu-cheng Yu 2018-10-11 16:43 ` Borislav Petkov 2018-10-11 16:43 ` Borislav Petkov 2018-10-11 16:45 ` Yu-cheng Yu 2018-10-11 16:45 ` Yu-cheng Yu 2018-10-11 15:14 ` [PATCH v5 02/27] x86/fpu/xstate: Change names to separate XSAVES system and user states Yu-cheng Yu 2018-10-11 15:14 ` Yu-cheng Yu 2018-10-15 17:03 ` Borislav Petkov 2018-10-15 17:03 ` Borislav Petkov 2018-10-11 15:14 ` [PATCH v5 03/27] x86/fpu/xstate: Introduce XSAVES system states Yu-cheng Yu 2018-10-11 15:14 ` Yu-cheng Yu 2018-10-17 10:41 ` Borislav Petkov 2018-10-17 10:41 ` Borislav Petkov 2018-10-17 22:39 ` Randy Dunlap 2018-10-17 22:39 ` Randy Dunlap 2018-10-17 22:58 ` Borislav Petkov 2018-10-17 22:58 ` Borislav Petkov 2018-10-17 23:17 ` Randy Dunlap 2018-10-17 23:17 ` Randy Dunlap 2018-10-18 9:26 ` Borislav Petkov 2018-10-18 9:26 ` Borislav Petkov 2018-10-18 9:31 ` Pavel Machek 2018-10-18 9:31 ` Pavel Machek 2018-10-18 12:10 ` Borislav Petkov 2018-10-18 12:10 ` Borislav Petkov 2018-10-18 18:33 ` Randy Dunlap 2018-10-18 18:33 ` Randy Dunlap 2018-10-18 9:24 ` Pavel Machek 2018-10-18 9:24 ` Pavel Machek 2018-10-11 15:15 ` [PATCH v5 04/27] x86/fpu/xstate: Add XSAVES system states for shadow stack Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-11-08 18:40 ` Borislav Petkov 2018-11-08 18:40 ` Borislav Petkov 2018-11-08 20:40 ` Yu-cheng Yu 2018-11-08 20:40 ` Yu-cheng Yu 2018-11-08 23:52 ` Borislav Petkov 2018-11-08 23:52 ` Borislav Petkov 2018-11-11 11:31 ` Pavel Machek 2018-11-11 11:31 ` Pavel Machek 2018-11-11 11:31 ` Pavel Machek 2018-11-11 11:31 ` Pavel Machek 2018-11-11 14:59 ` Andy Lutomirski 2018-11-11 14:59 ` Andy Lutomirski 2018-11-11 19:02 ` Pavel Machek 2018-11-11 19:02 ` Pavel Machek 2018-11-08 20:46 ` Andy Lutomirski 2018-11-08 20:46 ` Andy Lutomirski 2018-11-08 21:01 ` Yu-cheng Yu 2018-11-08 21:01 ` Yu-cheng Yu 2018-11-08 21:22 ` Andy Lutomirski 2018-11-08 21:22 ` Andy Lutomirski 2018-11-08 21:31 ` Cyrill Gorcunov 2018-11-08 21:31 ` Cyrill Gorcunov 2018-11-08 22:01 ` Andy Lutomirski 2018-11-08 22:01 ` Andy Lutomirski 2018-11-08 22:18 ` Cyrill Gorcunov 2018-11-08 22:18 ` Cyrill Gorcunov 2018-11-08 21:48 ` Dave Hansen 2018-11-08 21:48 ` Dave Hansen 2018-11-08 22:00 ` Matthew Wilcox 2018-11-08 22:00 ` Matthew Wilcox 2018-11-08 23:35 ` Dave Hansen 2018-11-08 23:35 ` Dave Hansen 2018-11-09 0:32 ` Matthew Wilcox 2018-11-09 0:32 ` Matthew Wilcox 2018-11-09 0:45 ` Andy Lutomirski 2018-11-09 0:45 ` Andy Lutomirski 2018-11-09 17:13 ` Dave Hansen 2018-11-09 17:13 ` Dave Hansen 2018-11-09 17:17 ` Matthew Wilcox 2018-11-09 17:17 ` Matthew Wilcox 2018-11-09 17:20 ` Dave Hansen 2018-11-09 17:20 ` Dave Hansen 2018-11-09 17:28 ` Dave Hansen 2018-11-09 17:28 ` Dave Hansen 2018-11-11 11:31 ` Pavel Machek 2018-11-11 11:31 ` Pavel Machek 2018-10-11 15:15 ` [PATCH v5 05/27] Documentation/x86: Add CET description Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-11-13 18:43 ` Borislav Petkov 2018-11-13 18:43 ` Borislav Petkov 2018-11-13 21:02 ` Yu-cheng Yu 2018-11-13 21:02 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 06/27] x86/cet: Control protection exception handler Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-11-14 18:44 ` Borislav Petkov 2018-11-14 18:44 ` Borislav Petkov 2018-11-14 20:19 ` Yu-cheng Yu 2018-11-14 20:19 ` Yu-cheng Yu 2018-11-14 20:28 ` Borislav Petkov 2018-11-14 20:28 ` Borislav Petkov 2018-10-11 15:15 ` [PATCH v5 07/27] mm/mmap: Create a guard area between VMAs Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 20:39 ` Jann Horn 2018-10-11 20:39 ` Jann Horn 2018-10-11 20:49 ` Yu-cheng Yu 2018-10-11 20:49 ` Yu-cheng Yu 2018-10-11 20:55 ` Andy Lutomirski 2018-10-11 20:55 ` Andy Lutomirski 2018-10-12 21:49 ` Yu-cheng Yu 2018-10-12 21:49 ` Yu-cheng Yu 2018-10-12 13:17 ` Matthew Wilcox 2018-10-12 13:17 ` Matthew Wilcox 2018-10-11 20:49 ` Dave Hansen 2018-10-11 20:49 ` Dave Hansen 2018-10-12 10:24 ` Florian Weimer 2018-10-12 10:24 ` Florian Weimer 2018-10-11 15:15 ` [PATCH v5 08/27] x86/cet/shstk: Add Kconfig option for user-mode shadow stack Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 09/27] mm: Introduce VM_SHSTK for shadow stack memory Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 10/27] mm/mmap: Prevent Shadow Stack VMA merges Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 11/27] x86/mm: Change _PAGE_DIRTY to _PAGE_DIRTY_HW Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 12/27] x86/mm: Introduce _PAGE_DIRTY_SW Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 13/27] drm/i915/gvt: Update _PAGE_DIRTY to _PAGE_DIRTY_BITS Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 14/27] x86/mm: Modify ptep_set_wrprotect and pmdp_set_wrprotect for _PAGE_DIRTY_SW Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 15/27] x86/mm: Shadow stack page fault error checking Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 16/27] mm: Handle shadow stack page fault Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 17/27] mm: Handle THP/HugeTLB " Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 18/27] mm: Update can_follow_write_pte/pmd for shadow stack Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 19/27] mm: Introduce do_mmap_locked() Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 20/27] x86/cet/shstk: User-mode shadow stack support Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 21/27] x86/cet/shstk: Introduce WRUSS instruction Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-11-06 18:43 ` Dave Hansen 2018-11-06 18:43 ` Dave Hansen 2018-11-06 18:55 ` Andy Lutomirski 2018-11-06 18:55 ` Andy Lutomirski 2018-11-06 20:21 ` Yu-cheng Yu 2018-11-06 20:21 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 22/27] x86/cet/shstk: Signal handling for shadow stack Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 23/27] x86/cet/shstk: ELF header parsing of Shadow Stack Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 24/27] x86/cet/shstk: Handle thread shadow stack Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 25/27] mm/mmap: Add Shadow stack pages to memory accounting Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 26/27] x86/cet/shstk: Add arch_prctl functions for Shadow Stack Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 15:15 ` [PATCH v5 27/27] x86/cet/shstk: Add Shadow Stack instructions to opcode map Yu-cheng Yu 2018-10-11 15:15 ` Yu-cheng Yu 2018-10-11 19:21 ` [PATCH v5 00/27] Control Flow Enforcement: Shadow Stack Dave Hansen 2018-10-11 19:21 ` Dave Hansen 2018-10-11 19:29 ` Yu-cheng Yu 2018-10-11 19:29 ` Yu-cheng Yu
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