From: "Fenghua Yu" <fenghua.yu@intel.com>
To: "Thomas Gleixner" <tglx@linutronix.de>
Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>,
"Ingo Molnar" <mingo@elte.hu>, "Tony Luck" <tony.luck@intel.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Stephane Eranian" <eranian@google.com>,
"Borislav Petkov" <bp@suse.de>,
"Dave Hansen" <dave.hansen@intel.com>,
"Nilay Vaish" <nilayvaish@gmail.com>, "Shaohua Li" <shli@fb.com>,
"David Carrillo-Cisneros" <davidcc@google.com>,
"Ravi V Shankar" <ravi.v.shankar@intel.com>,
"Sai Prakhya" <sai.praneeth.prakhya@intel.com>,
"Vikas Shivappa" <vikas.shivappa@linux.intel.com>,
"linux-kernel" <linux-kernel@vger.kernel.org>,
"x86" <x86@kernel.org>, "Fenghua Yu" <fenghua.yu@intel.com>
Subject: [PATCH v3 04/18] x86/intel_rdt: Feature discovery
Date: Fri, 7 Oct 2016 19:45:49 -0700 [thread overview]
Message-ID: <1475894763-64683-5-git-send-email-fenghua.yu@intel.com> (raw)
In-Reply-To: <1475894763-64683-1-git-send-email-fenghua.yu@intel.com>
From: Fenghua Yu <fenghua.yu@intel.com>
Check CPUID leaves for all the Resource Director Technology (RDT)
Cache Allocation Technology (CAT) bits.
Prescence of allocation features:
CPUID.(EAX=7H, ECX=0):EBX[bit 15] X86_FEATURE_RDT_A
L2 and L3 caches are each separately enabled:
CPUID.(EAX=10H, ECX=0):EBX[bit 1] X86_FEATURE_CAT_L3
CPUID.(EAX=10H, ECX=0):EBX[bit 2] X86_FEATURE_CAT_L2
L3 cache may support independent control of allocation for
code and data (CDP = Code/Data Prioritization):
CPUID.(EAX=10H, ECX=1):ECX[bit 2] X86_FEATURE_CDP_L3
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
arch/x86/include/asm/cpufeatures.h | 5 +++++
arch/x86/kernel/cpu/scattered.c | 3 +++
2 files changed, 8 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 92a8308..64dd8274 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -196,6 +196,10 @@
#define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */
+#define X86_FEATURE_CAT_L3 ( 7*32+16) /* Cache Allocation Technology L3 */
+#define X86_FEATURE_CAT_L2 ( 7*32+17) /* Cache Allocation Technology L2 */
+#define X86_FEATURE_CDP_L3 ( 7*32+18) /* Code and Data Prioritization L3 */
+
/* Virtualization flags: Linux defined, word 8 */
#define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */
#define X86_FEATURE_VNMI ( 8*32+ 1) /* Intel Virtual NMI */
@@ -220,6 +224,7 @@
#define X86_FEATURE_RTM ( 9*32+11) /* Restricted Transactional Memory */
#define X86_FEATURE_CQM ( 9*32+12) /* Cache QoS Monitoring */
#define X86_FEATURE_MPX ( 9*32+14) /* Memory Protection Extension */
+#define X86_FEATURE_RDT_A ( 9*32+15) /* Resource Director Technology Allocation */
#define X86_FEATURE_AVX512F ( 9*32+16) /* AVX-512 Foundation */
#define X86_FEATURE_AVX512DQ ( 9*32+17) /* AVX-512 DQ (Double/Quad granular) Instructions */
#define X86_FEATURE_RDSEED ( 9*32+18) /* The RDSEED instruction */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 8cb57df..11f39a2 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -34,6 +34,9 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
{ X86_FEATURE_INTEL_PT, CR_EBX,25, 0x00000007, 0 },
{ X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 },
{ X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 },
+ { X86_FEATURE_CAT_L3, CR_EBX, 1, 0x00000010, 0 },
+ { X86_FEATURE_CAT_L2, CR_EBX, 2, 0x00000010, 0 },
+ { X86_FEATURE_CDP_L3, CR_ECX, 2, 0x00000010, 1 },
{ X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 },
{ X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 },
{ X86_FEATURE_PROC_FEEDBACK, CR_EDX,11, 0x80000007, 0 },
--
2.5.0
next prev parent reply other threads:[~2016-10-07 23:48 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-08 2:45 [PATCH v3 00/18] Intel Cache Allocation Technology Fenghua Yu
2016-10-07 23:54 ` [RFC PATCH 19/18] x86/intel_rdt: Add support for L2 cache allocation Luck, Tony
2016-10-08 2:45 ` [PATCH v3 01/18] Documentation, ABI: Add a document entry for cache id Fenghua Yu
2016-10-08 17:11 ` Nilay Vaish
2016-10-10 16:45 ` Luck, Tony
2016-10-11 16:48 ` Nilay Vaish
2016-10-08 2:45 ` [PATCH v3 02/18] cacheinfo: Introduce " Fenghua Yu
2016-10-08 17:10 ` Nilay Vaish
2016-10-08 2:45 ` [PATCH v3 03/18] x86, intel_cacheinfo: Enable cache id in x86 Fenghua Yu
2016-10-08 2:45 ` Fenghua Yu [this message]
2016-10-08 17:11 ` [PATCH v3 04/18] x86/intel_rdt: Feature discovery Nilay Vaish
2016-10-08 20:54 ` Fenghua Yu
2016-10-08 19:52 ` Borislav Petkov
2016-10-11 16:57 ` Nilay Vaish
2016-10-11 17:03 ` Borislav Petkov
2016-10-10 16:01 ` Dave Hansen
2016-10-10 16:18 ` Borislav Petkov
2016-10-08 2:45 ` [PATCH v3 05/18] Documentation, x86: Documentation for Intel resource allocation user interface Fenghua Yu
2016-10-08 17:12 ` Nilay Vaish
2016-10-08 20:33 ` Fenghua Yu
2016-10-10 17:19 ` Luck, Tony
2016-10-11 17:07 ` Nilay Vaish
2016-10-11 18:04 ` Luck, Tony
2016-10-08 2:45 ` [PATCH v3 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization Fenghua Yu
2016-10-08 20:57 ` Borislav Petkov
2016-10-08 2:45 ` [PATCH v3 07/18] x86/intel_rdt: Add Haswell feature discovery Fenghua Yu
2016-10-09 11:41 ` Borislav Petkov
2016-10-09 17:09 ` Fenghua Yu
2016-10-09 16:28 ` Borislav Petkov
2016-10-10 18:55 ` Luck, Tony
2016-10-11 11:12 ` Borislav Petkov
2016-10-11 14:51 ` Luck, Tony
2016-10-08 2:45 ` [PATCH v3 08/18] x86/intel_rdt: Pick up L3 RDT parameters from CPUID Fenghua Yu
2016-10-08 2:45 ` [PATCH v3 09/18] x86/cqm: Move PQR_ASSOC management code into generic code used by both CQM and CAT Fenghua Yu
2016-10-08 2:45 ` [PATCH v3 10/18] x86/intel_rdt: Build structures for each resource based on cache topology Fenghua Yu
2016-10-09 21:57 ` Nilay Vaish
2016-10-08 2:45 ` [PATCH v3 11/18] x86/intel_rdt: Add basic resctrl filesystem support Fenghua Yu
2016-10-09 22:31 ` Nilay Vaish
2016-10-10 23:44 ` Luck, Tony
2016-10-08 2:45 ` [PATCH v3 12/18] x86/intel_rdt: Add "info" files to resctrl file system Fenghua Yu
2016-10-08 2:45 ` [PATCH v3 13/18] x86/intel_rdt: Add mkdir " Fenghua Yu
2016-10-10 17:51 ` Nilay Vaish
2016-10-08 2:45 ` [PATCH v3 14/18] x86/intel_rdt: Add cpus file Fenghua Yu
2016-10-08 2:46 ` [PATCH v3 15/18] x86/intel_rdt: Add tasks files Fenghua Yu
2016-10-08 2:46 ` [PATCH v3 16/18] x86/intel_rdt: Add schemata file Fenghua Yu
2016-10-08 2:46 ` [PATCH v3 17/18] x86/intel_rdt: Add scheduler hook Fenghua Yu
2016-10-08 2:46 ` [PATCH v3 18/18] MAINTAINERS: Add maintainer for Intel RDT resource allocation Fenghua Yu
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