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From: Nilay Vaish <nilayvaish@gmail.com>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <h.peter.anvin@intel.com>,
	Ingo Molnar <mingo@elte.hu>, Tony Luck <tony.luck@intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Stephane Eranian <eranian@google.com>,
	Borislav Petkov <bp@suse.de>, Dave Hansen <dave.hansen@intel.com>,
	Shaohua Li <shli@fb.com>,
	David Carrillo-Cisneros <davidcc@google.com>,
	Ravi V Shankar <ravi.v.shankar@intel.com>,
	Sai Prakhya <sai.praneeth.prakhya@intel.com>,
	Vikas Shivappa <vikas.shivappa@linux.intel.com>,
	linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH v3 10/18] x86/intel_rdt: Build structures for each resource based on cache topology
Date: Sun, 9 Oct 2016 16:57:43 -0500	[thread overview]
Message-ID: <CACbG30_XhaA3mzVEwy1L4u7OJNs0gzN4uAzL5PnC_t4Ym6MfTQ@mail.gmail.com> (raw)
In-Reply-To: <1475894763-64683-11-git-send-email-fenghua.yu@intel.com>

On 7 October 2016 at 21:45, Fenghua Yu <fenghua.yu@intel.com> wrote:
> From: Tony Luck <tony.luck@intel.com>
>
> diff --git a/arch/x86/include/asm/intel_rdt.h b/arch/x86/include/asm/intel_rdt.h
> index 251ac2a..bad8dc7 100644
> --- a/arch/x86/include/asm/intel_rdt.h
> +++ b/arch/x86/include/asm/intel_rdt.h
> @@ -40,6 +40,39 @@ struct rdt_resource {
>                 if (r->enabled)
>
>  #define IA32_L3_CBM_BASE       0xc90
> +
> +/**
> + * struct rdt_domain - group of cpus sharing an RDT resource
> + * @list:      all instances of this resource
> + * @id:                unique id for this instance
> + * @cpu_mask:  which cpus share this resource
> + * @cbm:       array of cache bit masks (indexed by CLOSID)
> + */
> +struct rdt_domain {
> +       struct list_head        list;
> +       int                     id;
> +       struct cpumask          cpu_mask;
> +       u32                     *cbm;
> +};
> +
> +/**
> + * struct msr_param - set a range of MSRs from a domain
> + * @res:       The resource to use
> + * @low:       Beginning index from base MSR
> + * @high:      End index
> + */
> +struct msr_param {
> +       struct rdt_resource     *res;
> +       int                     low;
> +       int                     high;
> +};
> +
> +extern struct static_key_false rdt_enable_key;
> +extern struct mutex rdtgroup_mutex;
> +
> +int __init rdtgroup_init(void);
> +
> +extern struct rdtgroup *rdtgroup_default;

struct rdtgroup has not been defined yet.  The statement above should
be part of the next patch.

--
Nilay

  reply	other threads:[~2016-10-09 21:59 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-08  2:45 [PATCH v3 00/18] Intel Cache Allocation Technology Fenghua Yu
2016-10-07 23:54 ` [RFC PATCH 19/18] x86/intel_rdt: Add support for L2 cache allocation Luck, Tony
2016-10-08  2:45 ` [PATCH v3 01/18] Documentation, ABI: Add a document entry for cache id Fenghua Yu
2016-10-08 17:11   ` Nilay Vaish
2016-10-10 16:45     ` Luck, Tony
2016-10-11 16:48       ` Nilay Vaish
2016-10-08  2:45 ` [PATCH v3 02/18] cacheinfo: Introduce " Fenghua Yu
2016-10-08 17:10   ` Nilay Vaish
2016-10-08  2:45 ` [PATCH v3 03/18] x86, intel_cacheinfo: Enable cache id in x86 Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 04/18] x86/intel_rdt: Feature discovery Fenghua Yu
2016-10-08 17:11   ` Nilay Vaish
2016-10-08 20:54     ` Fenghua Yu
2016-10-08 19:52       ` Borislav Petkov
2016-10-11 16:57         ` Nilay Vaish
2016-10-11 17:03           ` Borislav Petkov
2016-10-10 16:01     ` Dave Hansen
2016-10-10 16:18       ` Borislav Petkov
2016-10-08  2:45 ` [PATCH v3 05/18] Documentation, x86: Documentation for Intel resource allocation user interface Fenghua Yu
2016-10-08 17:12   ` Nilay Vaish
2016-10-08 20:33     ` Fenghua Yu
2016-10-10 17:19       ` Luck, Tony
2016-10-11 17:07         ` Nilay Vaish
2016-10-11 18:04           ` Luck, Tony
2016-10-08  2:45 ` [PATCH v3 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization Fenghua Yu
2016-10-08 20:57   ` Borislav Petkov
2016-10-08  2:45 ` [PATCH v3 07/18] x86/intel_rdt: Add Haswell feature discovery Fenghua Yu
2016-10-09 11:41   ` Borislav Petkov
2016-10-09 17:09     ` Fenghua Yu
2016-10-09 16:28       ` Borislav Petkov
2016-10-10 18:55         ` Luck, Tony
2016-10-11 11:12           ` Borislav Petkov
2016-10-11 14:51             ` Luck, Tony
2016-10-08  2:45 ` [PATCH v3 08/18] x86/intel_rdt: Pick up L3 RDT parameters from CPUID Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 09/18] x86/cqm: Move PQR_ASSOC management code into generic code used by both CQM and CAT Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 10/18] x86/intel_rdt: Build structures for each resource based on cache topology Fenghua Yu
2016-10-09 21:57   ` Nilay Vaish [this message]
2016-10-08  2:45 ` [PATCH v3 11/18] x86/intel_rdt: Add basic resctrl filesystem support Fenghua Yu
2016-10-09 22:31   ` Nilay Vaish
2016-10-10 23:44     ` Luck, Tony
2016-10-08  2:45 ` [PATCH v3 12/18] x86/intel_rdt: Add "info" files to resctrl file system Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 13/18] x86/intel_rdt: Add mkdir " Fenghua Yu
2016-10-10 17:51   ` Nilay Vaish
2016-10-08  2:45 ` [PATCH v3 14/18] x86/intel_rdt: Add cpus file Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 15/18] x86/intel_rdt: Add tasks files Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 16/18] x86/intel_rdt: Add schemata file Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 17/18] x86/intel_rdt: Add scheduler hook Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 18/18] MAINTAINERS: Add maintainer for Intel RDT resource allocation Fenghua Yu

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