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From: "Luck, Tony" <tony.luck@intel.com>
To: Nilay Vaish <nilayvaish@gmail.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <h.peter.anvin@intel.com>,
	Ingo Molnar <mingo@elte.hu>,
	Peter Zijlstra <peterz@infradead.org>,
	Stephane Eranian <eranian@google.com>,
	Borislav Petkov <bp@suse.de>, Dave Hansen <dave.hansen@intel.com>,
	Shaohua Li <shli@fb.com>,
	David Carrillo-Cisneros <davidcc@google.com>,
	Ravi V Shankar <ravi.v.shankar@intel.com>,
	Sai Prakhya <sai.praneeth.prakhya@intel.com>,
	Vikas Shivappa <vikas.shivappa@linux.intel.com>,
	linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH v3 05/18] Documentation, x86: Documentation for Intel resource allocation user interface
Date: Tue, 11 Oct 2016 11:04:07 -0700	[thread overview]
Message-ID: <20161011180406.GA13932@intel.com> (raw)
In-Reply-To: <CACbG30-oAftpUZ0K0VdtN-HacWiQfD8ZXU5EvY_NYB4Vsr0gUQ@mail.gmail.com>

On Tue, Oct 11, 2016 at 12:07:33PM -0500, Nilay Vaish wrote:
> On 10 October 2016 at 12:19, Luck, Tony <tony.luck@intel.com> wrote:
> > The next resource coming will have values that are simple ranges {0 .. max}
> >
> 
> Regarding addition of more resources, I was wondering if one common
> definition of struct rdt_resource to be used for each resource the way
> to take.  As you point out, L2 caches will not support CDP, but cdp
> would be part of the variable describing L2 cache.  Should we have
> separate structs for each resource?

Yes and no.

CDP is currently the only real difference between L2 and L3, and
the current code will just never set the @cdp_capable field to true.
It seems less of a burdern to carry two extra "bool" fields in the
resource that won't use them, than to architect some complex scheme
that allows different resources to have different structures.

The structure essentially has to be the same for each resource
so that we can do:

	for_each_rdt_resource(r) {
		something()
	}

all over the code (from bringing cpus online and taking them off again
to deciding which lines to print in the schemata file). There are over
a dozen places where this happens, and it is the key to making it easy
to add support for new resources.

However, I expect the structure to morph as new resources require a
different "something()".  E.g. validating a new resource limit value in
the schemata file. Right now the function that does that has the weird
rules about consecutive bits in the bitmask hard wired into it. When
we get a resource that allows a simple range, we'll want a simpler
function. Spoiler: that resource also expects "0" as the default value
which doesn't restrict accesss, bigger numbers limiting access more.
So we may also want an "initial_value", or "default_value" field so the
discovery and cleanup code can set the per resource MSR array correctly.

So we'll add some per-resource flags. Perhaps the validation function
will be a function pointer in the structure. If there are many such
differences, we might end up with all the common fields at the front
of the structure, and a union of structures with the per resource type
bits. But we can make that call as we add new resources.

-Tony

  reply	other threads:[~2016-10-11 18:04 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-08  2:45 [PATCH v3 00/18] Intel Cache Allocation Technology Fenghua Yu
2016-10-07 23:54 ` [RFC PATCH 19/18] x86/intel_rdt: Add support for L2 cache allocation Luck, Tony
2016-10-08  2:45 ` [PATCH v3 01/18] Documentation, ABI: Add a document entry for cache id Fenghua Yu
2016-10-08 17:11   ` Nilay Vaish
2016-10-10 16:45     ` Luck, Tony
2016-10-11 16:48       ` Nilay Vaish
2016-10-08  2:45 ` [PATCH v3 02/18] cacheinfo: Introduce " Fenghua Yu
2016-10-08 17:10   ` Nilay Vaish
2016-10-08  2:45 ` [PATCH v3 03/18] x86, intel_cacheinfo: Enable cache id in x86 Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 04/18] x86/intel_rdt: Feature discovery Fenghua Yu
2016-10-08 17:11   ` Nilay Vaish
2016-10-08 20:54     ` Fenghua Yu
2016-10-08 19:52       ` Borislav Petkov
2016-10-11 16:57         ` Nilay Vaish
2016-10-11 17:03           ` Borislav Petkov
2016-10-10 16:01     ` Dave Hansen
2016-10-10 16:18       ` Borislav Petkov
2016-10-08  2:45 ` [PATCH v3 05/18] Documentation, x86: Documentation for Intel resource allocation user interface Fenghua Yu
2016-10-08 17:12   ` Nilay Vaish
2016-10-08 20:33     ` Fenghua Yu
2016-10-10 17:19       ` Luck, Tony
2016-10-11 17:07         ` Nilay Vaish
2016-10-11 18:04           ` Luck, Tony [this message]
2016-10-08  2:45 ` [PATCH v3 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization Fenghua Yu
2016-10-08 20:57   ` Borislav Petkov
2016-10-08  2:45 ` [PATCH v3 07/18] x86/intel_rdt: Add Haswell feature discovery Fenghua Yu
2016-10-09 11:41   ` Borislav Petkov
2016-10-09 17:09     ` Fenghua Yu
2016-10-09 16:28       ` Borislav Petkov
2016-10-10 18:55         ` Luck, Tony
2016-10-11 11:12           ` Borislav Petkov
2016-10-11 14:51             ` Luck, Tony
2016-10-08  2:45 ` [PATCH v3 08/18] x86/intel_rdt: Pick up L3 RDT parameters from CPUID Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 09/18] x86/cqm: Move PQR_ASSOC management code into generic code used by both CQM and CAT Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 10/18] x86/intel_rdt: Build structures for each resource based on cache topology Fenghua Yu
2016-10-09 21:57   ` Nilay Vaish
2016-10-08  2:45 ` [PATCH v3 11/18] x86/intel_rdt: Add basic resctrl filesystem support Fenghua Yu
2016-10-09 22:31   ` Nilay Vaish
2016-10-10 23:44     ` Luck, Tony
2016-10-08  2:45 ` [PATCH v3 12/18] x86/intel_rdt: Add "info" files to resctrl file system Fenghua Yu
2016-10-08  2:45 ` [PATCH v3 13/18] x86/intel_rdt: Add mkdir " Fenghua Yu
2016-10-10 17:51   ` Nilay Vaish
2016-10-08  2:45 ` [PATCH v3 14/18] x86/intel_rdt: Add cpus file Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 15/18] x86/intel_rdt: Add tasks files Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 16/18] x86/intel_rdt: Add schemata file Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 17/18] x86/intel_rdt: Add scheduler hook Fenghua Yu
2016-10-08  2:46 ` [PATCH v3 18/18] MAINTAINERS: Add maintainer for Intel RDT resource allocation Fenghua Yu

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