From: Alexandre Chartre <alexandre.chartre@oracle.com>
To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
hpa@zytor.com, x86@kernel.org, dave.hansen@linux.intel.com,
luto@kernel.org, peterz@infradead.org,
linux-kernel@vger.kernel.org, thomas.lendacky@amd.com,
jroedel@suse.de
Cc: konrad.wilk@oracle.com, jan.setjeeilers@oracle.com,
junaids@google.com, oweisse@google.com, rppt@linux.vnet.ibm.com,
graf@amazon.de, mgross@linux.intel.com, kuzuno@gmail.com,
alexandre.chartre@oracle.com
Subject: [RFC][PATCH v2 07/21] x86/entry: Fill ESPFIX stack using C code
Date: Mon, 16 Nov 2020 15:47:43 +0100 [thread overview]
Message-ID: <20201116144757.1920077-8-alexandre.chartre@oracle.com> (raw)
In-Reply-To: <20201116144757.1920077-1-alexandre.chartre@oracle.com>
The ESPFIX stack is filled using assembly code. Move this code to a C
function so that it is easier to read and modify.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
---
arch/x86/entry/entry_64.S | 62 ++++++++++++++++++-------------------
arch/x86/kernel/espfix_64.c | 41 ++++++++++++++++++++++++
2 files changed, 72 insertions(+), 31 deletions(-)
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 73e9cd47dc83..6e0b5b010e0b 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -684,8 +684,10 @@ native_irq_return_ldt:
* long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
* of the ESPFIX stack.
*
- * We clobber RAX and RDI in this code. We stash RDI on the
- * normal stack and RAX on the ESPFIX stack.
+ * We call into C code to fill the ESPFIX stack. We stash registers
+ * that the C function can clobber on the normal stack. The user RAX
+ * is stashed first so that it is adjacent to the iret frame which
+ * will be copied to the ESPFIX stack.
*
* The ESPFIX stack layout we set up looks like this:
*
@@ -699,39 +701,37 @@ native_irq_return_ldt:
* --- bottom of ESPFIX stack ---
*/
- pushq %rdi /* Stash user RDI */
- SWAPGS /* to kernel GS */
- SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi /* to kernel CR3 */
-
- movq PER_CPU_VAR(espfix_waddr), %rdi
- movq %rax, (0*8)(%rdi) /* user RAX */
- movq (1*8)(%rsp), %rax /* user RIP */
- movq %rax, (1*8)(%rdi)
- movq (2*8)(%rsp), %rax /* user CS */
- movq %rax, (2*8)(%rdi)
- movq (3*8)(%rsp), %rax /* user RFLAGS */
- movq %rax, (3*8)(%rdi)
- movq (5*8)(%rsp), %rax /* user SS */
- movq %rax, (5*8)(%rdi)
- movq (4*8)(%rsp), %rax /* user RSP */
- movq %rax, (4*8)(%rdi)
- /* Now RAX == RSP. */
-
- andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
+ /* save registers */
+ pushq %rax
+ pushq %rdi
+ pushq %rsi
+ pushq %rdx
+ pushq %rcx
+ pushq %r8
+ pushq %r9
+ pushq %r10
+ pushq %r11
/*
- * espfix_stack[31:16] == 0. The page tables are set up such that
- * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
- * espfix_waddr for any X. That is, there are 65536 RO aliases of
- * the same page. Set up RSP so that RSP[31:16] contains the
- * respective 16 bits of the /userspace/ RSP and RSP nonetheless
- * still points to an RO alias of the ESPFIX stack.
+ * fill_espfix_stack will copy the iret+rax frame to the ESPFIX
+ * stack and return with RAX containing a pointer to the ESPFIX
+ * stack.
*/
- orq PER_CPU_VAR(espfix_stack), %rax
+ leaq 8*8(%rsp), %rdi /* points to the iret+rax frame */
+ call fill_espfix_stack
- SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi
- SWAPGS /* to user GS */
- popq %rdi /* Restore user RDI */
+ /*
+ * RAX contains a pointer to the ESPFIX, so restore registers but
+ * RAX. RAX will be restored from the ESPFIX stack.
+ */
+ popq %r11
+ popq %r10
+ popq %r9
+ popq %r8
+ popq %rcx
+ popq %rdx
+ popq %rsi
+ popq %rdi
movq %rax, %rsp
UNWIND_HINT_IRET_REGS offset=8
diff --git a/arch/x86/kernel/espfix_64.c b/arch/x86/kernel/espfix_64.c
index 4fe7af58cfe1..ff4b5160b39c 100644
--- a/arch/x86/kernel/espfix_64.c
+++ b/arch/x86/kernel/espfix_64.c
@@ -33,6 +33,7 @@
#include <asm/pgalloc.h>
#include <asm/setup.h>
#include <asm/espfix.h>
+#include <asm/entry-common.h>
/*
* Note: we only need 6*8 = 48 bytes for the espfix stack, but round
@@ -205,3 +206,43 @@ void init_espfix_ap(int cpu)
per_cpu(espfix_waddr, cpu) = (unsigned long)stack_page
+ (addr & ~PAGE_MASK);
}
+
+/*
+ * iret frame with an additional user_rax register.
+ */
+struct iret_rax_frame {
+ unsigned long user_rax;
+ unsigned long rip;
+ unsigned long cs;
+ unsigned long rflags;
+ unsigned long rsp;
+ unsigned long ss;
+};
+
+noinstr unsigned long fill_espfix_stack(struct iret_rax_frame *frame)
+{
+ struct iret_rax_frame *espfix_frame;
+ unsigned long rsp;
+
+ native_swapgs();
+ user_pagetable_exit();
+
+ espfix_frame = (struct iret_rax_frame *)this_cpu_read(espfix_waddr);
+ *espfix_frame = *frame;
+
+ /*
+ * espfix_stack[31:16] == 0. The page tables are set up such that
+ * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
+ * espfix_waddr for any X. That is, there are 65536 RO aliases of
+ * the same page. Set up RSP so that RSP[31:16] contains the
+ * respective 16 bits of the /userspace/ RSP and RSP nonetheless
+ * still points to an RO alias of the ESPFIX stack.
+ */
+ rsp = ((unsigned long)espfix_frame) & 0xffff0000;
+ rsp |= this_cpu_read(espfix_stack);
+
+ user_pagetable_enter();
+ native_swapgs();
+
+ return rsp;
+}
--
2.18.4
next prev parent reply other threads:[~2020-11-16 14:47 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 14:47 [RFC][PATCH v2 00/21] x86/pti: Defer CR3 switch to C code Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 01/21] x86/syscall: Add wrapper for invoking syscall function Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 02/21] x86/entry: Update asm_call_on_stack to support more function arguments Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 03/21] x86/entry: Consolidate IST entry from userspace Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 04/21] x86/sev-es: Define a setup stack function for the VC idtentry Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 05/21] x86/entry: Implement ret_from_fork body with C code Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 06/21] x86/pti: Provide C variants of PTI switch CR3 macros Alexandre Chartre
2020-11-16 14:47 ` Alexandre Chartre [this message]
2020-11-16 14:47 ` [RFC][PATCH v2 08/21] x86/pti: Introduce per-task PTI trampoline stack Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 09/21] x86/pti: Function to clone page-table entries from a specified mm Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 10/21] x86/pti: Function to map per-cpu page-table entry Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 11/21] x86/pti: Extend PTI user mappings Alexandre Chartre
2020-11-16 19:48 ` Andy Lutomirski
2020-11-16 20:21 ` Alexandre Chartre
2020-11-16 23:06 ` Andy Lutomirski
2020-11-17 8:42 ` Alexandre Chartre
2020-11-17 15:49 ` Andy Lutomirski
2020-11-19 19:15 ` Thomas Gleixner
2020-11-16 14:47 ` [RFC][PATCH v2 12/21] x86/pti: Use PTI stack instead of trampoline stack Alexandre Chartre
2020-11-16 16:57 ` Andy Lutomirski
2020-11-16 18:10 ` Alexandre Chartre
2020-11-16 18:34 ` Andy Lutomirski
2020-11-16 19:37 ` Alexandre Chartre
2020-11-17 15:09 ` Alexandre Chartre
2020-11-17 15:52 ` Andy Lutomirski
2020-11-17 17:01 ` Alexandre Chartre
2020-11-19 1:49 ` Andy Lutomirski
2020-11-19 8:05 ` Alexandre Chartre
2020-11-19 12:06 ` Alexandre Chartre
2020-11-19 16:06 ` Andy Lutomirski
2020-11-19 17:02 ` Alexandre Chartre
2020-11-16 21:24 ` David Laight
2020-11-17 8:27 ` Alexandre Chartre
2020-11-19 19:10 ` Thomas Gleixner
2020-11-19 19:55 ` Alexandre Chartre
2020-11-19 21:20 ` Thomas Gleixner
2020-11-24 7:20 ` [x86/pti] 5da9e742d1: PANIC:double_fault kernel test robot
2020-11-16 14:47 ` [RFC][PATCH v2 13/21] x86/pti: Execute syscall functions on the kernel stack Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 14/21] x86/pti: Execute IDT handlers " Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 15/21] x86/pti: Execute IDT handlers with error code " Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 16/21] x86/pti: Execute system vector handlers " Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 17/21] x86/pti: Execute page fault handler " Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 18/21] x86/pti: Execute NMI " Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 19/21] x86/pti: Defer CR3 switch to C code for IST entries Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 20/21] x86/pti: Defer CR3 switch to C code for non-IST and syscall entries Alexandre Chartre
2020-11-16 14:47 ` [RFC][PATCH v2 21/21] x86/pti: Use a different stack canary with the user and kernel page-table Alexandre Chartre
2020-11-16 16:56 ` Andy Lutomirski
2020-11-16 18:34 ` Alexandre Chartre
2020-11-16 20:17 ` [RFC][PATCH v2 00/21] x86/pti: Defer CR3 switch to C code Borislav Petkov
2020-11-17 7:56 ` Alexandre Chartre
2020-11-17 16:55 ` Borislav Petkov
2020-11-17 18:12 ` Alexandre Chartre
2020-11-17 18:28 ` Borislav Petkov
2020-11-17 19:02 ` Alexandre Chartre
2020-11-17 21:23 ` Borislav Petkov
2020-11-18 7:08 ` Alexandre Chartre
2020-11-17 21:26 ` Borislav Petkov
2020-11-18 7:41 ` Alexandre Chartre
2020-11-18 9:30 ` David Laight
2020-11-18 10:29 ` Alexandre Chartre
2020-11-18 13:22 ` David Laight
2020-11-18 17:15 ` Alexandre Chartre
2020-11-18 11:29 ` Borislav Petkov
2020-11-18 19:37 ` Alexandre Chartre
2020-11-16 20:24 ` Borislav Petkov
2020-11-17 8:19 ` Alexandre Chartre
2020-11-17 17:07 ` Borislav Petkov
2020-11-17 18:24 ` Alexandre Chartre
2020-11-19 19:32 ` Thomas Gleixner
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