From: Tim Chen <tim.c.chen@linux.intel.com>
To: Jiri Kosina <jikos@kernel.org>, Thomas Gleixner <tglx@linutronix.de>
Cc: Tim Chen <tim.c.chen@linux.intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Ingo Molnar <mingo@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Andrea Arcangeli <aarcange@redhat.com>,
David Woodhouse <dwmw@amazon.co.uk>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Casey Schaufler <casey.schaufler@intel.com>,
Asit Mallick <asit.k.mallick@intel.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Jon Masters <jcm@redhat.com>, Waiman Long <longman9394@gmail.com>,
linux-kernel@vger.kernel.org, x86@kernel.org
Subject: [Patch v5 04/16] x86/speculation: Add X86_FEATURE_USE_IBRS_ENHANCED
Date: Fri, 16 Nov 2018 17:53:47 -0800 [thread overview]
Message-ID: <40733266e3484cbd576d84b67dd98f9f8769d2e3.1542418937.git.tim.c.chen@linux.intel.com> (raw)
In-Reply-To: <cover.1542418936.git.tim.c.chen@linux.intel.com>
In-Reply-To: <cover.1542418936.git.tim.c.chen@linux.intel.com>
STIBP is not needed when enhanced IBRS is used for Spectre V2 mitigation.
A CPU feature flag to indicate that enhanced IBRS is used will be handy
for skipping STIBP for this case.
Add X86_FEATURE_USE_IBRS_ENHANCED feature bit to indicate
enhanced IBRS is used for Spectre V2 mitigation.
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/cpu/bugs.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 28c4a50..fe8e064 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -221,6 +221,7 @@
#define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */
#define X86_FEATURE_L1TF_PTEINV ( 7*32+29) /* "" L1TF workaround PTE inversion */
#define X86_FEATURE_IBRS_ENHANCED ( 7*32+30) /* Enhanced IBRS */
+#define X86_FEATURE_USE_IBRS_ENHANCED ( 7*32+31) /* "" Enhanced IBRS enabled */
/* Virtualization flags: Linux defined, word 8 */
#define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 91a754a..3a6f13b 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -387,6 +387,7 @@ static void __init spectre_v2_select_mitigation(void)
/* Force it so VMEXIT will restore correctly */
x86_spec_ctrl_base |= SPEC_CTRL_IBRS;
wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
+ setup_force_cpu_cap(X86_FEATURE_USE_IBRS_ENHANCED);
goto specv2_set_mode;
}
if (IS_ENABLED(CONFIG_RETPOLINE))
--
2.9.4
next prev parent reply other threads:[~2018-11-17 2:27 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-17 1:53 [Patch v5 00/16] Provide task property based options to enable Spectre v2 userspace-userspace protection Tim Chen
2018-11-17 1:53 ` [Patch v5 01/16] x86/speculation: Clean up spectre_v2_parse_cmdline() Tim Chen
2018-11-17 1:53 ` [Patch v5 02/16] x86/speculation: Remove unnecessary ret variable in cpu_show_common() Tim Chen
2018-11-17 1:53 ` [Patch v5 03/16] x86/speculation: Reorganize cpu_show_common() Tim Chen
2018-11-17 1:53 ` Tim Chen [this message]
2018-11-17 1:53 ` [Patch v5 05/16] x86/speculation: Disable STIBP when enhanced IBRS is in use Tim Chen
2018-11-17 1:53 ` [Patch v5 06/16] x86/speculation: Rename SSBD update functions Tim Chen
2018-11-17 1:53 ` [Patch v5 07/16] x86/speculation: Reorganize speculation control MSRs update Tim Chen
2018-11-17 1:53 ` [Patch v5 08/16] smt: Create cpu_smt_enabled static key for SMT specific code Tim Chen
2018-11-19 12:58 ` Thomas Gleixner
2018-11-19 20:50 ` Tim Chen
2018-11-19 14:57 ` Peter Zijlstra
2018-11-19 18:08 ` Tim Chen
2018-11-19 19:03 ` Thomas Gleixner
2018-11-19 19:25 ` Tim Chen
2018-11-17 1:53 ` [Patch v5 09/16] x86/smt: Convert cpu_smt_control check to cpu_smt_enabled static key Tim Chen
2018-11-19 12:48 ` Thomas Gleixner
2018-11-19 12:59 ` Thomas Gleixner
2018-11-17 1:53 ` [Patch v5 10/16] x86/speculation: Turn on or off STIBP according to a task's TIF_STIBP Tim Chen
2018-11-17 1:53 ` [Patch v5 11/16] x86/speculation: Add Spectre v2 app to app protection modes Tim Chen
2018-11-17 9:47 ` Jiri Kosina
2018-11-18 22:59 ` Jiri Kosina
2018-11-19 13:36 ` Thomas Gleixner
2018-11-19 13:49 ` Jiri Kosina
2018-11-19 13:51 ` Thomas Gleixner
2018-11-19 14:00 ` Jiri Kosina
2018-11-19 18:31 ` Tim Chen
2018-11-19 19:32 ` Andrea Arcangeli
2018-11-19 19:39 ` Jiri Kosina
2018-11-19 21:40 ` Andrea Arcangeli
2018-11-19 21:33 ` Dave Hansen
2018-11-19 23:16 ` Andrea Arcangeli
2018-11-19 23:25 ` Dave Hansen
2018-11-19 23:45 ` Andrea Arcangeli
2018-11-20 0:22 ` Thomas Gleixner
2018-11-19 13:32 ` Thomas Gleixner
2018-11-20 0:08 ` Tim Chen
2018-11-20 0:30 ` Thomas Gleixner
2018-11-20 1:14 ` Tim Chen
2018-11-20 1:17 ` Andi Kleen
2018-11-19 15:00 ` Thomas Gleixner
2018-11-19 18:27 ` Tim Chen
2018-11-19 18:31 ` Jiri Kosina
2018-11-19 20:21 ` Thomas Gleixner
2018-11-19 22:44 ` Tim Chen
2018-11-19 20:46 ` Thomas Gleixner
2018-11-19 20:55 ` Jiri Kosina
2018-11-19 21:12 ` Thomas Gleixner
2018-11-19 22:48 ` Tim Chen
2018-11-19 23:01 ` Thomas Gleixner
2018-11-19 23:23 ` Jiri Kosina
2018-11-20 0:00 ` Thomas Gleixner
2018-11-20 0:24 ` Tim Chen
2018-11-19 23:39 ` Dave Hansen
2018-11-19 23:49 ` Jiri Kosina
2018-11-20 0:02 ` Thomas Gleixner
2018-11-17 1:53 ` [Patch v5 12/16] x86/speculation: Create PRCTL interface to restrict indirect branch speculation Tim Chen
2018-11-17 9:53 ` Jiri Kosina
2018-11-19 18:29 ` Tim Chen
2018-11-17 1:53 ` [Patch v5 13/16] security: Update speculation restriction of a process when modifying its dumpability Tim Chen
2018-11-17 1:53 ` [Patch v5 14/16] x86/speculation: Use STIBP to restrict speculation on non-dumpable task Tim Chen
2018-11-17 1:53 ` [Patch v5 15/16] x86/speculation: Update comment on TIF_SSBD Tim Chen
2018-11-17 1:53 ` [Patch v5 16/16] x86: Group thread info flags by functionality Tim Chen
2018-11-17 9:34 ` [Patch v5 00/16] Provide task property based options to enable Spectre v2 userspace-userspace protection Jiri Kosina
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