From: Tim Chen <tim.c.chen@linux.intel.com>
To: Jiri Kosina <jikos@kernel.org>, Thomas Gleixner <tglx@linutronix.de>
Cc: Tim Chen <tim.c.chen@linux.intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Ingo Molnar <mingo@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Andrea Arcangeli <aarcange@redhat.com>,
David Woodhouse <dwmw@amazon.co.uk>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Casey Schaufler <casey.schaufler@intel.com>,
Asit Mallick <asit.k.mallick@intel.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Jon Masters <jcm@redhat.com>, Waiman Long <longman9394@gmail.com>,
linux-kernel@vger.kernel.org, x86@kernel.org
Subject: [Patch v5 06/16] x86/speculation: Rename SSBD update functions
Date: Fri, 16 Nov 2018 17:53:49 -0800 [thread overview]
Message-ID: <fb10de2ab8d7e8b54c84dde0627a3ecd83e1baf3.1542418937.git.tim.c.chen@linux.intel.com> (raw)
In-Reply-To: <cover.1542418936.git.tim.c.chen@linux.intel.com>
In-Reply-To: <cover.1542418936.git.tim.c.chen@linux.intel.com>
During context switch, the SSBD bit in SPEC_CTRL MSR is updated according
to changes in TIF_SSBD flag in the current and next running task.
Currently, only the bit controlling speculative store in SPEC_CTRL MSR
is updated and the related update functions all have "speculative_store"
or "ssb" in their names.
In later patches, other bits controlling STIBP in SPEC_CTRL MSR need
to be updated. The SPEC_CTRL MSR update functions should get rid of the
speculative store names as they will no longer be limited to SSBD update.
Rename the "speculative_store*" functions to a more generic name.
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
---
arch/x86/include/asm/spec-ctrl.h | 6 +++---
arch/x86/kernel/cpu/bugs.c | 4 ++--
arch/x86/kernel/process.c | 12 ++++++------
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index ae7c2c5..8e2f841 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -70,11 +70,11 @@ extern void speculative_store_bypass_ht_init(void);
static inline void speculative_store_bypass_ht_init(void) { }
#endif
-extern void speculative_store_bypass_update(unsigned long tif);
+extern void speculation_ctrl_update(unsigned long tif);
-static inline void speculative_store_bypass_update_current(void)
+static inline void speculation_ctrl_update_current(void)
{
- speculative_store_bypass_update(current_thread_info()->flags);
+ speculation_ctrl_update(current_thread_info()->flags);
}
#endif
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 5c0eb2f..e4cfc4a 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -202,7 +202,7 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest)
tif = setguest ? ssbd_spec_ctrl_to_tif(guestval) :
ssbd_spec_ctrl_to_tif(hostval);
- speculative_store_bypass_update(tif);
+ speculation_ctrl_update(tif);
}
}
EXPORT_SYMBOL_GPL(x86_virt_spec_ctrl);
@@ -646,7 +646,7 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl)
* mitigation until it is next scheduled.
*/
if (task == current && update)
- speculative_store_bypass_update_current();
+ speculation_ctrl_update_current();
return 0;
}
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index c93fcfd..8aa4960 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -395,27 +395,27 @@ static __always_inline void amd_set_ssb_virt_state(unsigned long tifn)
wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn));
}
-static __always_inline void intel_set_ssb_state(unsigned long tifn)
+static __always_inline void spec_ctrl_update_msr(unsigned long tifn)
{
u64 msr = x86_spec_ctrl_base | ssbd_tif_to_spec_ctrl(tifn);
wrmsrl(MSR_IA32_SPEC_CTRL, msr);
}
-static __always_inline void __speculative_store_bypass_update(unsigned long tifn)
+static __always_inline void __speculation_ctrl_update(unsigned long tifn)
{
if (static_cpu_has(X86_FEATURE_VIRT_SSBD))
amd_set_ssb_virt_state(tifn);
else if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD))
amd_set_core_ssb_state(tifn);
else
- intel_set_ssb_state(tifn);
+ spec_ctrl_update_msr(tifn);
}
-void speculative_store_bypass_update(unsigned long tif)
+void speculation_ctrl_update(unsigned long tif)
{
preempt_disable();
- __speculative_store_bypass_update(tif);
+ __speculation_ctrl_update(tif);
preempt_enable();
}
@@ -452,7 +452,7 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
set_cpuid_faulting(!!(tifn & _TIF_NOCPUID));
if ((tifp ^ tifn) & _TIF_SSBD)
- __speculative_store_bypass_update(tifn);
+ __speculation_ctrl_update(tifn);
}
/*
--
2.9.4
next prev parent reply other threads:[~2018-11-17 2:27 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-17 1:53 [Patch v5 00/16] Provide task property based options to enable Spectre v2 userspace-userspace protection Tim Chen
2018-11-17 1:53 ` [Patch v5 01/16] x86/speculation: Clean up spectre_v2_parse_cmdline() Tim Chen
2018-11-17 1:53 ` [Patch v5 02/16] x86/speculation: Remove unnecessary ret variable in cpu_show_common() Tim Chen
2018-11-17 1:53 ` [Patch v5 03/16] x86/speculation: Reorganize cpu_show_common() Tim Chen
2018-11-17 1:53 ` [Patch v5 04/16] x86/speculation: Add X86_FEATURE_USE_IBRS_ENHANCED Tim Chen
2018-11-17 1:53 ` [Patch v5 05/16] x86/speculation: Disable STIBP when enhanced IBRS is in use Tim Chen
2018-11-17 1:53 ` Tim Chen [this message]
2018-11-17 1:53 ` [Patch v5 07/16] x86/speculation: Reorganize speculation control MSRs update Tim Chen
2018-11-17 1:53 ` [Patch v5 08/16] smt: Create cpu_smt_enabled static key for SMT specific code Tim Chen
2018-11-19 12:58 ` Thomas Gleixner
2018-11-19 20:50 ` Tim Chen
2018-11-19 14:57 ` Peter Zijlstra
2018-11-19 18:08 ` Tim Chen
2018-11-19 19:03 ` Thomas Gleixner
2018-11-19 19:25 ` Tim Chen
2018-11-17 1:53 ` [Patch v5 09/16] x86/smt: Convert cpu_smt_control check to cpu_smt_enabled static key Tim Chen
2018-11-19 12:48 ` Thomas Gleixner
2018-11-19 12:59 ` Thomas Gleixner
2018-11-17 1:53 ` [Patch v5 10/16] x86/speculation: Turn on or off STIBP according to a task's TIF_STIBP Tim Chen
2018-11-17 1:53 ` [Patch v5 11/16] x86/speculation: Add Spectre v2 app to app protection modes Tim Chen
2018-11-17 9:47 ` Jiri Kosina
2018-11-18 22:59 ` Jiri Kosina
2018-11-19 13:36 ` Thomas Gleixner
2018-11-19 13:49 ` Jiri Kosina
2018-11-19 13:51 ` Thomas Gleixner
2018-11-19 14:00 ` Jiri Kosina
2018-11-19 18:31 ` Tim Chen
2018-11-19 19:32 ` Andrea Arcangeli
2018-11-19 19:39 ` Jiri Kosina
2018-11-19 21:40 ` Andrea Arcangeli
2018-11-19 21:33 ` Dave Hansen
2018-11-19 23:16 ` Andrea Arcangeli
2018-11-19 23:25 ` Dave Hansen
2018-11-19 23:45 ` Andrea Arcangeli
2018-11-20 0:22 ` Thomas Gleixner
2018-11-19 13:32 ` Thomas Gleixner
2018-11-20 0:08 ` Tim Chen
2018-11-20 0:30 ` Thomas Gleixner
2018-11-20 1:14 ` Tim Chen
2018-11-20 1:17 ` Andi Kleen
2018-11-19 15:00 ` Thomas Gleixner
2018-11-19 18:27 ` Tim Chen
2018-11-19 18:31 ` Jiri Kosina
2018-11-19 20:21 ` Thomas Gleixner
2018-11-19 22:44 ` Tim Chen
2018-11-19 20:46 ` Thomas Gleixner
2018-11-19 20:55 ` Jiri Kosina
2018-11-19 21:12 ` Thomas Gleixner
2018-11-19 22:48 ` Tim Chen
2018-11-19 23:01 ` Thomas Gleixner
2018-11-19 23:23 ` Jiri Kosina
2018-11-20 0:00 ` Thomas Gleixner
2018-11-20 0:24 ` Tim Chen
2018-11-19 23:39 ` Dave Hansen
2018-11-19 23:49 ` Jiri Kosina
2018-11-20 0:02 ` Thomas Gleixner
2018-11-17 1:53 ` [Patch v5 12/16] x86/speculation: Create PRCTL interface to restrict indirect branch speculation Tim Chen
2018-11-17 9:53 ` Jiri Kosina
2018-11-19 18:29 ` Tim Chen
2018-11-17 1:53 ` [Patch v5 13/16] security: Update speculation restriction of a process when modifying its dumpability Tim Chen
2018-11-17 1:53 ` [Patch v5 14/16] x86/speculation: Use STIBP to restrict speculation on non-dumpable task Tim Chen
2018-11-17 1:53 ` [Patch v5 15/16] x86/speculation: Update comment on TIF_SSBD Tim Chen
2018-11-17 1:53 ` [Patch v5 16/16] x86: Group thread info flags by functionality Tim Chen
2018-11-17 9:34 ` [Patch v5 00/16] Provide task property based options to enable Spectre v2 userspace-userspace protection Jiri Kosina
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