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* [RFC v14 00/80] arm cleanup experiment for kvm-only build
@ 2021-04-16 16:27 Claudio Fontana
  2021-04-16 16:27 ` [RFC v14 01/80] target/arm: move translate modules to tcg/ Claudio Fontana
                   ` (79 more replies)
  0 siblings, 80 replies; 94+ messages in thread
From: Claudio Fontana @ 2021-04-16 16:27 UTC (permalink / raw)
  To: Peter Maydell, Philippe Mathieu-Daudé,
	Richard Henderson, Alex Bennée
  Cc: Paolo Bonzini, Roman Bolshakov, Claudio Fontana, Eduardo Habkost,
	qemu-devel

Here a new version of the series that enables kvm-only builds.

The goal here is to enable the KVM-only build, but there is
some additional cleanup too.

Comments welcome, thanks,

Ciao, C

v13 -> v14: minor fixes

* rebased on latest master + i386_cleanup fixing a minor conflict

* "target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication"
  - fix bug in intermediate series state, during the patch split
    (return value did not match function signature).

v12 -> v13:

* "target/arm: tcg: add stubs for some helpers for non-tcg builds"
  - renamed helper-stubs.c to tcg-stubs.c 

* "target/arm: move arm_sctlr away from tcg helpers"
  - split change in two steps to separate the TARGET_AARCH64-only part
    
  - added a new patch that uses is_a64(env) instead of TARGET_AARCH64,
    assuming the protected part is AArch64-only code.

* "target/arm: split a15 cpu model and 32bit class functions to cpu32.c"
  - split the patch into three :
  
  "target/arm: new cpu32 ARM 32 bit CPU Class"
  "target/arm: split 32bit and 64bit arm dump state"
  "target/arm: move a15 cpu model away from the TCG-only models"

* "target/arm: tcg: add stubs for some helpers for non-tcg builds"
  - removed the fp_exception_el stub 
  - added three patches:

  "target/arm: fix comments style of fp_exception_el before moving it"
  "target/arm: move fp_exception_el out of TCG helpers" 
  "target/arm: remove now useless ifndef from fp_exception_el"

* "target/arm: move exception code out of tcg/helper.c"
  - add new preparation patch:
  "target/arm: make further preparation for the exception code to move"
  

  - added new post-move patch:
  "target/arm: rename handle_semihosting to tcg_handle_semihosting"

* "target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/"
  - added new patch that updates arm kvm maintainer to all of kvm:
  "MAINTAINERS: update arm kvm maintained files to all in target/arm/kvm/"
  

* "target/arm: remove broad "else" statements when checking accels"
  - use "else if" in cpu_pre_save when checking accelerators 

* "target/arm: cpu-sve: new module"
  - change commit message 
  - split the renames into new patch: 
  "target/arm: cpu-sve: rename functions according to module prefix"

* "target/arm: cpu-sve: split TCG and KVM functionality"
  - split the name change to a new patch :
  "target/arm: cpu-sve: make cpu_sve_finalize_features return bool"

* "target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64"
  - use QEMU_ERROR if function not elided 
  - mention the need of this for future changes 

* "target/arm: cpu-exceptions: new module"
  - move less code. Only the actual exception handling code is moved.
  - mention that -aa64.c requires the previous A64 restrictions

* "target/arm: tcg-sve: import narrow_vq and change_el functions"
  - update stale comment. 

* "target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication"
  - separate rename and sig change in a separate patch:
  "target/arm: cpu-pauth: change arm_cpu_pauth_finalize name and sig"

* "cpu-sve: rename sve_zcr_len_for_el to cpu_sve_get_zcr_len_for_el"
  - reordered to just after the move of the function

* "target/arm: move arm_cpu_finalize_features into cpu64"
  - split rename and additional post-move changes into separate patches:
  "target/arm: cpu64: rename arm_cpu_finalize_features"
  "target/arm: cpu64: some final cleanup on aarch64_cpu_finalize_features"

* "target/arm: remove v7m stub function for !CONFIG_TCG"
  - use tcg_enabled() instead of CONFIG_TCG









v11 ->v12:

* reordered additions to meson files, sorting alphabetically.

* renamed the accel-specific cpu_sve modules to tcg_sve and kvm_sve.

* added sve_zcr_len_for_el() to cpu_sve, then renamed.
  It is now made TARGET_AARCH64-only, thanks to preceding changes.

* added aarch64_sve_narrow_vq() and _change_el() to tcg_sve, then renamed.

* "target/arm: tcg: add sysemu and user subdirs"
  - remove redundant meson check for CONFIG_SOFTMMU and CONFIG_USER_ONLY

* "cpu-mmu: fix comment style"
* "target/arm: cpregs: fix style (mostly just comments)"
* "target/arm: cpu: fix style"
  - reordered comment and style changes to before the code moves.

* "target/arm: split cpregs from tcg/helper.c"
  - take also the cpregs definitions ARM_CP_.. from cpu.h into cpregs.h

* "kvm: add stubs for some helpers"
  - move the stubs in tcg/ , to be used by all non-TCG accels

* "target/arm: move arm_sctlr away from tcg helpers"
  - added #ifdef TARGET_AARCH64 for the specific part of the function

* "target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code"
  - removed whitespace

* "target/arm: split a15 cpu model and 32bit class functions to cpu32.c"
  - fixed missing dispatch for aarch64/aarch32

* "target/arm: refactor exception and cpu code"
  - split into multiple patches

* "target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/"
  - split into multiple patches

* "target/arm: remove broad "else" statements when checking accels"
  - added "else if"s when checking for accelerators

* "target/arm: arch_dump: restrict ELFCLASS64 to AArch64"
  - split into multiple patches


v10 ->v11:

* "target/arm: tcg: split mte_helper user-only and sysemu code" (new)
* "target/arm: tcg: move sysemu-only parts of debug_helper" (new)
* "target/arm: tcg: split tlb_helper user-only and sysemu-only parts" (new)
* "target/arm: tcg: split m_helper user-only and sysemu-only parts: (new)
* "target/arm: tcg: remove superfluous CONFIG_TCG check" (new)
* "target/arm: remove v7m stub function for !CONFIG_TCG" (new)
* "target/arm: add tcg cpu accel class"

 - removed the asserts for tcg_arm_init_accel_cpu, as they break for "enable-all" builds
   which include both TCG and KVM.

v9 -> v10:

* "target/arm: create kvm cpu accel class"
 - add accel_cpu::cpu_reset to kvm-cpu

* "target/arm: add tcg cpu accel class"
 - add accel_cpu::cpu_reset to tcg-cpu

* 'XXX target/arm: experiment refactoring cpu "max"'
 - new tentative RFC for discussion

v8 -> v9:
* added: "make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64"
* added: "arch_dump: restrict ELFCLASS64 to AArch64"
* added: "cpu-exceptions: new module"
* added: "tcg: restrict ZCR cpregs to TARGET_AARCH64"
* added: "cpu-pauth: new module for ARMv8.3 Pointer Authentication"
* added: "refactor arm_cpu_finalize_features into cpu64"

v7 -> v8:
* added split of SVE CPU properties code from cpu into cpu-sve.
* added split of cpu-sve into tcg/cpu-sve and kvm/cpu-sve.

v6 -> v7:
* added tcg accel-cpu, experiment with improving the setting of the
  TCGOps, as discussed at:
  https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg04315.html

v5 -> v6:
* rebased on latest master, adapted to arm changes

* needed to restore the cortex-a15 cpu,
  moving it away from the TCG-only cpu file. This is a partial
  revert of commit "target/arm: Restrict TCG cpus to TCG accel"

* added first patches that create the kvm cpu accel class

v4 -> v5:
* fixed other remaining tests for kvm-only build
* rebased on latest target/arm changes (painful)
* reverted Philippe's IDAU v8m change

v3 -> v4:

* added style cleanup patches

* added header cleanup

* added basic move of simple KVM-only code to kvm/

* fixed some qtest failures due to existing:

  if (kvm_enabled) {
  
  } else {

  }

  which needed explicit if qtest_enabled() in addition to tcg_enabled() check

* include 32bit cpus for AArch64 too.

v2 -> v3:

* "target/arm: tcg: add sysemu and user subsirs"
  - new standalone patch to create the empty tcg/sysemu and tcg/user subdirs.

* "target/arm: only build psci for TCG"
  - do not move psci inside tcg/ directory, because HVF might use it soon.
    (Peter)

* "target/arm: move physical address translation"
  - change the module name from "get-phys-addr" to "cpu-mmu",
    which includes aa64_va_parameter in this patch, and that
    will also contain the get_mmu_idx* functions later in the series.
    

* "target/arm: split cpregs from tcg/helper.c"
  - moved raw_read and raw_write to cpregs.h 

* "target/arm: only perform TCG cpu and machine inits if TCG enabled"
  - add an explanatory comment before the kvm function for cpreg list init
  - change the use of g_renew to g_new, since we do not do the double
    initialization of cpreg list anymore.

* "target/arm: add temporary stub for arm_rebuild_hflags"
  - use a if (tcg_enabled()) instead of #ifdef 

* "target/arm: split vfp state setting from tcg helpers"
  - explain better what goes where in the commit 

* "target/arm: move arm_mmu_idx*"
  - move the functions to cpu-mmu instead of get-phys-addr 

* "target/arm: move sve_zcr_len_for_el to common_cpu"

 - add a comment about those functions being in theory
   TARGET_AARCH64 specific, but making the change would spawn
   a large number of additional #ifdefs. This state predates this
   change .

* "target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code"

 - explain better why these functions are needed for KVM too 

* "target/arm: move sve_exception_el out of TCG helpers"

 - bring over the sve_exception_el code, making it available for KVM too.
   

* "target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()"

 - mention in the commit that this enables finally a build with
   configure --enable-kvm --disable-tcg


v1 -> v2: reworked of the whole series

In this v2, only the first two patches remain, the rest is
reworked.

Main reasons for the rework were:

1) moving out cpregs to its own module, leave the tcg-only part in tcg/

2) split of arm cpu32, cpu64 and cpu models. This is still not perfect,
   but I think it's an improvement.

3) import less stuff, that is actually unused or can be stubbed on KVM
   (thanks to the precious feedback on the previous RFCv1).

...

Main issues:

1) basically needs the "configure only machines compatible with KVM" from Philippe,
   so we can avoid some of the stubs.

2) tests/ work fine building with tcg or with tcg + kvm,
   but for making a kvm-only build pass the tests, more work is needed in tests/
   figuring out which tests are TCG-only and which need to be tweaked.

Thanks a lot for your comments!


. / . / . / . / . / . /


Hi all,

this is an experiment, a cleanup based on and requiring the series
"i386 cleanup PART 2":

https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg05935.html

The goal is to split the code between TCG-only and non-TCG code,
fixing the KVM-only build (configure --disable-tcg),

and laying the ground for further cleanups and the use of the
new accel objects in the hierarchy to specialize the cpu
according to the accelerator.

This is known to be an early state, with probably a lot of work
still needed.

I thought it could be useful to share early, especially in light
of the combination of this with Philippe's work on building
only the machines and devices compatible with KVM for arm.

Comments welcome, thanks,

Claudio


Claudio Fontana (80):
  target/arm: move translate modules to tcg/
  target/arm: move helpers to tcg/
  arm: tcg: only build under CONFIG_TCG
  target/arm: tcg: add sysemu and user subdirs
  target/arm: tcg: split mte_helper user-only and sysemu code
  target/arm: tcg: move sysemu-only parts of debug_helper
  target/arm: tcg: split tlb_helper user-only and sysemu-only parts
  target/arm: tcg: split m_helper user-only and sysemu-only parts
  target/arm: only build psci for TCG
  target/arm: split off cpu-sysemu.c
  target/arm: tcg: fix comment style before move to cpu-mmu
  target/arm: move physical address translation to cpu-mmu
  target/arm: fix style in preparation of new cpregs module
  target/arm: split cpregs from tcg/helper.c
  target/arm: move cpu definitions to common cpu module
  target/arm: only perform TCG cpu and machine inits if TCG enabled
  target/arm: tcg: add stubs for some helpers for non-tcg builds
  target/arm: move cpsr_read, cpsr_write to cpu_common
  target/arm: add temporary stub for arm_rebuild_hflags
  target/arm: move arm_hcr_el2_eff from tcg/ to common_cpu
  target/arm: split vfp state setting from tcg helpers
  target/arm: move arm_mmu_idx* to cpu-mmu
  target/arm: move sve_zcr_len_for_el to common_cpu
  target/arm: move arm_sctlr away from tcg helpers
  target/arm: move arm_cpu_list to common_cpu
  target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code
  target/arm: new cpu32 ARM 32 bit CPU Class
  target/arm: split 32bit and 64bit arm dump state
  target/arm: move a15 cpu model away from the TCG-only models
  target/arm: fixup sve_exception_el code style before move
  target/arm: move sve_exception_el out of TCG helpers
  target/arm: fix comments style of fp_exception_el before moving it
  target/arm: move fp_exception_el out of TCG helpers
  target/arm: remove now useless ifndef from fp_exception_el
  target/arm: make further preparation for the exception code to move
  target/arm: fix style of arm_cpu_do_interrupt functions before move
  target/arm: move exception code out of tcg/helper.c
  target/arm: rename handle_semihosting to tcg_handle_semihosting
  target/arm: replace CONFIG_TCG with tcg_enabled
  target/arm: move TCGCPUOps to tcg/tcg-cpu.c
  target/arm: move cpu_tcg to tcg/tcg-cpu-models.c
  target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
  target/arm: remove kvm include file for PSCI and arm-powerctl
  target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/
  MAINTAINERS: update arm kvm maintained files to all in target/arm/kvm/
  target/arm: cleanup cpu includes
  target/arm: remove broad "else" statements when checking accels
  target/arm: remove kvm-stub.c
  tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM
  tests: restrict TCG-only arm-cpu-features tests to TCG builds
  tests: do not run test-hmp on all machines for ARM KVM-only
  tests: device-introspect-test: cope with ARM TCG-only devices
  tests: do not run qom-test on all machines for ARM KVM-only
  Revert "target/arm: Restrict v8M IDAU to TCG"
  target/arm: create kvm cpu accel class
  target/arm: move kvm post init initialization to kvm cpu accel
  target/arm: add tcg cpu accel class
  target/arm: move TCG gt timer creation code in tcg/
  target/arm: cpu-sve: new module
  target/arm: cpu-sve: rename functions according to module prefix
  target/arm: cpu-sve: split TCG and KVM functionality
  target/arm: cpu-sve: make cpu_sve_finalize_features return bool
  target/arm: make is_aa64 and arm_el_is_aa64 a macro for
    !TARGET_AARCH64
  target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64
  target/arm: arch_dump: restrict ELFCLASS64 to AArch64
  target/arm: cpu-exceptions, cpu-exceptions-aa64: new modules
  target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64
  target/arm: tcg-sve: import narrow_vq and change_el functions
  target/arm: tcg-sve: rename the narrow_vq and change_el functions
  target/arm: move sve_zcr_len_for_el to TARGET_AARCH64-only cpu-sve
  cpu-sve: rename sve_zcr_len_for_el to cpu_sve_get_zcr_len_for_el
  target/arm: cpu-common: wrap a64-only check with is_a64
  target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication
  target/arm: cpu-pauth: change arm_cpu_pauth_finalize name and sig
  target/arm: move arm_cpu_finalize_features into cpu64
  target/arm: cpu64: rename arm_cpu_finalize_features
  target/arm: cpu64: some final cleanup on aarch64_cpu_finalize_features
  XXX target/arm: experiment refactoring cpu "max"
  target/arm: tcg: remove superfluous CONFIG_TCG check
  target/arm: remove v7m stub function for !CONFIG_TCG

 meson.build                                   |    3 +-
 target/arm/arm-powerctl.h                     |    2 -
 target/arm/cpregs.h                           |  515 ++
 target/arm/cpu-exceptions-aa64.h              |   28 +
 target/arm/cpu-mmu.h                          |  119 +
 target/arm/cpu-qom.h                          |    3 -
 target/arm/cpu-sve.h                          |   40 +
 target/arm/cpu-vfp.h                          |   29 +
 target/arm/cpu.h                              |  533 +-
 target/arm/cpu32.h                            |   32 +
 target/arm/helper-a64.h                       |    2 +
 target/arm/helper.h                           |    1 -
 target/arm/internals.h                        |   46 +-
 target/arm/{ => kvm}/kvm-consts.h             |    0
 target/arm/kvm/kvm-sve.h                      |   28 +
 target/arm/{ => kvm}/kvm_arm.h                |    0
 target/arm/kvm/trace.h                        |    1 +
 target/arm/tcg/cpu-pauth.h                    |   34 +
 target/arm/tcg/m_helper.h                     |   21 +
 target/arm/tcg/mte_helper.h                   |   53 +
 target/arm/{ => tcg}/op_addsub.h              |    0
 target/arm/tcg/tcg-cpu.h                      |   40 +
 target/arm/tcg/tcg-sve.h                      |   29 +
 target/arm/tcg/tlb_helper.h                   |   17 +
 target/arm/tcg/trace.h                        |    1 +
 target/arm/{ => tcg}/translate-a64.h          |    0
 target/arm/{ => tcg}/translate.h              |    0
 target/arm/{ => tcg}/vec_internal.h           |    0
 target/arm/trace.h                            |    1 -
 target/arm/{ => tcg}/a32-uncond.decode        |    0
 target/arm/{ => tcg}/a32.decode               |    0
 target/arm/{ => tcg}/m-nocp.decode            |    0
 target/arm/{ => tcg}/neon-dp.decode           |    0
 target/arm/{ => tcg}/neon-ls.decode           |    0
 target/arm/{ => tcg}/neon-shared.decode       |    0
 target/arm/{ => tcg}/sve.decode               |    0
 target/arm/{ => tcg}/t16.decode               |    0
 target/arm/{ => tcg}/t32.decode               |    0
 target/arm/{ => tcg}/vfp-uncond.decode        |    0
 target/arm/{ => tcg}/vfp.decode               |    0
 hw/arm/boot.c                                 |    5 +-
 hw/arm/pxa2xx.c                               |    1 +
 hw/arm/pxa2xx_pic.c                           |    1 +
 hw/arm/sbsa-ref.c                             |    2 +-
 hw/arm/virt-acpi-build.c                      |    2 +-
 hw/arm/virt.c                                 |    2 +-
 hw/arm/xlnx-versal.c                          |    2 +-
 hw/arm/xlnx-zynqmp.c                          |    2 +-
 hw/cpu/a15mpcore.c                            |    2 +-
 hw/intc/arm_gic_kvm.c                         |    2 +-
 hw/intc/arm_gicv3_cpuif.c                     |    1 +
 hw/intc/arm_gicv3_its_kvm.c                   |    2 +-
 hw/intc/arm_gicv3_kvm.c                       |    3 +-
 linux-user/syscall.c                          |    6 +-
 target/arm/arch_dump.c                        |   15 +-
 target/arm/arm-powerctl.c                     |    8 +-
 target/arm/cpregs.c                           |  377 +
 target/arm/cpu-common.c                       |  358 +
 target/arm/cpu-exceptions-aa64.c              |  277 +
 target/arm/cpu-exceptions.c                   |  445 ++
 target/arm/cpu-mmu-sysemu.c                   | 2307 ++++++
 target/arm/cpu-mmu.c                          |  215 +
 target/arm/cpu-sve.c                          |  323 +
 target/arm/cpu-sysemu.c                       |  482 ++
 target/arm/cpu-user.c                         |   46 +
 target/arm/cpu-vfp.c                          |   97 +
 target/arm/cpu.c                              |  765 +-
 target/arm/cpu32.c                            |  260 +
 target/arm/cpu64.c                            |  713 +-
 target/arm/cpustate-list.c                    |  146 +
 target/arm/gdbstub.c                          |    1 +
 target/arm/kvm-stub.c                         |   24 -
 target/arm/kvm/kvm-cpu.c                      |  128 +
 target/arm/kvm/kvm-sve.c                      |  118 +
 target/arm/{ => kvm}/kvm.c                    |   18 +-
 target/arm/{ => kvm}/kvm64.c                  |    0
 target/arm/machine.c                          |   39 +-
 target/arm/monitor.c                          |   10 +-
 target/arm/psci.c                             |    1 -
 target/arm/{helper.c => tcg/cpregs.c}         | 6180 +----------------
 target/arm/tcg/cpu-pauth.c                    |   66 +
 target/arm/tcg/cpu-vfp.c                      |  146 +
 target/arm/{ => tcg}/crypto_helper.c          |    0
 target/arm/{ => tcg}/debug_helper.c           |   27 -
 target/arm/{ => tcg}/helper-a64.c             |    3 +-
 target/arm/tcg/helper.c                       | 1286 ++++
 target/arm/{ => tcg}/iwmmxt_helper.c          |    0
 target/arm/tcg/m_helper.c                     |   93 +
 target/arm/{ => tcg}/mte_helper.c             |  191 +-
 target/arm/{ => tcg}/neon_helper.c            |    0
 target/arm/{ => tcg}/op_helper.c              |    1 +
 target/arm/{ => tcg}/pauth_helper.c           |    2 +-
 target/arm/{ => tcg}/sve_helper.c             |    0
 target/arm/tcg/sysemu/debug_helper.c          |   33 +
 target/arm/{ => tcg/sysemu}/m_helper.c        |  200 +-
 target/arm/tcg/sysemu/mte_helper.c            |  159 +
 target/arm/tcg/sysemu/tcg-cpu.c               |  119 +
 target/arm/tcg/sysemu/tlb_helper.c            |   84 +
 .../arm/{cpu_tcg.c => tcg/tcg-cpu-models.c}   |  162 +-
 target/arm/tcg/tcg-cpu.c                      |  502 ++
 target/arm/tcg/tcg-stubs.c                    |   21 +
 target/arm/tcg/tcg-sve.c                      |  167 +
 target/arm/{ => tcg}/tlb_helper.c             |   97 +-
 target/arm/{ => tcg}/translate-a64.c          |    1 +
 target/arm/{ => tcg}/translate-sve.c          |    0
 target/arm/{ => tcg}/translate.c              |    1 +
 target/arm/tcg/user/m_helper.c                |   97 +
 target/arm/tcg/user/mte_helper.c              |   57 +
 target/arm/tcg/user/tlb_helper.c              |   32 +
 target/arm/{ => tcg}/vec_helper.c             |    0
 target/arm/{ => tcg}/vfp_helper.c             |  216 +-
 tests/qtest/arm-cpu-features.c                |   15 +
 tests/qtest/bios-tables-test.c                |    7 +
 tests/qtest/device-introspect-test.c          |   18 +
 tests/qtest/qom-test.c                        |   20 +
 tests/qtest/test-hmp.c                        |   20 +
 target/arm/{ => tcg}/translate-neon.c.inc     |    0
 target/arm/{ => tcg}/translate-vfp.c.inc      |    0
 MAINTAINERS                                   |    2 +-
 target/arm/kvm/meson.build                    |    6 +
 target/arm/kvm/trace-events                   |    4 +
 target/arm/meson.build                        |   59 +-
 target/arm/tcg/meson.build                    |   50 +
 target/arm/tcg/sysemu/meson.build             |    7 +
 target/arm/{ => tcg}/trace-events             |    3 -
 target/arm/tcg/user/meson.build               |    5 +
 126 files changed, 10209 insertions(+), 8734 deletions(-)
 create mode 100644 target/arm/cpregs.h
 create mode 100644 target/arm/cpu-exceptions-aa64.h
 create mode 100644 target/arm/cpu-mmu.h
 create mode 100644 target/arm/cpu-sve.h
 create mode 100644 target/arm/cpu-vfp.h
 create mode 100644 target/arm/cpu32.h
 rename target/arm/{ => kvm}/kvm-consts.h (100%)
 create mode 100644 target/arm/kvm/kvm-sve.h
 rename target/arm/{ => kvm}/kvm_arm.h (100%)
 create mode 100644 target/arm/kvm/trace.h
 create mode 100644 target/arm/tcg/cpu-pauth.h
 create mode 100644 target/arm/tcg/m_helper.h
 create mode 100644 target/arm/tcg/mte_helper.h
 rename target/arm/{ => tcg}/op_addsub.h (100%)
 create mode 100644 target/arm/tcg/tcg-cpu.h
 create mode 100644 target/arm/tcg/tcg-sve.h
 create mode 100644 target/arm/tcg/tlb_helper.h
 create mode 100644 target/arm/tcg/trace.h
 rename target/arm/{ => tcg}/translate-a64.h (100%)
 rename target/arm/{ => tcg}/translate.h (100%)
 rename target/arm/{ => tcg}/vec_internal.h (100%)
 delete mode 100644 target/arm/trace.h
 rename target/arm/{ => tcg}/a32-uncond.decode (100%)
 rename target/arm/{ => tcg}/a32.decode (100%)
 rename target/arm/{ => tcg}/m-nocp.decode (100%)
 rename target/arm/{ => tcg}/neon-dp.decode (100%)
 rename target/arm/{ => tcg}/neon-ls.decode (100%)
 rename target/arm/{ => tcg}/neon-shared.decode (100%)
 rename target/arm/{ => tcg}/sve.decode (100%)
 rename target/arm/{ => tcg}/t16.decode (100%)
 rename target/arm/{ => tcg}/t32.decode (100%)
 rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
 rename target/arm/{ => tcg}/vfp.decode (100%)
 create mode 100644 target/arm/cpregs.c
 create mode 100644 target/arm/cpu-common.c
 create mode 100644 target/arm/cpu-exceptions-aa64.c
 create mode 100644 target/arm/cpu-exceptions.c
 create mode 100644 target/arm/cpu-mmu-sysemu.c
 create mode 100644 target/arm/cpu-mmu.c
 create mode 100644 target/arm/cpu-sve.c
 create mode 100644 target/arm/cpu-sysemu.c
 create mode 100644 target/arm/cpu-user.c
 create mode 100644 target/arm/cpu-vfp.c
 create mode 100644 target/arm/cpu32.c
 create mode 100644 target/arm/cpustate-list.c
 delete mode 100644 target/arm/kvm-stub.c
 create mode 100644 target/arm/kvm/kvm-cpu.c
 create mode 100644 target/arm/kvm/kvm-sve.c
 rename target/arm/{ => kvm}/kvm.c (98%)
 rename target/arm/{ => kvm}/kvm64.c (100%)
 rename target/arm/{helper.c => tcg/cpregs.c} (59%)
 create mode 100644 target/arm/tcg/cpu-pauth.c
 create mode 100644 target/arm/tcg/cpu-vfp.c
 rename target/arm/{ => tcg}/crypto_helper.c (100%)
 rename target/arm/{ => tcg}/debug_helper.c (92%)
 rename target/arm/{ => tcg}/helper-a64.c (99%)
 create mode 100644 target/arm/tcg/helper.c
 rename target/arm/{ => tcg}/iwmmxt_helper.c (100%)
 create mode 100644 target/arm/tcg/m_helper.c
 rename target/arm/{ => tcg}/mte_helper.c (77%)
 rename target/arm/{ => tcg}/neon_helper.c (100%)
 rename target/arm/{ => tcg}/op_helper.c (99%)
 rename target/arm/{ => tcg}/pauth_helper.c (99%)
 rename target/arm/{ => tcg}/sve_helper.c (100%)
 create mode 100644 target/arm/tcg/sysemu/debug_helper.c
 rename target/arm/{ => tcg/sysemu}/m_helper.c (94%)
 create mode 100644 target/arm/tcg/sysemu/mte_helper.c
 create mode 100644 target/arm/tcg/sysemu/tcg-cpu.c
 create mode 100644 target/arm/tcg/sysemu/tlb_helper.c
 rename target/arm/{cpu_tcg.c => tcg/tcg-cpu-models.c} (86%)
 create mode 100644 target/arm/tcg/tcg-cpu.c
 create mode 100644 target/arm/tcg/tcg-stubs.c
 create mode 100644 target/arm/tcg/tcg-sve.c
 rename target/arm/{ => tcg}/tlb_helper.c (56%)
 rename target/arm/{ => tcg}/translate-a64.c (99%)
 rename target/arm/{ => tcg}/translate-sve.c (100%)
 rename target/arm/{ => tcg}/translate.c (99%)
 create mode 100644 target/arm/tcg/user/m_helper.c
 create mode 100644 target/arm/tcg/user/mte_helper.c
 create mode 100644 target/arm/tcg/user/tlb_helper.c
 rename target/arm/{ => tcg}/vec_helper.c (100%)
 rename target/arm/{ => tcg}/vfp_helper.c (84%)
 rename target/arm/{ => tcg}/translate-neon.c.inc (100%)
 rename target/arm/{ => tcg}/translate-vfp.c.inc (100%)
 create mode 100644 target/arm/kvm/meson.build
 create mode 100644 target/arm/kvm/trace-events
 create mode 100644 target/arm/tcg/meson.build
 create mode 100644 target/arm/tcg/sysemu/meson.build
 rename target/arm/{ => tcg}/trace-events (85%)
 create mode 100644 target/arm/tcg/user/meson.build

-- 
2.26.2



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