From: Andy Chiu <andy.chiu@sifive.com>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
anup@brainfault.org, atishp@atishpatra.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
guoren@linux.alibaba.com, Vincent Chen <vincent.chen@sifive.com>,
Andy Chiu <andy.chiu@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>
Subject: [PATCH -next v19 18/24] riscv: kvm: Add V extension to KVM ISA
Date: Tue, 9 May 2023 10:30:27 +0000 [thread overview]
Message-ID: <20230509103033.11285-19-andy.chiu@sifive.com> (raw)
In-Reply-To: <20230509103033.11285-1-andy.chiu@sifive.com>
From: Vincent Chen <vincent.chen@sifive.com>
Add V extension to KVM isa extension list to enable supporting of V
extension on VCPUs.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Acked-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index f92790c9481a..8feb57c4c2e8 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -121,6 +121,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZICBOZ,
KVM_RISCV_ISA_EXT_ZBB,
KVM_RISCV_ISA_EXT_SSAIA,
+ KVM_RISCV_ISA_EXT_V,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 8bd9f2a8a0b9..f3282ff371ca 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -57,6 +57,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
[KVM_RISCV_ISA_EXT_H] = RISCV_ISA_EXT_h,
[KVM_RISCV_ISA_EXT_I] = RISCV_ISA_EXT_i,
[KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m,
+ [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v,
KVM_ISA_EXT_ARR(SSAIA),
KVM_ISA_EXT_ARR(SSTC),
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Andy Chiu <andy.chiu@sifive.com>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
anup@brainfault.org, atishp@atishpatra.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org
Cc: vineetg@rivosinc.com, greentime.hu@sifive.com,
guoren@linux.alibaba.com, Vincent Chen <vincent.chen@sifive.com>,
Andy Chiu <andy.chiu@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>
Subject: [PATCH -next v19 18/24] riscv: kvm: Add V extension to KVM ISA
Date: Tue, 9 May 2023 10:30:27 +0000 [thread overview]
Message-ID: <20230509103033.11285-19-andy.chiu@sifive.com> (raw)
In-Reply-To: <20230509103033.11285-1-andy.chiu@sifive.com>
From: Vincent Chen <vincent.chen@sifive.com>
Add V extension to KVM isa extension list to enable supporting of V
extension on VCPUs.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Acked-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index f92790c9481a..8feb57c4c2e8 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -121,6 +121,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZICBOZ,
KVM_RISCV_ISA_EXT_ZBB,
KVM_RISCV_ISA_EXT_SSAIA,
+ KVM_RISCV_ISA_EXT_V,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 8bd9f2a8a0b9..f3282ff371ca 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -57,6 +57,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
[KVM_RISCV_ISA_EXT_H] = RISCV_ISA_EXT_h,
[KVM_RISCV_ISA_EXT_I] = RISCV_ISA_EXT_i,
[KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m,
+ [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v,
KVM_ISA_EXT_ARR(SSAIA),
KVM_ISA_EXT_ARR(SSTC),
--
2.17.1
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-05-09 10:33 UTC|newest]
Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-09 10:30 [PATCH -next v19 00/24] riscv: Add vector ISA support Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 01/24] riscv: Rename __switch_to_aux() -> fpu Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-16 2:47 ` Andy Chiu
2023-05-16 2:47 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 02/24] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 03/24] riscv: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_V Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 11:05 ` Heiko Stübner
2023-05-09 11:05 ` Heiko Stübner
2023-05-09 16:41 ` Andy Chiu
2023-05-09 16:41 ` Andy Chiu
2023-05-09 17:32 ` Evan Green
2023-05-09 17:32 ` Evan Green
2023-05-09 17:59 ` Palmer Dabbelt
2023-05-09 17:59 ` Palmer Dabbelt
2023-05-09 18:29 ` Evan Green
2023-05-09 18:29 ` Evan Green
2023-05-11 22:36 ` Palmer Dabbelt
2023-05-11 22:36 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 04/24] riscv: Add new csr defines related to vector extension Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-16 3:15 ` Andy Chiu
2023-05-16 3:15 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 05/24] riscv: Clear vector regfile on bootup Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 06/24] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 07/24] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 08/24] riscv: Introduce riscv_v_vsize to record size of Vector context Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-11 22:56 ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 09/24] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 10/24] riscv: Add task switch support for vector Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 11/24] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 12/24] riscv: Add ptrace vector support Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 13/24] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 14/24] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 15/24] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 16/24] riscv: signal: validate altstack to reflect Vector Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 17/24] riscv: prevent stack corruption by reserving task_pt_regs(p) early Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` Andy Chiu [this message]
2023-05-09 10:30 ` [PATCH -next v19 18/24] riscv: kvm: Add V extension to KVM ISA Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 19/24] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 20/24] riscv: Add prctl controls for userspace vector management Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 11:14 ` Heiko Stübner
2023-05-09 11:14 ` Heiko Stübner
2023-05-09 16:11 ` Andy Chiu
2023-05-09 16:11 ` Andy Chiu
2023-05-09 17:58 ` Palmer Dabbelt
2023-05-09 17:58 ` Palmer Dabbelt
2023-05-15 11:38 ` Björn Töpel
2023-05-15 11:38 ` Björn Töpel
2023-05-16 7:13 ` Andy Chiu
2023-05-16 7:13 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 21/24] riscv: Add sysctl to set the default vector rule for new processes Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-15 11:42 ` Björn Töpel
2023-05-15 11:42 ` Björn Töpel
2023-05-09 10:30 ` [PATCH -next v19 22/24] riscv: detect assembler support for .option arch Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 23/24] riscv: Enable Vector code to be built Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 12:34 ` Conor Dooley
2023-05-09 12:34 ` Conor Dooley
2023-05-09 16:04 ` Andy Chiu
2023-05-09 16:04 ` Andy Chiu
2023-05-09 16:53 ` Conor Dooley
2023-05-09 16:53 ` Conor Dooley
2023-05-09 20:59 ` Palmer Dabbelt
2023-05-09 20:59 ` Palmer Dabbelt
2023-05-09 21:06 ` Conor Dooley
2023-05-09 21:06 ` Conor Dooley
2023-05-15 12:04 ` Conor Dooley
2023-05-15 12:04 ` Conor Dooley
2023-05-09 22:14 ` kernel test robot
2023-05-09 22:14 ` kernel test robot
2023-05-09 10:30 ` [PATCH -next v19 24/24] riscv: Add documentation for Vector Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-15 11:41 ` Björn Töpel
2023-05-15 11:41 ` Björn Töpel
2023-05-09 20:59 ` [PATCH -next v19 00/24] riscv: Add vector ISA support Palmer Dabbelt
2023-05-09 20:59 ` Palmer Dabbelt
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