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From: Palmer Dabbelt <palmer@dabbelt.com>
To: andy.chiu@sifive.com
Cc: linux-riscv@lists.infradead.org, anup@brainfault.org,
	atishp@atishpatra.org, kvm-riscv@lists.infradead.org,
	kvm@vger.kernel.org, Vineet Gupta <vineetg@rivosinc.com>,
	greentime.hu@sifive.com, guoren@linux.alibaba.com,
	vincent.chen@sifive.com, hankuan.chen@sifive.com,
	andy.chiu@sifive.com, Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, guoren@kernel.org, nsaenzju@redhat.com,
	jszhang@kernel.org, Bjorn Topel <bjorn@rivosinc.com>,
	frederic@kernel.org, abrestic@rivosinc.com,
	heiko.stuebner@vrull.eu, alex@ghiti.fr, masahiroy@kernel.org
Subject: Re: [PATCH -next v19 06/24] riscv: Disable Vector Instructions for kernel itself
Date: Thu, 11 May 2023 15:56:39 -0700 (PDT)	[thread overview]
Message-ID: <mhng-6d02bea7-ef2c-4840-96e3-912bfac4ffc4@palmer-ri-x1c9a> (raw)
In-Reply-To: <20230509103033.11285-7-andy.chiu@sifive.com>

On Tue, 09 May 2023 03:30:15 PDT (-0700), andy.chiu@sifive.com wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> Disable vector instructions execution for kernel mode at its entrances.
> This helps find illegal uses of vector in the kernel space, which is
> similar to the fpu.
>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Co-developed-by: Vincent Chen <vincent.chen@sifive.com>
> Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
> Co-developed-by: Han-Kuan Chen <hankuan.chen@sifive.com>
> Signed-off-by: Han-Kuan Chen <hankuan.chen@sifive.com>
> Co-developed-by: Greentime Hu <greentime.hu@sifive.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> ---
> Changelog V19:
>  - Add description in commit msg (Heiko's suggestion on v17)
>
>  arch/riscv/kernel/entry.S |  6 +++---
>  arch/riscv/kernel/head.S  | 12 ++++++------
>  2 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
> index 3fbb100bc9e4..e9ae284a55c1 100644
> --- a/arch/riscv/kernel/entry.S
> +++ b/arch/riscv/kernel/entry.S
> @@ -48,10 +48,10 @@ _save_context:
>  	 * Disable user-mode memory access as it should only be set in the
>  	 * actual user copy routines.
>  	 *
> -	 * Disable the FPU to detect illegal usage of floating point in kernel
> -	 * space.
> +	 * Disable the FPU/Vector to detect illegal usage of floating point
> +	 * or vector in kernel space.
>  	 */
> -	li t0, SR_SUM | SR_FS
> +	li t0, SR_SUM | SR_FS_VS
>
>  	REG_L s0, TASK_TI_USER_SP(tp)
>  	csrrc s1, CSR_STATUS, t0
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 3fd6a4bd9c3e..e16bb2185d55 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -140,10 +140,10 @@ secondary_start_sbi:
>  	.option pop
>
>  	/*
> -	 * Disable FPU to detect illegal usage of
> -	 * floating point in kernel space
> +	 * Disable FPU & VECTOR to detect illegal usage of
> +	 * floating point or vector in kernel space
>  	 */
> -	li t0, SR_FS
> +	li t0, SR_FS_VS
>  	csrc CSR_STATUS, t0
>
>  	/* Set trap vector to spin forever to help debug */
> @@ -234,10 +234,10 @@ pmp_done:
>  .option pop
>
>  	/*
> -	 * Disable FPU to detect illegal usage of
> -	 * floating point in kernel space
> +	 * Disable FPU & VECTOR to detect illegal usage of
> +	 * floating point or vector in kernel space
>  	 */
> -	li t0, SR_FS
> +	li t0, SR_FS_VS
>  	csrc CSR_STATUS, t0
>
>  #ifdef CONFIG_RISCV_BOOT_SPINWAIT

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>

WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@dabbelt.com>
To: andy.chiu@sifive.com
Cc: linux-riscv@lists.infradead.org, anup@brainfault.org,
	atishp@atishpatra.org, kvm-riscv@lists.infradead.org,
	kvm@vger.kernel.org, Vineet Gupta <vineetg@rivosinc.com>,
	greentime.hu@sifive.com, guoren@linux.alibaba.com,
	vincent.chen@sifive.com, hankuan.chen@sifive.com,
	andy.chiu@sifive.com, Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, guoren@kernel.org, nsaenzju@redhat.com,
	jszhang@kernel.org, Bjorn Topel <bjorn@rivosinc.com>,
	frederic@kernel.org, abrestic@rivosinc.com,
	heiko.stuebner@vrull.eu, alex@ghiti.fr, masahiroy@kernel.org
Subject: Re: [PATCH -next v19 06/24] riscv: Disable Vector Instructions for kernel itself
Date: Thu, 11 May 2023 15:56:39 -0700 (PDT)	[thread overview]
Message-ID: <mhng-6d02bea7-ef2c-4840-96e3-912bfac4ffc4@palmer-ri-x1c9a> (raw)
In-Reply-To: <20230509103033.11285-7-andy.chiu@sifive.com>

On Tue, 09 May 2023 03:30:15 PDT (-0700), andy.chiu@sifive.com wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> Disable vector instructions execution for kernel mode at its entrances.
> This helps find illegal uses of vector in the kernel space, which is
> similar to the fpu.
>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Co-developed-by: Vincent Chen <vincent.chen@sifive.com>
> Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
> Co-developed-by: Han-Kuan Chen <hankuan.chen@sifive.com>
> Signed-off-by: Han-Kuan Chen <hankuan.chen@sifive.com>
> Co-developed-by: Greentime Hu <greentime.hu@sifive.com>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
> ---
> Changelog V19:
>  - Add description in commit msg (Heiko's suggestion on v17)
>
>  arch/riscv/kernel/entry.S |  6 +++---
>  arch/riscv/kernel/head.S  | 12 ++++++------
>  2 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
> index 3fbb100bc9e4..e9ae284a55c1 100644
> --- a/arch/riscv/kernel/entry.S
> +++ b/arch/riscv/kernel/entry.S
> @@ -48,10 +48,10 @@ _save_context:
>  	 * Disable user-mode memory access as it should only be set in the
>  	 * actual user copy routines.
>  	 *
> -	 * Disable the FPU to detect illegal usage of floating point in kernel
> -	 * space.
> +	 * Disable the FPU/Vector to detect illegal usage of floating point
> +	 * or vector in kernel space.
>  	 */
> -	li t0, SR_SUM | SR_FS
> +	li t0, SR_SUM | SR_FS_VS
>
>  	REG_L s0, TASK_TI_USER_SP(tp)
>  	csrrc s1, CSR_STATUS, t0
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 3fd6a4bd9c3e..e16bb2185d55 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -140,10 +140,10 @@ secondary_start_sbi:
>  	.option pop
>
>  	/*
> -	 * Disable FPU to detect illegal usage of
> -	 * floating point in kernel space
> +	 * Disable FPU & VECTOR to detect illegal usage of
> +	 * floating point or vector in kernel space
>  	 */
> -	li t0, SR_FS
> +	li t0, SR_FS_VS
>  	csrc CSR_STATUS, t0
>
>  	/* Set trap vector to spin forever to help debug */
> @@ -234,10 +234,10 @@ pmp_done:
>  .option pop
>
>  	/*
> -	 * Disable FPU to detect illegal usage of
> -	 * floating point in kernel space
> +	 * Disable FPU & VECTOR to detect illegal usage of
> +	 * floating point or vector in kernel space
>  	 */
> -	li t0, SR_FS
> +	li t0, SR_FS_VS
>  	csrc CSR_STATUS, t0
>
>  #ifdef CONFIG_RISCV_BOOT_SPINWAIT

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>

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linux-riscv mailing list
linux-riscv@lists.infradead.org
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  reply	other threads:[~2023-05-11 22:56 UTC|newest]

Thread overview: 110+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-09 10:30 [PATCH -next v19 00/24] riscv: Add vector ISA support Andy Chiu
2023-05-09 10:30 ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 01/24] riscv: Rename __switch_to_aux() -> fpu Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-11 22:56   ` Palmer Dabbelt
2023-05-11 22:56     ` Palmer Dabbelt
2023-05-16  2:47     ` Andy Chiu
2023-05-16  2:47       ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 02/24] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-11 22:56   ` Palmer Dabbelt
2023-05-11 22:56     ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 03/24] riscv: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_V Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 11:05   ` Heiko Stübner
2023-05-09 11:05     ` Heiko Stübner
2023-05-09 16:41     ` Andy Chiu
2023-05-09 16:41       ` Andy Chiu
2023-05-09 17:32       ` Evan Green
2023-05-09 17:32         ` Evan Green
2023-05-09 17:59         ` Palmer Dabbelt
2023-05-09 17:59           ` Palmer Dabbelt
2023-05-09 18:29           ` Evan Green
2023-05-09 18:29             ` Evan Green
2023-05-11 22:36             ` Palmer Dabbelt
2023-05-11 22:36               ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 04/24] riscv: Add new csr defines related to vector extension Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-11 22:56   ` Palmer Dabbelt
2023-05-11 22:56     ` Palmer Dabbelt
2023-05-16  3:15     ` Andy Chiu
2023-05-16  3:15       ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 05/24] riscv: Clear vector regfile on bootup Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-11 22:56   ` Palmer Dabbelt
2023-05-11 22:56     ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 06/24] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-11 22:56   ` Palmer Dabbelt [this message]
2023-05-11 22:56     ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 07/24] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-11 22:56   ` Palmer Dabbelt
2023-05-11 22:56     ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 08/24] riscv: Introduce riscv_v_vsize to record size of Vector context Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-11 22:56   ` Palmer Dabbelt
2023-05-11 22:56     ` Palmer Dabbelt
2023-05-09 10:30 ` [PATCH -next v19 09/24] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 10/24] riscv: Add task switch support for vector Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 11/24] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 12/24] riscv: Add ptrace vector support Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 13/24] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 14/24] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 15/24] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 16/24] riscv: signal: validate altstack to reflect Vector Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 17/24] riscv: prevent stack corruption by reserving task_pt_regs(p) early Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 18/24] riscv: kvm: Add V extension to KVM ISA Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 19/24] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 20/24] riscv: Add prctl controls for userspace vector management Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 11:14   ` Heiko Stübner
2023-05-09 11:14     ` Heiko Stübner
2023-05-09 16:11     ` Andy Chiu
2023-05-09 16:11       ` Andy Chiu
2023-05-09 17:58     ` Palmer Dabbelt
2023-05-09 17:58       ` Palmer Dabbelt
2023-05-15 11:38   ` Björn Töpel
2023-05-15 11:38     ` Björn Töpel
2023-05-16  7:13     ` Andy Chiu
2023-05-16  7:13       ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 21/24] riscv: Add sysctl to set the default vector rule for new processes Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-15 11:42   ` Björn Töpel
2023-05-15 11:42     ` Björn Töpel
2023-05-09 10:30 ` [PATCH -next v19 22/24] riscv: detect assembler support for .option arch Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 10:30 ` [PATCH -next v19 23/24] riscv: Enable Vector code to be built Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-09 12:34   ` Conor Dooley
2023-05-09 12:34     ` Conor Dooley
2023-05-09 16:04     ` Andy Chiu
2023-05-09 16:04       ` Andy Chiu
2023-05-09 16:53       ` Conor Dooley
2023-05-09 16:53         ` Conor Dooley
2023-05-09 20:59         ` Palmer Dabbelt
2023-05-09 20:59           ` Palmer Dabbelt
2023-05-09 21:06           ` Conor Dooley
2023-05-09 21:06             ` Conor Dooley
2023-05-15 12:04             ` Conor Dooley
2023-05-15 12:04               ` Conor Dooley
2023-05-09 22:14   ` kernel test robot
2023-05-09 22:14     ` kernel test robot
2023-05-09 10:30 ` [PATCH -next v19 24/24] riscv: Add documentation for Vector Andy Chiu
2023-05-09 10:30   ` Andy Chiu
2023-05-15 11:41   ` Björn Töpel
2023-05-15 11:41     ` Björn Töpel
2023-05-09 20:59 ` [PATCH -next v19 00/24] riscv: Add vector ISA support Palmer Dabbelt
2023-05-09 20:59   ` Palmer Dabbelt

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