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From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com,
	lorenzo.pieralisi@arm.com, jingoohan1@gmail.com
Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v3 4/7] PCI: imx6: move the clock disable function to a proper place
Date: Fri, 22 Oct 2021 15:12:27 +0800	[thread overview]
Message-ID: <1634886750-13861-5-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634886750-13861-1-git-send-email-hongxing.zhu@nxp.com>

Just move the imx6_pcie_clk_disable() to a proper place without function
changes, since it wouldn't be only used in imx6_pcie_suspend_noirq() later.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 46 +++++++++++++--------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 39a485bfc676..b752a673e767 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -514,6 +514,29 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
 	return ret;
 }
 
+static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
+{
+	clk_disable_unprepare(imx6_pcie->pcie);
+	clk_disable_unprepare(imx6_pcie->pcie_phy);
+	clk_disable_unprepare(imx6_pcie->pcie_bus);
+
+	switch (imx6_pcie->drvdata->variant) {
+	case IMX6SX:
+		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
+		break;
+	case IMX7D:
+		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
+		break;
+	case IMX8MQ:
+		clk_disable_unprepare(imx6_pcie->pcie_aux);
+		break;
+	default:
+		break;
+	}
+}
+
 static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
 {
 	u32 val;
@@ -939,29 +962,6 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
 	usleep_range(1000, 10000);
 }
 
-static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
-{
-	clk_disable_unprepare(imx6_pcie->pcie);
-	clk_disable_unprepare(imx6_pcie->pcie_phy);
-	clk_disable_unprepare(imx6_pcie->pcie_bus);
-
-	switch (imx6_pcie->drvdata->variant) {
-	case IMX6SX:
-		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
-		break;
-	case IMX7D:
-		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
-		break;
-	case IMX8MQ:
-		clk_disable_unprepare(imx6_pcie->pcie_aux);
-		break;
-	default:
-		break;
-	}
-}
-
 static int imx6_pcie_suspend_noirq(struct device *dev)
 {
 	struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com,
	lorenzo.pieralisi@arm.com, jingoohan1@gmail.com
Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v3 4/7] PCI: imx6: move the clock disable function to a proper place
Date: Fri, 22 Oct 2021 15:12:27 +0800	[thread overview]
Message-ID: <1634886750-13861-5-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634886750-13861-1-git-send-email-hongxing.zhu@nxp.com>

Just move the imx6_pcie_clk_disable() to a proper place without function
changes, since it wouldn't be only used in imx6_pcie_suspend_noirq() later.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 46 +++++++++++++--------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 39a485bfc676..b752a673e767 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -514,6 +514,29 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie)
 	return ret;
 }
 
+static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
+{
+	clk_disable_unprepare(imx6_pcie->pcie);
+	clk_disable_unprepare(imx6_pcie->pcie_phy);
+	clk_disable_unprepare(imx6_pcie->pcie_bus);
+
+	switch (imx6_pcie->drvdata->variant) {
+	case IMX6SX:
+		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
+		break;
+	case IMX7D:
+		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
+				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
+		break;
+	case IMX8MQ:
+		clk_disable_unprepare(imx6_pcie->pcie_aux);
+		break;
+	default:
+		break;
+	}
+}
+
 static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
 {
 	u32 val;
@@ -939,29 +962,6 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
 	usleep_range(1000, 10000);
 }
 
-static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
-{
-	clk_disable_unprepare(imx6_pcie->pcie);
-	clk_disable_unprepare(imx6_pcie->pcie_phy);
-	clk_disable_unprepare(imx6_pcie->pcie_bus);
-
-	switch (imx6_pcie->drvdata->variant) {
-	case IMX6SX:
-		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
-		break;
-	case IMX7D:
-		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
-				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
-		break;
-	case IMX8MQ:
-		clk_disable_unprepare(imx6_pcie->pcie_aux);
-		break;
-	default:
-		break;
-	}
-}
-
 static int imx6_pcie_suspend_noirq(struct device *dev)
 {
 	struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
-- 
2.25.1


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  parent reply	other threads:[~2021-10-22  7:38 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-22  7:12 [PATCH v3 0/7] PCI: imx6: refine codes and add compliance tests mode support Richard Zhu
2021-10-22  7:12 ` Richard Zhu
2021-10-22  7:12 ` [PATCH v3 1/7] PCI: imx6: Encapsulate the clock enable into one standalone function Richard Zhu
2021-10-22  7:12   ` Richard Zhu
2021-10-22  7:12 ` [PATCH v3 2/7] PCI: imx6: Add the error propagation from host_init Richard Zhu
2021-10-22  7:12   ` Richard Zhu
2021-10-22  7:12 ` [PATCH v3 3/7] PCI: imx6: Fix the regulator dump when link never came up Richard Zhu
2021-10-22  7:12   ` Richard Zhu
2021-10-25 11:13   ` Francesco Dolcini
2021-10-25 11:13     ` Francesco Dolcini
2021-10-25 11:23     ` Mark Brown
2021-10-25 11:23       ` Mark Brown
2021-10-26  2:18       ` Richard Zhu
2021-10-26  2:18         ` Richard Zhu
2021-10-26  8:52         ` Francesco Dolcini
2021-10-26  8:52           ` Francesco Dolcini
2021-10-26  9:06           ` Richard Zhu
2021-10-26  9:06             ` Richard Zhu
2021-10-26  9:11             ` Francesco Dolcini
2021-10-26  9:11               ` Francesco Dolcini
2021-10-26  9:18               ` Richard Zhu
2021-10-26  9:18                 ` Richard Zhu
2021-10-26  9:48                 ` Francesco Dolcini
2021-10-26  9:48                   ` Francesco Dolcini
2021-10-28  6:48                   ` Richard Zhu
2021-10-28  6:48                     ` Richard Zhu
2021-10-26 10:58         ` Mark Brown
2021-10-26 10:58           ` Mark Brown
2021-10-28  6:50           ` Richard Zhu
2021-10-28  6:50             ` Richard Zhu
2021-10-28 11:50             ` Mark Brown
2021-10-28 11:50               ` Mark Brown
2021-10-29  3:58               ` Richard Zhu
2021-10-29  3:58                 ` Richard Zhu
2021-10-29 11:46                 ` Mark Brown
2021-10-29 11:46                   ` Mark Brown
2021-11-01  1:46                   ` Richard Zhu
2021-11-01  1:46                     ` Richard Zhu
2021-10-26  1:57     ` Richard Zhu
2021-10-26  1:57       ` Richard Zhu
2021-10-22  7:12 ` Richard Zhu [this message]
2021-10-22  7:12   ` [PATCH v3 4/7] PCI: imx6: move the clock disable function to a proper place Richard Zhu
2021-10-22  7:12 ` [PATCH v3 5/7] PCI: dwc: add a new callback host exit function into host ops Richard Zhu
2021-10-22  7:12   ` Richard Zhu
2021-10-22  7:12 ` [PATCH v3 6/7] PCI: imx6: Fix the reference handling unbalance when link never came up Richard Zhu
2021-10-22  7:12   ` Richard Zhu
2021-10-22  7:12 ` [PATCH v3 7/7] PCI: imx6: Add the compliance tests mode support Richard Zhu
2021-10-22  7:12   ` Richard Zhu

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