From: mark.rutland@arm.com (Mark Rutland) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 7/7] arm64: Enable CONFIG_ARM64_TTBR0_PAN Date: Fri, 2 Sep 2016 16:47:17 +0100 [thread overview] Message-ID: <20160902154716.GA17347@leverpostej> (raw) In-Reply-To: <1472828533-28197-8-git-send-email-catalin.marinas@arm.com> On Fri, Sep 02, 2016 at 04:02:13PM +0100, Catalin Marinas wrote: > This patch adds the Kconfig option to enable support for TTBR0 PAN. The > option is default off because of a slight performance hit when enabled, > caused by the additional TTBR0_EL1 switching during user access > operations or exception entry/exit code. > > Cc: Will Deacon <will.deacon@arm.com> > Cc: James Morse <james.morse@arm.com> > Cc: Kees Cook <keescook@chromium.org> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > --- > arch/arm64/Kconfig | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index bc3f00f586f1..3fb9a6ce464d 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -785,6 +785,14 @@ config SETEND_EMULATION > If unsure, say Y > endif > > +config ARM64_TTBR0_PAN > + bool "Priviledged Access Never using TTBR0_EL1 switching" Minor nit/bikeshed, but could we follow the example of arch/arm's SW_DOMAIN_PAN and call this ARM64_SW_TTRBR0_PAN, prepending "Emulate " to the dsecription? That makes it very clear that this is a SW feature, rather than using the real PAN, but only on TTBR0. Thanks, Mark. > + help > + Enabling this option prevents the kernel from accessing > + user-space memory directly by pointing TTBR0_EL1 to a reserved > + zeroed area and reserved ASID. The user access routines > + restore the valid TTBR0_EL1 temporarily. > + > menu "ARMv8.1 architectural features" > > config ARM64_HW_AFDBM > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >
WARNING: multiple messages have this Message-ID (diff)
From: Mark Rutland <mark.rutland@arm.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: linux-arm-kernel@lists.infradead.org, AKASHI Takahiro <takahiro.akashi@linaro.org>, Will Deacon <will.deacon@arm.com>, James Morse <james.morse@arm.com>, Kees Cook <keescook@chromium.org>, kernel-hardening@lists.openwall.com Subject: [kernel-hardening] Re: [PATCH v2 7/7] arm64: Enable CONFIG_ARM64_TTBR0_PAN Date: Fri, 2 Sep 2016 16:47:17 +0100 [thread overview] Message-ID: <20160902154716.GA17347@leverpostej> (raw) In-Reply-To: <1472828533-28197-8-git-send-email-catalin.marinas@arm.com> On Fri, Sep 02, 2016 at 04:02:13PM +0100, Catalin Marinas wrote: > This patch adds the Kconfig option to enable support for TTBR0 PAN. The > option is default off because of a slight performance hit when enabled, > caused by the additional TTBR0_EL1 switching during user access > operations or exception entry/exit code. > > Cc: Will Deacon <will.deacon@arm.com> > Cc: James Morse <james.morse@arm.com> > Cc: Kees Cook <keescook@chromium.org> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > --- > arch/arm64/Kconfig | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index bc3f00f586f1..3fb9a6ce464d 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -785,6 +785,14 @@ config SETEND_EMULATION > If unsure, say Y > endif > > +config ARM64_TTBR0_PAN > + bool "Priviledged Access Never using TTBR0_EL1 switching" Minor nit/bikeshed, but could we follow the example of arch/arm's SW_DOMAIN_PAN and call this ARM64_SW_TTRBR0_PAN, prepending "Emulate " to the dsecription? That makes it very clear that this is a SW feature, rather than using the real PAN, but only on TTBR0. Thanks, Mark. > + help > + Enabling this option prevents the kernel from accessing > + user-space memory directly by pointing TTBR0_EL1 to a reserved > + zeroed area and reserved ASID. The user access routines > + restore the valid TTBR0_EL1 temporarily. > + > menu "ARMv8.1 architectural features" > > config ARM64_HW_AFDBM > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >
next prev parent reply other threads:[~2016-09-02 15:47 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-02 15:02 [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-05 15:38 ` Mark Rutland 2016-09-05 15:38 ` [kernel-hardening] " Mark Rutland 2016-09-12 14:52 ` Catalin Marinas 2016-09-12 14:52 ` [kernel-hardening] " Catalin Marinas 2016-09-12 15:09 ` Mark Rutland 2016-09-12 15:09 ` [kernel-hardening] " Mark Rutland 2016-09-12 16:26 ` Catalin Marinas 2016-09-12 16:26 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 2/7] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-05 16:11 ` Mark Rutland 2016-09-05 16:11 ` [kernel-hardening] " Mark Rutland 2016-09-02 15:02 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} functionality based on TTBR0_EL1 Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] [PATCH v2 3/7] arm64: Introduce uaccess_{disable,enable} " Catalin Marinas 2016-09-05 17:20 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} " Mark Rutland 2016-09-05 17:20 ` [kernel-hardening] " Mark Rutland 2016-09-06 10:27 ` Catalin Marinas 2016-09-06 10:27 ` [kernel-hardening] " Catalin Marinas 2016-09-06 10:45 ` Mark Rutland 2016-09-06 10:45 ` [kernel-hardening] " Mark Rutland 2016-09-11 13:55 ` Ard Biesheuvel 2016-09-11 13:55 ` Ard Biesheuvel 2016-09-12 9:32 ` Catalin Marinas 2016-09-12 9:32 ` Catalin Marinas 2016-09-09 17:15 ` Catalin Marinas 2016-09-09 17:15 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 4/7] arm64: Disable TTBR0_EL1 during normal kernel execution Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-06 17:31 ` Mark Rutland 2016-09-06 17:31 ` [kernel-hardening] " Mark Rutland 2016-09-02 15:02 ` [PATCH v2 5/7] arm64: Handle faults caused by inadvertent user access with PAN enabled Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 6/7] arm64: xen: Enable user access before a privcmd hvc call Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 7/7] arm64: Enable CONFIG_ARM64_TTBR0_PAN Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:47 ` Mark Rutland [this message] 2016-09-02 15:47 ` [kernel-hardening] " Mark Rutland 2016-09-07 23:20 ` [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Kees Cook 2016-09-07 23:20 ` [kernel-hardening] " Kees Cook 2016-09-08 12:51 ` Catalin Marinas 2016-09-08 12:51 ` [kernel-hardening] " Catalin Marinas 2016-09-08 15:50 ` Kees Cook 2016-09-08 15:50 ` [kernel-hardening] " Kees Cook 2016-09-09 16:31 ` Mark Rutland 2016-09-09 16:31 ` [kernel-hardening] " Mark Rutland 2016-09-09 18:24 ` Kees Cook 2016-09-09 18:24 ` [kernel-hardening] " Kees Cook 2016-09-09 23:40 ` [kernel-hardening] " David Brown 2016-09-09 23:40 ` David Brown 2016-09-10 9:51 ` Catalin Marinas 2016-09-10 9:51 ` [kernel-hardening] " Catalin Marinas 2016-09-10 10:56 ` Ard Biesheuvel 2016-09-10 10:56 ` [kernel-hardening] " Ard Biesheuvel 2016-09-11 12:16 ` Catalin Marinas 2016-09-11 12:16 ` [kernel-hardening] " Catalin Marinas
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