From: mark.rutland@arm.com (Mark Rutland) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Date: Mon, 5 Sep 2016 16:38:28 +0100 [thread overview] Message-ID: <20160905153828.GA27305@leverpostej> (raw) In-Reply-To: <1472828533-28197-2-git-send-email-catalin.marinas@arm.com> Hi Catalin, On Fri, Sep 02, 2016 at 04:02:07PM +0100, Catalin Marinas wrote: > This patch moves the directly coded alternatives for turning PAN on/off > into separate uaccess_{enable,disable} macros or functions. The asm > macros take a few arguments which will be used in subsequent patches. > > Cc: Will Deacon <will.deacon@arm.com> > Cc: James Morse <james.morse@arm.com> > Cc: Kees Cook <keescook@chromium.org> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > --- > arch/arm64/include/asm/futex.h | 14 ++++----- > arch/arm64/include/asm/uaccess.h | 55 ++++++++++++++++++++++++++++++------ > arch/arm64/kernel/armv8_deprecated.c | 10 +++---- > arch/arm64/lib/clear_user.S | 8 ++---- > arch/arm64/lib/copy_from_user.S | 8 ++---- > arch/arm64/lib/copy_in_user.S | 8 ++---- > arch/arm64/lib/copy_to_user.S | 8 ++---- > 7 files changed, 71 insertions(+), 40 deletions(-) > > diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h > index f2585cdd32c2..7e5f236093be 100644 > --- a/arch/arm64/include/asm/futex.h > +++ b/arch/arm64/include/asm/futex.h > @@ -27,9 +27,9 @@ > #include <asm/sysreg.h> > > #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \ > +do { \ > + uaccess_enable(ARM64_HAS_PAN); \ > asm volatile( \ > - ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, \ > - CONFIG_ARM64_PAN) \ > " prfm pstl1strm, %2\n" \ > "1: ldxr %w1, %2\n" \ > insn "\n" \ > @@ -44,11 +44,11 @@ > " .popsection\n" \ > _ASM_EXTABLE(1b, 4b) \ > _ASM_EXTABLE(2b, 4b) \ > - ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, \ > - CONFIG_ARM64_PAN) \ > : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \ > : "r" (oparg), "Ir" (-EFAULT) \ > - : "memory") > + : "memory"); \ > + uaccess_disable(ARM64_HAS_PAN); \ > +} while (0) It might be worth noting in the commit message that this change means that any memory accesses the compiler decides to spill between uaccess_* calls and the main asm block are unprotected, but that's unlikely to be an issue in practice. [...] > /* > + * User access enabling/disabling. > + */ > +#define uaccess_disable(alt) \ > +do { \ > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \ > + CONFIG_ARM64_PAN)); \ > +} while (0) > + > +#define uaccess_enable(alt) \ > +do { \ > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \ > + CONFIG_ARM64_PAN)); \ > +} while (0) Passing the alternative down is somewhat confusing. e.g. in the futex case it looks like we're only doing something when PAN is present, whereas we'll manipulate TTBR0 in the absence of PAN. If I've understood correctly, we need this to distinguish regular load/store uaccess sequences (eg. the futex code) from potentially patched unprivileged load/store sequences (e.g. {get,put}_user) when poking PSTATE.PAN. So perhaps we could ahve something like: * privileged_uaccess_{enable,disable}() Which toggle TTBR0, or PAN (always). These would handle cases like the futex/swp code. * (unprivileged_)uaccess_{enable,disable}() Which toggle TTBR0, or PAN (in the absence of UAO). These would handle cases like the {get,put}_user sequences. Though perhaps that is just as confusing. ;) Otherwise, this looks like a nice centralisation of the PSTATE.PAN manipulation code. Thanks, Mark.
WARNING: multiple messages have this Message-ID (diff)
From: Mark Rutland <mark.rutland@arm.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: linux-arm-kernel@lists.infradead.org, AKASHI Takahiro <takahiro.akashi@linaro.org>, Will Deacon <will.deacon@arm.com>, James Morse <james.morse@arm.com>, Kees Cook <keescook@chromium.org>, kernel-hardening@lists.openwall.com Subject: [kernel-hardening] Re: [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Date: Mon, 5 Sep 2016 16:38:28 +0100 [thread overview] Message-ID: <20160905153828.GA27305@leverpostej> (raw) In-Reply-To: <1472828533-28197-2-git-send-email-catalin.marinas@arm.com> Hi Catalin, On Fri, Sep 02, 2016 at 04:02:07PM +0100, Catalin Marinas wrote: > This patch moves the directly coded alternatives for turning PAN on/off > into separate uaccess_{enable,disable} macros or functions. The asm > macros take a few arguments which will be used in subsequent patches. > > Cc: Will Deacon <will.deacon@arm.com> > Cc: James Morse <james.morse@arm.com> > Cc: Kees Cook <keescook@chromium.org> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > --- > arch/arm64/include/asm/futex.h | 14 ++++----- > arch/arm64/include/asm/uaccess.h | 55 ++++++++++++++++++++++++++++++------ > arch/arm64/kernel/armv8_deprecated.c | 10 +++---- > arch/arm64/lib/clear_user.S | 8 ++---- > arch/arm64/lib/copy_from_user.S | 8 ++---- > arch/arm64/lib/copy_in_user.S | 8 ++---- > arch/arm64/lib/copy_to_user.S | 8 ++---- > 7 files changed, 71 insertions(+), 40 deletions(-) > > diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h > index f2585cdd32c2..7e5f236093be 100644 > --- a/arch/arm64/include/asm/futex.h > +++ b/arch/arm64/include/asm/futex.h > @@ -27,9 +27,9 @@ > #include <asm/sysreg.h> > > #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \ > +do { \ > + uaccess_enable(ARM64_HAS_PAN); \ > asm volatile( \ > - ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, \ > - CONFIG_ARM64_PAN) \ > " prfm pstl1strm, %2\n" \ > "1: ldxr %w1, %2\n" \ > insn "\n" \ > @@ -44,11 +44,11 @@ > " .popsection\n" \ > _ASM_EXTABLE(1b, 4b) \ > _ASM_EXTABLE(2b, 4b) \ > - ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, \ > - CONFIG_ARM64_PAN) \ > : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \ > : "r" (oparg), "Ir" (-EFAULT) \ > - : "memory") > + : "memory"); \ > + uaccess_disable(ARM64_HAS_PAN); \ > +} while (0) It might be worth noting in the commit message that this change means that any memory accesses the compiler decides to spill between uaccess_* calls and the main asm block are unprotected, but that's unlikely to be an issue in practice. [...] > /* > + * User access enabling/disabling. > + */ > +#define uaccess_disable(alt) \ > +do { \ > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \ > + CONFIG_ARM64_PAN)); \ > +} while (0) > + > +#define uaccess_enable(alt) \ > +do { \ > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \ > + CONFIG_ARM64_PAN)); \ > +} while (0) Passing the alternative down is somewhat confusing. e.g. in the futex case it looks like we're only doing something when PAN is present, whereas we'll manipulate TTBR0 in the absence of PAN. If I've understood correctly, we need this to distinguish regular load/store uaccess sequences (eg. the futex code) from potentially patched unprivileged load/store sequences (e.g. {get,put}_user) when poking PSTATE.PAN. So perhaps we could ahve something like: * privileged_uaccess_{enable,disable}() Which toggle TTBR0, or PAN (always). These would handle cases like the futex/swp code. * (unprivileged_)uaccess_{enable,disable}() Which toggle TTBR0, or PAN (in the absence of UAO). These would handle cases like the {get,put}_user sequences. Though perhaps that is just as confusing. ;) Otherwise, this looks like a nice centralisation of the PSTATE.PAN manipulation code. Thanks, Mark.
next prev parent reply other threads:[~2016-09-05 15:38 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-02 15:02 [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-05 15:38 ` Mark Rutland [this message] 2016-09-05 15:38 ` [kernel-hardening] " Mark Rutland 2016-09-12 14:52 ` Catalin Marinas 2016-09-12 14:52 ` [kernel-hardening] " Catalin Marinas 2016-09-12 15:09 ` Mark Rutland 2016-09-12 15:09 ` [kernel-hardening] " Mark Rutland 2016-09-12 16:26 ` Catalin Marinas 2016-09-12 16:26 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 2/7] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-05 16:11 ` Mark Rutland 2016-09-05 16:11 ` [kernel-hardening] " Mark Rutland 2016-09-02 15:02 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} functionality based on TTBR0_EL1 Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] [PATCH v2 3/7] arm64: Introduce uaccess_{disable,enable} " Catalin Marinas 2016-09-05 17:20 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} " Mark Rutland 2016-09-05 17:20 ` [kernel-hardening] " Mark Rutland 2016-09-06 10:27 ` Catalin Marinas 2016-09-06 10:27 ` [kernel-hardening] " Catalin Marinas 2016-09-06 10:45 ` Mark Rutland 2016-09-06 10:45 ` [kernel-hardening] " Mark Rutland 2016-09-11 13:55 ` Ard Biesheuvel 2016-09-11 13:55 ` Ard Biesheuvel 2016-09-12 9:32 ` Catalin Marinas 2016-09-12 9:32 ` Catalin Marinas 2016-09-09 17:15 ` Catalin Marinas 2016-09-09 17:15 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 4/7] arm64: Disable TTBR0_EL1 during normal kernel execution Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-06 17:31 ` Mark Rutland 2016-09-06 17:31 ` [kernel-hardening] " Mark Rutland 2016-09-02 15:02 ` [PATCH v2 5/7] arm64: Handle faults caused by inadvertent user access with PAN enabled Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 6/7] arm64: xen: Enable user access before a privcmd hvc call Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 7/7] arm64: Enable CONFIG_ARM64_TTBR0_PAN Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:47 ` Mark Rutland 2016-09-02 15:47 ` [kernel-hardening] " Mark Rutland 2016-09-07 23:20 ` [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Kees Cook 2016-09-07 23:20 ` [kernel-hardening] " Kees Cook 2016-09-08 12:51 ` Catalin Marinas 2016-09-08 12:51 ` [kernel-hardening] " Catalin Marinas 2016-09-08 15:50 ` Kees Cook 2016-09-08 15:50 ` [kernel-hardening] " Kees Cook 2016-09-09 16:31 ` Mark Rutland 2016-09-09 16:31 ` [kernel-hardening] " Mark Rutland 2016-09-09 18:24 ` Kees Cook 2016-09-09 18:24 ` [kernel-hardening] " Kees Cook 2016-09-09 23:40 ` [kernel-hardening] " David Brown 2016-09-09 23:40 ` David Brown 2016-09-10 9:51 ` Catalin Marinas 2016-09-10 9:51 ` [kernel-hardening] " Catalin Marinas 2016-09-10 10:56 ` Ard Biesheuvel 2016-09-10 10:56 ` [kernel-hardening] " Ard Biesheuvel 2016-09-11 12:16 ` Catalin Marinas 2016-09-11 12:16 ` [kernel-hardening] " Catalin Marinas
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