From: mark.rutland@arm.com (Mark Rutland) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Date: Mon, 12 Sep 2016 16:09:59 +0100 [thread overview] Message-ID: <20160912150958.GC14165@leverpostej> (raw) In-Reply-To: <20160912145219.GC2492@e104818-lin.cambridge.arm.com> On Mon, Sep 12, 2016 at 03:52:19PM +0100, Catalin Marinas wrote: > On Mon, Sep 05, 2016 at 04:38:28PM +0100, Mark Rutland wrote: > > On Fri, Sep 02, 2016 at 04:02:07PM +0100, Catalin Marinas wrote: > > > /* > > > + * User access enabling/disabling. > > > + */ > > > +#define uaccess_disable(alt) \ > > > +do { \ > > > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \ > > > + CONFIG_ARM64_PAN)); \ > > > +} while (0) > > > + > > > +#define uaccess_enable(alt) \ > > > +do { \ > > > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \ > > > + CONFIG_ARM64_PAN)); \ > > > +} while (0) > > > > Passing the alternative down is somewhat confusing. e.g. in the futex > > case it looks like we're only doing something when PAN is present, > > whereas we'll manipulate TTBR0 in the absence of PAN. > > I agree it's confusing (I got it wrong first time as well and used the > wrong alternative for futex). > > > If I've understood correctly, we need this to distinguish regular > > load/store uaccess sequences (eg. the futex code) from potentially > > patched unprivileged load/store sequences (e.g. {get,put}_user) when > > poking PSTATE.PAN. > > > > So perhaps we could ahve something like: > > > > * privileged_uaccess_{enable,disable}() > > Which toggle TTBR0, or PAN (always). > > These would handle cases like the futex/swp code. > > > > * (unprivileged_)uaccess_{enable,disable}() > > Which toggle TTBR0, or PAN (in the absence of UAO). > > These would handle cases like the {get,put}_user sequences. > > > > Though perhaps that is just as confusing. ;) > > I find it more confusing. Fair enough. :) > In the non-UAO case, get_user etc. would > normally have to use privileged_uaccess_enable() since ldr is not > replaced with ldtr. Maybe uaccess_enable_for_exclusives() but it doesn't > look any better. I strongly prefer uaccess_enable_exclusives(), or something of that sort to both of the above. ;) > I think adding some comments to the code (uaccess_enable macro) would > work better, clarifying what the alternative is for. That will make things smoewhat clearer, though only after one reads the comments. In contrast, uaccess_enable_exclusives() would be self-documenting w.r.t. the intented use-case. Do we ever want to use the 8.1 atomics for futexes? If so, perhaps uaccess_enable_atomics()? Thanks, Mark.
WARNING: multiple messages have this Message-ID (diff)
From: Mark Rutland <mark.rutland@arm.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: Kees Cook <keescook@chromium.org>, kernel-hardening@lists.openwall.com, Will Deacon <will.deacon@arm.com>, AKASHI Takahiro <takahiro.akashi@linaro.org>, James Morse <james.morse@arm.com>, linux-arm-kernel@lists.infradead.org Subject: [kernel-hardening] Re: [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Date: Mon, 12 Sep 2016 16:09:59 +0100 [thread overview] Message-ID: <20160912150958.GC14165@leverpostej> (raw) In-Reply-To: <20160912145219.GC2492@e104818-lin.cambridge.arm.com> On Mon, Sep 12, 2016 at 03:52:19PM +0100, Catalin Marinas wrote: > On Mon, Sep 05, 2016 at 04:38:28PM +0100, Mark Rutland wrote: > > On Fri, Sep 02, 2016 at 04:02:07PM +0100, Catalin Marinas wrote: > > > /* > > > + * User access enabling/disabling. > > > + */ > > > +#define uaccess_disable(alt) \ > > > +do { \ > > > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt, \ > > > + CONFIG_ARM64_PAN)); \ > > > +} while (0) > > > + > > > +#define uaccess_enable(alt) \ > > > +do { \ > > > + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt, \ > > > + CONFIG_ARM64_PAN)); \ > > > +} while (0) > > > > Passing the alternative down is somewhat confusing. e.g. in the futex > > case it looks like we're only doing something when PAN is present, > > whereas we'll manipulate TTBR0 in the absence of PAN. > > I agree it's confusing (I got it wrong first time as well and used the > wrong alternative for futex). > > > If I've understood correctly, we need this to distinguish regular > > load/store uaccess sequences (eg. the futex code) from potentially > > patched unprivileged load/store sequences (e.g. {get,put}_user) when > > poking PSTATE.PAN. > > > > So perhaps we could ahve something like: > > > > * privileged_uaccess_{enable,disable}() > > Which toggle TTBR0, or PAN (always). > > These would handle cases like the futex/swp code. > > > > * (unprivileged_)uaccess_{enable,disable}() > > Which toggle TTBR0, or PAN (in the absence of UAO). > > These would handle cases like the {get,put}_user sequences. > > > > Though perhaps that is just as confusing. ;) > > I find it more confusing. Fair enough. :) > In the non-UAO case, get_user etc. would > normally have to use privileged_uaccess_enable() since ldr is not > replaced with ldtr. Maybe uaccess_enable_for_exclusives() but it doesn't > look any better. I strongly prefer uaccess_enable_exclusives(), or something of that sort to both of the above. ;) > I think adding some comments to the code (uaccess_enable macro) would > work better, clarifying what the alternative is for. That will make things smoewhat clearer, though only after one reads the comments. In contrast, uaccess_enable_exclusives() would be self-documenting w.r.t. the intented use-case. Do we ever want to use the 8.1 atomics for futexes? If so, perhaps uaccess_enable_atomics()? Thanks, Mark.
next prev parent reply other threads:[~2016-09-12 15:09 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-02 15:02 [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-05 15:38 ` Mark Rutland 2016-09-05 15:38 ` [kernel-hardening] " Mark Rutland 2016-09-12 14:52 ` Catalin Marinas 2016-09-12 14:52 ` [kernel-hardening] " Catalin Marinas 2016-09-12 15:09 ` Mark Rutland [this message] 2016-09-12 15:09 ` Mark Rutland 2016-09-12 16:26 ` Catalin Marinas 2016-09-12 16:26 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 2/7] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-05 16:11 ` Mark Rutland 2016-09-05 16:11 ` [kernel-hardening] " Mark Rutland 2016-09-02 15:02 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} functionality based on TTBR0_EL1 Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] [PATCH v2 3/7] arm64: Introduce uaccess_{disable,enable} " Catalin Marinas 2016-09-05 17:20 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} " Mark Rutland 2016-09-05 17:20 ` [kernel-hardening] " Mark Rutland 2016-09-06 10:27 ` Catalin Marinas 2016-09-06 10:27 ` [kernel-hardening] " Catalin Marinas 2016-09-06 10:45 ` Mark Rutland 2016-09-06 10:45 ` [kernel-hardening] " Mark Rutland 2016-09-11 13:55 ` Ard Biesheuvel 2016-09-11 13:55 ` Ard Biesheuvel 2016-09-12 9:32 ` Catalin Marinas 2016-09-12 9:32 ` Catalin Marinas 2016-09-09 17:15 ` Catalin Marinas 2016-09-09 17:15 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 4/7] arm64: Disable TTBR0_EL1 during normal kernel execution Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-06 17:31 ` Mark Rutland 2016-09-06 17:31 ` [kernel-hardening] " Mark Rutland 2016-09-02 15:02 ` [PATCH v2 5/7] arm64: Handle faults caused by inadvertent user access with PAN enabled Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 6/7] arm64: xen: Enable user access before a privcmd hvc call Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:02 ` [PATCH v2 7/7] arm64: Enable CONFIG_ARM64_TTBR0_PAN Catalin Marinas 2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas 2016-09-02 15:47 ` Mark Rutland 2016-09-02 15:47 ` [kernel-hardening] " Mark Rutland 2016-09-07 23:20 ` [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Kees Cook 2016-09-07 23:20 ` [kernel-hardening] " Kees Cook 2016-09-08 12:51 ` Catalin Marinas 2016-09-08 12:51 ` [kernel-hardening] " Catalin Marinas 2016-09-08 15:50 ` Kees Cook 2016-09-08 15:50 ` [kernel-hardening] " Kees Cook 2016-09-09 16:31 ` Mark Rutland 2016-09-09 16:31 ` [kernel-hardening] " Mark Rutland 2016-09-09 18:24 ` Kees Cook 2016-09-09 18:24 ` [kernel-hardening] " Kees Cook 2016-09-09 23:40 ` [kernel-hardening] " David Brown 2016-09-09 23:40 ` David Brown 2016-09-10 9:51 ` Catalin Marinas 2016-09-10 9:51 ` [kernel-hardening] " Catalin Marinas 2016-09-10 10:56 ` Ard Biesheuvel 2016-09-10 10:56 ` [kernel-hardening] " Ard Biesheuvel 2016-09-11 12:16 ` Catalin Marinas 2016-09-11 12:16 ` [kernel-hardening] " Catalin Marinas
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20160912150958.GC14165@leverpostej \ --to=mark.rutland@arm.com \ --cc=linux-arm-kernel@lists.infradead.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.