From: catalin.marinas@arm.com (Catalin Marinas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching
Date: Sun, 11 Sep 2016 13:16:25 +0100 [thread overview]
Message-ID: <20160911121624.GA16859@MBP.local> (raw)
In-Reply-To: <CAKv+Gu9P4_90LEoyu1apeKZH20imLPD_EiB=zNAvyin-67ivKQ@mail.gmail.com>
On Sat, Sep 10, 2016 at 11:56:14AM +0100, Ard Biesheuvel wrote:
> On 10 September 2016 at 10:51, Catalin Marinas <catalin.marinas@arm.com> wrote:
> > On Fri, Sep 02, 2016 at 04:02:06PM +0100, Catalin Marinas wrote:
> >> This is the second version of the arm64 PAN emulation by disabling
> >> TTBR0_EL1 accesses. The major change from v1 is the use of a thread_info
> >> member to store the real TTBR0_EL1 value. The advantage is slightly
> >> simpler assembler macros for uaccess_enable with the downside that
> >> switch_mm() must always update the saved ttbr0 even if there is no mm
> >> switch.
> >
> > FYI, I got the Juno board rebooting in a loop with defconfig +
> > ARM64_TTBR0_PAN enabled. It takes about 20-40 reboots to get the panic
> > below on the EFI run-time services. I'll look into it on Monday (and
> > cc'ing Ard who I forgot to add originally). Including the full log
> > below:
>
> Could you please try to reproduce it again, but this time with
> 'efi=debug' on the kernel command line? Thanks
Just for the record, following our private email exchanges: when
executing an EFI runtime service, an interrupt comes in and Linux
disables TTBR0 accesses. When returning from interrupt, the kernel
restores TTBR0_EL1 with the value in current thread_info which is
different from the efi_mm one.
Two potential solutions:
1. Temporarily update the current thread_info ttbr0 during EFI runtime
services (preemption is disabled). Suggested by Ard
2. Go back to per-CPU saving of TTBR0_EL1 as in v1
I'll implement 1 on Monday and give it a try.
--
Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Kees Cook <keescook@chromium.org>,
kernel-hardening@lists.openwall.com,
Will Deacon <will.deacon@arm.com>,
AKASHI Takahiro <takahiro.akashi@linaro.org>,
Julien Grall <julien.grall@arm.com>,
James Morse <james.morse@arm.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: [kernel-hardening] Re: [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching
Date: Sun, 11 Sep 2016 13:16:25 +0100 [thread overview]
Message-ID: <20160911121624.GA16859@MBP.local> (raw)
In-Reply-To: <CAKv+Gu9P4_90LEoyu1apeKZH20imLPD_EiB=zNAvyin-67ivKQ@mail.gmail.com>
On Sat, Sep 10, 2016 at 11:56:14AM +0100, Ard Biesheuvel wrote:
> On 10 September 2016 at 10:51, Catalin Marinas <catalin.marinas@arm.com> wrote:
> > On Fri, Sep 02, 2016 at 04:02:06PM +0100, Catalin Marinas wrote:
> >> This is the second version of the arm64 PAN emulation by disabling
> >> TTBR0_EL1 accesses. The major change from v1 is the use of a thread_info
> >> member to store the real TTBR0_EL1 value. The advantage is slightly
> >> simpler assembler macros for uaccess_enable with the downside that
> >> switch_mm() must always update the saved ttbr0 even if there is no mm
> >> switch.
> >
> > FYI, I got the Juno board rebooting in a loop with defconfig +
> > ARM64_TTBR0_PAN enabled. It takes about 20-40 reboots to get the panic
> > below on the EFI run-time services. I'll look into it on Monday (and
> > cc'ing Ard who I forgot to add originally). Including the full log
> > below:
>
> Could you please try to reproduce it again, but this time with
> 'efi=debug' on the kernel command line? Thanks
Just for the record, following our private email exchanges: when
executing an EFI runtime service, an interrupt comes in and Linux
disables TTBR0 accesses. When returning from interrupt, the kernel
restores TTBR0_EL1 with the value in current thread_info which is
different from the efi_mm one.
Two potential solutions:
1. Temporarily update the current thread_info ttbr0 during EFI runtime
services (preemption is disabled). Suggested by Ard
2. Go back to per-CPU saving of TTBR0_EL1 as in v1
I'll implement 1 on Monday and give it a try.
--
Catalin
next prev parent reply other threads:[~2016-09-11 12:16 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-02 15:02 [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas
2016-09-02 15:02 ` [PATCH v2 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas
2016-09-05 15:38 ` Mark Rutland
2016-09-05 15:38 ` [kernel-hardening] " Mark Rutland
2016-09-12 14:52 ` Catalin Marinas
2016-09-12 14:52 ` [kernel-hardening] " Catalin Marinas
2016-09-12 15:09 ` Mark Rutland
2016-09-12 15:09 ` [kernel-hardening] " Mark Rutland
2016-09-12 16:26 ` Catalin Marinas
2016-09-12 16:26 ` [kernel-hardening] " Catalin Marinas
2016-09-02 15:02 ` [PATCH v2 2/7] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas
2016-09-05 16:11 ` Mark Rutland
2016-09-05 16:11 ` [kernel-hardening] " Mark Rutland
2016-09-02 15:02 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} functionality based on TTBR0_EL1 Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] [PATCH v2 3/7] arm64: Introduce uaccess_{disable,enable} " Catalin Marinas
2016-09-05 17:20 ` [PATCH v2 3/7] arm64: Introduce uaccess_{disable, enable} " Mark Rutland
2016-09-05 17:20 ` [kernel-hardening] " Mark Rutland
2016-09-06 10:27 ` Catalin Marinas
2016-09-06 10:27 ` [kernel-hardening] " Catalin Marinas
2016-09-06 10:45 ` Mark Rutland
2016-09-06 10:45 ` [kernel-hardening] " Mark Rutland
2016-09-11 13:55 ` Ard Biesheuvel
2016-09-11 13:55 ` Ard Biesheuvel
2016-09-12 9:32 ` Catalin Marinas
2016-09-12 9:32 ` Catalin Marinas
2016-09-09 17:15 ` Catalin Marinas
2016-09-09 17:15 ` [kernel-hardening] " Catalin Marinas
2016-09-02 15:02 ` [PATCH v2 4/7] arm64: Disable TTBR0_EL1 during normal kernel execution Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas
2016-09-06 17:31 ` Mark Rutland
2016-09-06 17:31 ` [kernel-hardening] " Mark Rutland
2016-09-02 15:02 ` [PATCH v2 5/7] arm64: Handle faults caused by inadvertent user access with PAN enabled Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas
2016-09-02 15:02 ` [PATCH v2 6/7] arm64: xen: Enable user access before a privcmd hvc call Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas
2016-09-02 15:02 ` [PATCH v2 7/7] arm64: Enable CONFIG_ARM64_TTBR0_PAN Catalin Marinas
2016-09-02 15:02 ` [kernel-hardening] " Catalin Marinas
2016-09-02 15:47 ` Mark Rutland
2016-09-02 15:47 ` [kernel-hardening] " Mark Rutland
2016-09-07 23:20 ` [PATCH v2 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Kees Cook
2016-09-07 23:20 ` [kernel-hardening] " Kees Cook
2016-09-08 12:51 ` Catalin Marinas
2016-09-08 12:51 ` [kernel-hardening] " Catalin Marinas
2016-09-08 15:50 ` Kees Cook
2016-09-08 15:50 ` [kernel-hardening] " Kees Cook
2016-09-09 16:31 ` Mark Rutland
2016-09-09 16:31 ` [kernel-hardening] " Mark Rutland
2016-09-09 18:24 ` Kees Cook
2016-09-09 18:24 ` [kernel-hardening] " Kees Cook
2016-09-09 23:40 ` [kernel-hardening] " David Brown
2016-09-09 23:40 ` David Brown
2016-09-10 9:51 ` Catalin Marinas
2016-09-10 9:51 ` [kernel-hardening] " Catalin Marinas
2016-09-10 10:56 ` Ard Biesheuvel
2016-09-10 10:56 ` [kernel-hardening] " Ard Biesheuvel
2016-09-11 12:16 ` Catalin Marinas [this message]
2016-09-11 12:16 ` Catalin Marinas
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