From: "Pali Rohár" <pali@kernel.org> To: "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Rob Herring" <robh+dt@kernel.org>, "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Marek Behún" <kabel@kernel.org>, "Russell King" <rmk+kernel@armlinux.org.uk> Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 06/11] PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge Date: Wed, 12 Jan 2022 16:18:09 +0100 [thread overview] Message-ID: <20220112151814.24361-7-pali@kernel.org> (raw) In-Reply-To: <20220112151814.24361-1-pali@kernel.org> Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via emulated bridge. After this change Subsystem ID is visible in lspci output at line: Capabilities: [40] Subsystem Signed-off-by: Pali Rohár <pali@kernel.org> --- drivers/pci/controller/pci-mvebu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 0f2ec0a17874..811af9e6ede5 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -32,6 +32,7 @@ #define PCIE_DEV_REV_OFF 0x0008 #define PCIE_BAR_LO_OFF(n) (0x0010 + ((n) << 3)) #define PCIE_BAR_HI_OFF(n) (0x0014 + ((n) << 3)) +#define PCIE_SSDEV_ID_OFF 0x002c #define PCIE_CAP_PCIEXP 0x0060 #define PCIE_HEADER_LOG_4_OFF 0x0128 #define PCIE_BAR_CTRL_OFF(n) (0x1804 + (((n) - 1) * 4)) @@ -731,6 +732,7 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) struct pci_bridge_emul *bridge = &port->bridge; u32 dev_id = mvebu_readl(port, PCIE_DEV_ID_OFF); u32 dev_rev = mvebu_readl(port, PCIE_DEV_REV_OFF); + u32 ssdev_id = mvebu_readl(port, PCIE_SSDEV_ID_OFF); u32 pcie_cap = mvebu_readl(port, PCIE_CAP_PCIEXP); u8 pcie_cap_ver = ((pcie_cap >> 16) & PCI_EXP_FLAGS_VERS); @@ -752,6 +754,8 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) */ bridge->pcie_conf.cap = cpu_to_le16(pcie_cap_ver); + bridge->subsystem_vendor_id = ssdev_id & 0xffff; + bridge->subsystem_id = ssdev_id >> 16; bridge->has_pcie = true; bridge->data = port; bridge->ops = &mvebu_pci_bridge_emul_ops; -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: "Pali Rohár" <pali@kernel.org> To: "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>, "Bjorn Helgaas" <bhelgaas@google.com>, "Rob Herring" <robh+dt@kernel.org>, "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>, "Krzysztof Wilczyński" <kw@linux.com>, "Marek Behún" <kabel@kernel.org>, "Russell King" <rmk+kernel@armlinux.org.uk> Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 06/11] PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge Date: Wed, 12 Jan 2022 16:18:09 +0100 [thread overview] Message-ID: <20220112151814.24361-7-pali@kernel.org> (raw) In-Reply-To: <20220112151814.24361-1-pali@kernel.org> Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via emulated bridge. After this change Subsystem ID is visible in lspci output at line: Capabilities: [40] Subsystem Signed-off-by: Pali Rohár <pali@kernel.org> --- drivers/pci/controller/pci-mvebu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 0f2ec0a17874..811af9e6ede5 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -32,6 +32,7 @@ #define PCIE_DEV_REV_OFF 0x0008 #define PCIE_BAR_LO_OFF(n) (0x0010 + ((n) << 3)) #define PCIE_BAR_HI_OFF(n) (0x0014 + ((n) << 3)) +#define PCIE_SSDEV_ID_OFF 0x002c #define PCIE_CAP_PCIEXP 0x0060 #define PCIE_HEADER_LOG_4_OFF 0x0128 #define PCIE_BAR_CTRL_OFF(n) (0x1804 + (((n) - 1) * 4)) @@ -731,6 +732,7 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) struct pci_bridge_emul *bridge = &port->bridge; u32 dev_id = mvebu_readl(port, PCIE_DEV_ID_OFF); u32 dev_rev = mvebu_readl(port, PCIE_DEV_REV_OFF); + u32 ssdev_id = mvebu_readl(port, PCIE_SSDEV_ID_OFF); u32 pcie_cap = mvebu_readl(port, PCIE_CAP_PCIEXP); u8 pcie_cap_ver = ((pcie_cap >> 16) & PCI_EXP_FLAGS_VERS); @@ -752,6 +754,8 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) */ bridge->pcie_conf.cap = cpu_to_le16(pcie_cap_ver); + bridge->subsystem_vendor_id = ssdev_id & 0xffff; + bridge->subsystem_id = ssdev_id >> 16; bridge->has_pcie = true; bridge->data = port; bridge->ops = &mvebu_pci_bridge_emul_ops; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-01-12 15:19 UTC|newest] Thread overview: 130+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-05 15:02 [PATCH 00/11] PCI: mvebu: subsystem ids, AER and INTx Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:02 ` [PATCH 01/11] PCI: pci-bridge-emul: Re-arrange register tests Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:02 ` [PATCH 02/11] PCI: pci-bridge-emul: Add support for PCIe extended capabilities Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:02 ` [PATCH 03/11] PCI: pci-bridge-emul: Add support for PCI Bridge Subsystem Vendor ID capability Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:02 ` [PATCH 04/11] dt-bindings: PCI: mvebu: Add num-lanes property Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-12 1:29 ` Rob Herring 2022-01-12 1:29 ` Rob Herring 2022-01-05 15:02 ` [PATCH 05/11] PCI: mvebu: Correctly configure x1/x4 mode Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:02 ` [PATCH 06/11] PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:02 ` [PATCH 07/11] PCI: mvebu: Add support for Advanced Error Reporting registers " Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:02 ` [PATCH 08/11] PCI: mvebu: Use child_ops API Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-05 15:41 ` Rob Herring 2022-01-05 15:41 ` Rob Herring 2022-01-05 15:49 ` Pali Rohár 2022-01-05 15:49 ` Pali Rohár 2022-01-12 1:43 ` Pali Rohár 2022-01-12 1:43 ` Pali Rohár 2022-01-12 14:53 ` Rob Herring 2022-01-12 14:53 ` Rob Herring 2022-01-05 15:02 ` [PATCH 09/11] dt-bindings: PCI: mvebu: Update information about intx interrupts Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-12 1:30 ` Rob Herring 2022-01-12 1:30 ` Rob Herring 2022-01-05 15:02 ` [PATCH 10/11] PCI: mvebu: Implement support for legacy INTx interrupts Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-06 15:28 ` Marc Zyngier 2022-01-06 15:28 ` Marc Zyngier 2022-01-06 15:44 ` Pali Rohár 2022-01-06 15:44 ` Pali Rohár 2022-01-06 15:55 ` Marc Zyngier 2022-01-06 15:55 ` Marc Zyngier 2022-01-06 16:20 ` Pali Rohár 2022-01-06 16:20 ` Pali Rohár 2022-01-06 16:27 ` Marc Zyngier 2022-01-06 16:27 ` Marc Zyngier 2022-01-06 17:20 ` Marek Behún 2022-01-06 17:20 ` Marek Behún 2022-01-06 17:31 ` Marc Zyngier 2022-01-06 17:31 ` Marc Zyngier 2022-01-07 11:50 ` Pali Rohár 2022-01-07 11:50 ` Pali Rohár 2022-01-07 18:53 ` Marc Zyngier 2022-01-07 18:53 ` Marc Zyngier 2022-01-05 15:02 ` [PATCH 11/11] ARM: dts: armada-385.dtsi: Add definitions for PCIe " Pali Rohár 2022-01-05 15:02 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 00/11] PCI: mvebu: subsystem ids, AER and INTx Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 01/11] PCI: pci-bridge-emul: Re-arrange register tests Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 02/11] PCI: pci-bridge-emul: Add support for PCIe extended capabilities Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 03/11] PCI: pci-bridge-emul: Add support for PCI Bridge Subsystem Vendor ID capability Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 04/11] dt-bindings: PCI: mvebu: Add num-lanes property Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 05/11] PCI: mvebu: Correctly configure x1/x4 mode Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-20 17:09 ` Rob Herring 2022-01-20 17:09 ` Rob Herring 2022-01-20 17:19 ` Pali Rohár 2022-01-20 17:19 ` Pali Rohár 2022-01-12 15:18 ` Pali Rohár [this message] 2022-01-12 15:18 ` [PATCH v2 06/11] PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge Pali Rohár 2022-01-12 15:18 ` [PATCH v2 07/11] PCI: mvebu: Add support for Advanced Error Reporting registers " Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 08/11] PCI: mvebu: Use child_ops API Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-20 16:49 ` Rob Herring 2022-01-20 16:49 ` Rob Herring 2022-01-20 16:55 ` Pali Rohár 2022-01-20 16:55 ` Pali Rohár 2022-01-20 18:40 ` Rob Herring 2022-01-20 18:40 ` Rob Herring 2022-01-12 15:18 ` [PATCH v2 09/11] dt-bindings: PCI: mvebu: Update information about intx interrupts Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-01-12 15:36 ` Marek Behún 2022-01-12 15:36 ` Marek Behún 2022-01-12 15:18 ` [PATCH v2 10/11] PCI: mvebu: Implement support for legacy INTx interrupts Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-02-11 17:19 ` Lorenzo Pieralisi 2022-02-11 17:19 ` Lorenzo Pieralisi 2022-02-11 17:52 ` Pali Rohár 2022-02-11 17:52 ` Pali Rohár 2022-02-11 18:21 ` Lorenzo Pieralisi 2022-02-11 18:21 ` Lorenzo Pieralisi 2022-02-12 10:59 ` Marc Zyngier 2022-02-12 10:59 ` Marc Zyngier 2022-02-16 23:40 ` Pali Rohár 2022-02-16 23:40 ` Pali Rohár 2022-02-22 10:21 ` Lorenzo Pieralisi 2022-02-22 10:21 ` Lorenzo Pieralisi 2022-02-22 10:51 ` Pali Rohár 2022-02-22 10:51 ` Pali Rohár 2022-02-22 15:24 ` Lorenzo Pieralisi 2022-02-22 15:24 ` Lorenzo Pieralisi 2022-02-22 15:42 ` Pali Rohár 2022-02-22 15:42 ` Pali Rohár 2022-02-22 15:45 ` Lorenzo Pieralisi 2022-02-22 15:45 ` Lorenzo Pieralisi 2022-02-22 15:55 ` Pali Rohár 2022-02-22 15:55 ` Pali Rohár 2022-01-12 15:18 ` [PATCH v2 11/11] ARM: dts: armada-385.dtsi: Add definitions for PCIe " Pali Rohár 2022-01-12 15:18 ` Pali Rohár 2022-02-14 15:07 ` Gregory CLEMENT 2022-02-14 15:07 ` Gregory CLEMENT 2022-02-14 15:09 ` Pali Rohár 2022-02-14 15:09 ` Pali Rohár 2022-02-14 15:26 ` Gregory CLEMENT 2022-02-14 15:26 ` Gregory CLEMENT [not found] ` <CAEzXK1qYKVk7QiSY_DwqkZ7WV6WU06WBtiqZx0JJCc+mOP-7Kg@mail.gmail.com> 2022-02-15 10:48 ` Luís Mendes 2022-02-15 10:48 ` Luís Mendes 2022-02-15 10:52 ` Pali Rohár 2022-02-15 10:52 ` Pali Rohár 2022-02-18 21:53 ` Luís Mendes 2022-02-18 21:53 ` Luís Mendes 2022-02-19 13:36 ` Pali Rohár 2022-02-19 13:36 ` Pali Rohár 2022-02-11 17:50 ` [PATCH 00/11] PCI: mvebu: subsystem ids, AER and INTx Lorenzo Pieralisi 2022-02-11 17:50 ` Lorenzo Pieralisi 2022-02-11 18:01 ` Pali Rohár 2022-02-11 18:01 ` Pali Rohár
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