From: Rob Herring <robh@kernel.org>
To: "Pali Rohár" <pali@kernel.org>
Cc: "Krzysztof Wilczyński" <kw@linux.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
"Rob Herring" <robh+dt@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Marek Behún" <kabel@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
"Russell King" <rmk+kernel@armlinux.org.uk>,
devicetree@vger.kernel.org, "Andrew Lunn" <andrew@lunn.ch>,
"Gregory Clement" <gregory.clement@bootlin.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>
Subject: Re: [PATCH 04/11] dt-bindings: PCI: mvebu: Add num-lanes property
Date: Tue, 11 Jan 2022 19:29:53 -0600 [thread overview]
Message-ID: <Yd4vESC55qFruR/6@robh.at.kernel.org> (raw)
In-Reply-To: <20220105150239.9628-5-pali@kernel.org>
On Wed, 05 Jan 2022 16:02:32 +0100, Pali Rohár wrote:
> Controller driver needs to correctly configure PCIe link if it contains 1
> or 4 SerDes PCIe lanes. Therefore add a new 'num-lanes' DT property for
> mvebu PCIe controller. Property 'num-lanes' seems to be de-facto standard
> way how number of lanes is specified in other PCIe controllers.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
> Documentation/devicetree/bindings/pci/mvebu-pci.txt | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: "Pali Rohár" <pali@kernel.org>
Cc: "Krzysztof Wilczyński" <kw@linux.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
"Rob Herring" <robh+dt@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Marek Behún" <kabel@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
"Russell King" <rmk+kernel@armlinux.org.uk>,
devicetree@vger.kernel.org, "Andrew Lunn" <andrew@lunn.ch>,
"Gregory Clement" <gregory.clement@bootlin.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>
Subject: Re: [PATCH 04/11] dt-bindings: PCI: mvebu: Add num-lanes property
Date: Tue, 11 Jan 2022 19:29:53 -0600 [thread overview]
Message-ID: <Yd4vESC55qFruR/6@robh.at.kernel.org> (raw)
In-Reply-To: <20220105150239.9628-5-pali@kernel.org>
On Wed, 05 Jan 2022 16:02:32 +0100, Pali Rohár wrote:
> Controller driver needs to correctly configure PCIe link if it contains 1
> or 4 SerDes PCIe lanes. Therefore add a new 'num-lanes' DT property for
> mvebu PCIe controller. Property 'num-lanes' seems to be de-facto standard
> way how number of lanes is specified in other PCIe controllers.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
> Documentation/devicetree/bindings/pci/mvebu-pci.txt | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
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next prev parent reply other threads:[~2022-01-12 1:29 UTC|newest]
Thread overview: 130+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-05 15:02 [PATCH 00/11] PCI: mvebu: subsystem ids, AER and INTx Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:02 ` [PATCH 01/11] PCI: pci-bridge-emul: Re-arrange register tests Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:02 ` [PATCH 02/11] PCI: pci-bridge-emul: Add support for PCIe extended capabilities Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:02 ` [PATCH 03/11] PCI: pci-bridge-emul: Add support for PCI Bridge Subsystem Vendor ID capability Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:02 ` [PATCH 04/11] dt-bindings: PCI: mvebu: Add num-lanes property Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-12 1:29 ` Rob Herring [this message]
2022-01-12 1:29 ` Rob Herring
2022-01-05 15:02 ` [PATCH 05/11] PCI: mvebu: Correctly configure x1/x4 mode Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:02 ` [PATCH 06/11] PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:02 ` [PATCH 07/11] PCI: mvebu: Add support for Advanced Error Reporting registers " Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:02 ` [PATCH 08/11] PCI: mvebu: Use child_ops API Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-05 15:41 ` Rob Herring
2022-01-05 15:41 ` Rob Herring
2022-01-05 15:49 ` Pali Rohár
2022-01-05 15:49 ` Pali Rohár
2022-01-12 1:43 ` Pali Rohár
2022-01-12 1:43 ` Pali Rohár
2022-01-12 14:53 ` Rob Herring
2022-01-12 14:53 ` Rob Herring
2022-01-05 15:02 ` [PATCH 09/11] dt-bindings: PCI: mvebu: Update information about intx interrupts Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-12 1:30 ` Rob Herring
2022-01-12 1:30 ` Rob Herring
2022-01-05 15:02 ` [PATCH 10/11] PCI: mvebu: Implement support for legacy INTx interrupts Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-06 15:28 ` Marc Zyngier
2022-01-06 15:28 ` Marc Zyngier
2022-01-06 15:44 ` Pali Rohár
2022-01-06 15:44 ` Pali Rohár
2022-01-06 15:55 ` Marc Zyngier
2022-01-06 15:55 ` Marc Zyngier
2022-01-06 16:20 ` Pali Rohár
2022-01-06 16:20 ` Pali Rohár
2022-01-06 16:27 ` Marc Zyngier
2022-01-06 16:27 ` Marc Zyngier
2022-01-06 17:20 ` Marek Behún
2022-01-06 17:20 ` Marek Behún
2022-01-06 17:31 ` Marc Zyngier
2022-01-06 17:31 ` Marc Zyngier
2022-01-07 11:50 ` Pali Rohár
2022-01-07 11:50 ` Pali Rohár
2022-01-07 18:53 ` Marc Zyngier
2022-01-07 18:53 ` Marc Zyngier
2022-01-05 15:02 ` [PATCH 11/11] ARM: dts: armada-385.dtsi: Add definitions for PCIe " Pali Rohár
2022-01-05 15:02 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 00/11] PCI: mvebu: subsystem ids, AER and INTx Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 01/11] PCI: pci-bridge-emul: Re-arrange register tests Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 02/11] PCI: pci-bridge-emul: Add support for PCIe extended capabilities Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 03/11] PCI: pci-bridge-emul: Add support for PCI Bridge Subsystem Vendor ID capability Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 04/11] dt-bindings: PCI: mvebu: Add num-lanes property Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 05/11] PCI: mvebu: Correctly configure x1/x4 mode Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-20 17:09 ` Rob Herring
2022-01-20 17:09 ` Rob Herring
2022-01-20 17:19 ` Pali Rohár
2022-01-20 17:19 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 06/11] PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 07/11] PCI: mvebu: Add support for Advanced Error Reporting registers " Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 08/11] PCI: mvebu: Use child_ops API Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-20 16:49 ` Rob Herring
2022-01-20 16:49 ` Rob Herring
2022-01-20 16:55 ` Pali Rohár
2022-01-20 16:55 ` Pali Rohár
2022-01-20 18:40 ` Rob Herring
2022-01-20 18:40 ` Rob Herring
2022-01-12 15:18 ` [PATCH v2 09/11] dt-bindings: PCI: mvebu: Update information about intx interrupts Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-01-12 15:36 ` Marek Behún
2022-01-12 15:36 ` Marek Behún
2022-01-12 15:18 ` [PATCH v2 10/11] PCI: mvebu: Implement support for legacy INTx interrupts Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-02-11 17:19 ` Lorenzo Pieralisi
2022-02-11 17:19 ` Lorenzo Pieralisi
2022-02-11 17:52 ` Pali Rohár
2022-02-11 17:52 ` Pali Rohár
2022-02-11 18:21 ` Lorenzo Pieralisi
2022-02-11 18:21 ` Lorenzo Pieralisi
2022-02-12 10:59 ` Marc Zyngier
2022-02-12 10:59 ` Marc Zyngier
2022-02-16 23:40 ` Pali Rohár
2022-02-16 23:40 ` Pali Rohár
2022-02-22 10:21 ` Lorenzo Pieralisi
2022-02-22 10:21 ` Lorenzo Pieralisi
2022-02-22 10:51 ` Pali Rohár
2022-02-22 10:51 ` Pali Rohár
2022-02-22 15:24 ` Lorenzo Pieralisi
2022-02-22 15:24 ` Lorenzo Pieralisi
2022-02-22 15:42 ` Pali Rohár
2022-02-22 15:42 ` Pali Rohár
2022-02-22 15:45 ` Lorenzo Pieralisi
2022-02-22 15:45 ` Lorenzo Pieralisi
2022-02-22 15:55 ` Pali Rohár
2022-02-22 15:55 ` Pali Rohár
2022-01-12 15:18 ` [PATCH v2 11/11] ARM: dts: armada-385.dtsi: Add definitions for PCIe " Pali Rohár
2022-01-12 15:18 ` Pali Rohár
2022-02-14 15:07 ` Gregory CLEMENT
2022-02-14 15:07 ` Gregory CLEMENT
2022-02-14 15:09 ` Pali Rohár
2022-02-14 15:09 ` Pali Rohár
2022-02-14 15:26 ` Gregory CLEMENT
2022-02-14 15:26 ` Gregory CLEMENT
[not found] ` <CAEzXK1qYKVk7QiSY_DwqkZ7WV6WU06WBtiqZx0JJCc+mOP-7Kg@mail.gmail.com>
2022-02-15 10:48 ` Luís Mendes
2022-02-15 10:48 ` Luís Mendes
2022-02-15 10:52 ` Pali Rohár
2022-02-15 10:52 ` Pali Rohár
2022-02-18 21:53 ` Luís Mendes
2022-02-18 21:53 ` Luís Mendes
2022-02-19 13:36 ` Pali Rohár
2022-02-19 13:36 ` Pali Rohár
2022-02-11 17:50 ` [PATCH 00/11] PCI: mvebu: subsystem ids, AER and INTx Lorenzo Pieralisi
2022-02-11 17:50 ` Lorenzo Pieralisi
2022-02-11 18:01 ` Pali Rohár
2022-02-11 18:01 ` Pali Rohár
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