From: Anup Patel <anup@brainfault.org> To: Peter Zijlstra <peterz@infradead.org> Cc: Guo Ren <guoren@kernel.org>, linux-riscv <linux-riscv@lists.infradead.org>, "linux-kernel@vger.kernel.org List" <linux-kernel@vger.kernel.org>, Guo Ren <guoren@linux.alibaba.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Palmer Dabbelt <palmerdabbelt@google.com>, Arnd Bergmann <arnd@arndb.de> Subject: Re: [PATCH] riscv: locks: introduce ticket-based spinlock implementation Date: Wed, 24 Mar 2021 18:23:51 +0530 [thread overview] Message-ID: <CAAhSdy1JHLUFwu7RuCaQ+RUWRBks2KsDva7EpRt8--4ZfofSUQ@mail.gmail.com> (raw) In-Reply-To: <YFsylL7cJqVtVqBI@hirez.programming.kicks-ass.net> On Wed, Mar 24, 2021 at 6:08 PM Peter Zijlstra <peterz@infradead.org> wrote: > > On Wed, Mar 24, 2021 at 05:58:58PM +0530, Anup Patel wrote: > > On Wed, Mar 24, 2021 at 3:45 PM <guoren@kernel.org> wrote: > > > > > > From: Guo Ren <guoren@linux.alibaba.com> > > > > > > This patch introduces a ticket lock implementation for riscv, along the > > > same lines as the implementation for arch/arm & arch/csky. > > > > > > Signed-off-by: Guo Ren <guoren@linux.alibaba.com> > > > Cc: Catalin Marinas <catalin.marinas@arm.com> > > > Cc: Will Deacon <will.deacon@arm.com> > > > Cc: Peter Zijlstra <peterz@infradead.org> > > > Cc: Palmer Dabbelt <palmerdabbelt@google.com> > > > Cc: Anup Patel <anup@brainfault.org> > > > Cc: Arnd Bergmann <arnd@arndb.de> > > > --- > > > arch/riscv/Kconfig | 1 + > > > arch/riscv/include/asm/Kbuild | 1 + > > > arch/riscv/include/asm/spinlock.h | 158 ++++++++++++-------------------- > > > arch/riscv/include/asm/spinlock_types.h | 19 ++-- > > > > NACK from myside. > > > > Linux ARM64 has moved away from ticket spinlock to qspinlock. > > > > We should directly go for qspinlock. > > I think it is a sensible intermediate step, even if you want to go > qspinlock. Ticket locks are more or less trivial and get you fairness > and all that goodness without the mind bending complexity of qspinlock. > > Once you have the ticket lock implementation solid (and qrwlock) and > everything, *then* start to carefully look at qspinlock. I do understand qspinlock are relatively complex but the best thing about qspinlock is it tries to ensure each CPU spins on it's own location. Instead of adding ticket spinlock now and later replacing it with qspinlock, it is better to straight away explore qspinlock hence my NACK. > > Now, arguably arm64 did the heavy lifting of making qspinlock good on > weak architectures, but if you want to do it right, you still have to > analyze the whole thing for your own architecture. Most of the RISC-V implementations are weak memory ordering so it makes more sense to explore qspinlock first. Regards, Anup
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup@brainfault.org> To: Peter Zijlstra <peterz@infradead.org> Cc: Guo Ren <guoren@kernel.org>, linux-riscv <linux-riscv@lists.infradead.org>, "linux-kernel@vger.kernel.org List" <linux-kernel@vger.kernel.org>, Guo Ren <guoren@linux.alibaba.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Palmer Dabbelt <palmerdabbelt@google.com>, Arnd Bergmann <arnd@arndb.de> Subject: Re: [PATCH] riscv: locks: introduce ticket-based spinlock implementation Date: Wed, 24 Mar 2021 18:23:51 +0530 [thread overview] Message-ID: <CAAhSdy1JHLUFwu7RuCaQ+RUWRBks2KsDva7EpRt8--4ZfofSUQ@mail.gmail.com> (raw) In-Reply-To: <YFsylL7cJqVtVqBI@hirez.programming.kicks-ass.net> On Wed, Mar 24, 2021 at 6:08 PM Peter Zijlstra <peterz@infradead.org> wrote: > > On Wed, Mar 24, 2021 at 05:58:58PM +0530, Anup Patel wrote: > > On Wed, Mar 24, 2021 at 3:45 PM <guoren@kernel.org> wrote: > > > > > > From: Guo Ren <guoren@linux.alibaba.com> > > > > > > This patch introduces a ticket lock implementation for riscv, along the > > > same lines as the implementation for arch/arm & arch/csky. > > > > > > Signed-off-by: Guo Ren <guoren@linux.alibaba.com> > > > Cc: Catalin Marinas <catalin.marinas@arm.com> > > > Cc: Will Deacon <will.deacon@arm.com> > > > Cc: Peter Zijlstra <peterz@infradead.org> > > > Cc: Palmer Dabbelt <palmerdabbelt@google.com> > > > Cc: Anup Patel <anup@brainfault.org> > > > Cc: Arnd Bergmann <arnd@arndb.de> > > > --- > > > arch/riscv/Kconfig | 1 + > > > arch/riscv/include/asm/Kbuild | 1 + > > > arch/riscv/include/asm/spinlock.h | 158 ++++++++++++-------------------- > > > arch/riscv/include/asm/spinlock_types.h | 19 ++-- > > > > NACK from myside. > > > > Linux ARM64 has moved away from ticket spinlock to qspinlock. > > > > We should directly go for qspinlock. > > I think it is a sensible intermediate step, even if you want to go > qspinlock. Ticket locks are more or less trivial and get you fairness > and all that goodness without the mind bending complexity of qspinlock. > > Once you have the ticket lock implementation solid (and qrwlock) and > everything, *then* start to carefully look at qspinlock. I do understand qspinlock are relatively complex but the best thing about qspinlock is it tries to ensure each CPU spins on it's own location. Instead of adding ticket spinlock now and later replacing it with qspinlock, it is better to straight away explore qspinlock hence my NACK. > > Now, arguably arm64 did the heavy lifting of making qspinlock good on > weak architectures, but if you want to do it right, you still have to > analyze the whole thing for your own architecture. Most of the RISC-V implementations are weak memory ordering so it makes more sense to explore qspinlock first. Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-03-24 12:54 UTC|newest] Thread overview: 98+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-24 10:14 [PATCH] riscv: locks: introduce ticket-based spinlock implementation guoren 2021-03-24 10:14 ` guoren 2021-03-24 11:09 ` Peter Zijlstra 2021-03-24 11:09 ` Peter Zijlstra 2021-03-24 12:10 ` Guo Ren 2021-03-24 12:10 ` Guo Ren [not found] ` <CAM4kBBK7_s9U2vJbq68yC8WdDEfPQTaCOvn1xds3Si5B-Wpw+A@mail.gmail.com> 2021-03-24 12:23 ` Peter Zijlstra 2021-03-24 12:23 ` Peter Zijlstra 2021-03-24 12:24 ` Guo Ren 2021-03-24 12:24 ` Guo Ren 2021-03-24 12:31 ` Peter Zijlstra 2021-03-24 12:31 ` Peter Zijlstra 2021-03-24 12:28 ` Anup Patel 2021-03-24 12:28 ` Anup Patel 2021-03-24 12:37 ` Peter Zijlstra 2021-03-24 12:37 ` Peter Zijlstra 2021-03-24 12:53 ` Anup Patel [this message] 2021-03-24 12:53 ` Anup Patel 2021-04-11 21:11 ` Palmer Dabbelt 2021-04-11 21:11 ` Palmer Dabbelt 2021-04-12 13:32 ` Christoph Müllner 2021-04-12 13:32 ` Christoph Müllner 2021-04-12 14:51 ` Peter Zijlstra 2021-04-12 14:51 ` Peter Zijlstra 2021-04-12 21:21 ` Christoph Müllner 2021-04-12 21:21 ` Christoph Müllner 2021-04-12 17:33 ` Palmer Dabbelt 2021-04-12 17:33 ` Palmer Dabbelt 2021-04-12 21:54 ` Christoph Müllner 2021-04-12 21:54 ` Christoph Müllner 2021-04-13 8:03 ` Peter Zijlstra 2021-04-13 8:03 ` Peter Zijlstra 2021-04-13 8:17 ` Peter Zijlstra 2021-04-13 8:17 ` Peter Zijlstra 2021-04-14 2:26 ` Guo Ren 2021-04-14 2:26 ` Guo Ren 2021-04-14 7:08 ` Peter Zijlstra 2021-04-14 7:08 ` Peter Zijlstra 2021-04-14 9:05 ` Peter Zijlstra 2021-04-14 9:05 ` Peter Zijlstra 2021-04-14 10:16 ` [RFC][PATCH] locking: Generic ticket-lock Peter Zijlstra 2021-04-14 10:16 ` Peter Zijlstra 2021-04-14 12:39 ` Guo Ren 2021-04-14 12:39 ` Guo Ren 2021-04-14 12:55 ` Peter Zijlstra 2021-04-14 12:55 ` Peter Zijlstra 2021-04-14 13:08 ` Peter Zijlstra 2021-04-14 13:08 ` Peter Zijlstra 2021-04-14 15:59 ` David Laight 2021-04-14 15:59 ` David Laight 2021-04-14 12:45 ` Peter Zijlstra 2021-04-14 12:45 ` Peter Zijlstra 2021-04-14 21:02 ` Stafford Horne 2021-04-14 21:02 ` Stafford Horne 2021-04-14 20:47 ` Stafford Horne 2021-04-14 20:47 ` Stafford Horne 2021-04-15 8:09 ` Peter Zijlstra 2021-04-15 8:09 ` Peter Zijlstra 2021-04-15 9:02 ` Catalin Marinas 2021-04-15 9:02 ` Catalin Marinas 2021-04-15 9:22 ` Will Deacon 2021-04-15 9:22 ` Will Deacon 2021-04-15 9:24 ` Peter Zijlstra 2021-04-15 9:24 ` Peter Zijlstra 2021-04-19 17:35 ` Will Deacon 2021-04-19 17:35 ` Will Deacon 2021-04-23 6:44 ` Palmer Dabbelt 2021-04-23 6:44 ` Palmer Dabbelt 2021-04-13 9:22 ` [PATCH] riscv: locks: introduce ticket-based spinlock implementation Christoph Müllner 2021-04-13 9:22 ` Christoph Müllner 2021-04-13 9:30 ` Catalin Marinas 2021-04-13 9:30 ` Catalin Marinas 2021-04-13 9:55 ` Christoph Müllner 2021-04-13 9:55 ` Christoph Müllner 2021-04-14 0:23 ` Guo Ren 2021-04-14 0:23 ` Guo Ren 2021-04-14 9:17 ` Catalin Marinas 2021-04-14 9:17 ` Catalin Marinas 2021-04-13 9:35 ` Peter Zijlstra 2021-04-13 9:35 ` Peter Zijlstra 2021-04-13 10:25 ` Christoph Müllner 2021-04-13 10:25 ` Christoph Müllner 2021-04-13 10:45 ` Catalin Marinas 2021-04-13 10:45 ` Catalin Marinas 2021-04-13 10:54 ` David Laight 2021-04-13 10:54 ` David Laight 2021-04-14 5:54 ` Guo Ren 2021-04-14 5:54 ` Guo Ren 2021-04-13 11:04 ` Christoph Müllner 2021-04-13 11:04 ` Christoph Müllner 2021-04-13 13:19 ` Guo Ren 2021-04-13 13:19 ` Guo Ren 2021-09-19 16:53 guoren 2021-09-19 16:53 ` guoren 2021-09-25 14:47 ` Guo Ren 2021-09-25 14:47 ` Guo Ren 2021-10-21 13:13 ` Peter Zijlstra 2021-10-21 13:13 ` Peter Zijlstra
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