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* [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS
@ 2021-06-07 11:38 Bhupesh Sharma
  2021-06-07 11:38 ` [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics Bhupesh Sharma
                   ` (7 more replies)
  0 siblings, 8 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

This series adds DTS for SA8155p-adp board which is based on
Qualcomm snapdragon sm8150 SoC. 

This patchset also includes DTS for the two new PMICs PMM8155AU_1
and PMM8155AU_2 found on the adp board.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com

Bhupesh Sharma (8):
  dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp
    board pmics
  dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp
  dt-bindings: arm: qcom: Add compatible for SA8155p-adp board
  regulator: qcom-rpmh: Add new regulator types found on SA8155p adp
    board
  pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on
    SA8155p-adp
  arm64: dts: qcom: pmm8155au_1: Add base dts file
  arm64: dts: qcom: pmm8155au_2: Add base dts file
  arm64: dts: qcom: sa8155p-adp: Add base dts file

 .../devicetree/bindings/arm/qcom.yaml         |   8 +
 .../bindings/pinctrl/qcom,pmic-gpio.txt       |   5 +
 .../regulator/qcom,rpmh-regulator.yaml        |   2 +
 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi     | 134 +++++++
 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi     | 107 +++++
 arch/arm64/boot/dts/qcom/sa8155p-adp.dts      | 375 ++++++++++++++++++
 drivers/pinctrl/qcom/pinctrl-spmi-gpio.c      |   4 +
 drivers/regulator/qcom-rpmh-regulator.c       |  72 ++++
 9 files changed, 708 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts

-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-11  2:48   ` Bjorn Andersson
  2021-06-07 11:38 ` [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp Bhupesh Sharma
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

Add compatible strings for pmm8155au_1 and pmm8155au_2 pmics
found on SA8155p-adp board.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml      | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
index e561a5b941e4..ea5cd71aa0c7 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
@@ -55,6 +55,8 @@ properties:
       - qcom,pm8009-1-rpmh-regulators
       - qcom,pm8150-rpmh-regulators
       - qcom,pm8150l-rpmh-regulators
+      - qcom,pmm8155au-1-rpmh-regulators
+      - qcom,pmm8155au-2-rpmh-regulators
       - qcom,pm8350-rpmh-regulators
       - qcom,pm8350c-rpmh-regulators
       - qcom,pm8998-rpmh-regulators
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
  2021-06-07 11:38 ` [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-11  2:51   ` Bjorn Andersson
  2021-06-07 11:38 ` [PATCH 3/8] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board Bhupesh Sharma
                   ` (5 subsequent siblings)
  7 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

Add pmic-gpio compatible strings for pmm8155au_1 and pmm8155au_2 pmics
found on SA8155p-adp board.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
index f6a9760558a6..ee4721f1c477 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
@@ -27,6 +27,8 @@ PMIC's from Qualcomm.
 		    "qcom,pm660l-gpio"
 		    "qcom,pm8150-gpio"
 		    "qcom,pm8150b-gpio"
+		    "qcom,pmm8155au-1-gpio"
+		    "qcom,pmm8155au-2-gpio"
 		    "qcom,pm8350-gpio"
 		    "qcom,pm8350b-gpio"
 		    "qcom,pm8350c-gpio"
@@ -116,6 +118,9 @@ to specify in a pin configuration subnode:
 					     and gpio8)
 		    gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
 		    gpio1-gpio12 for pm8150l (hole on gpio7)
+		    gpio1-gpio10 for pmm8155au-1 (holes on gpio2, gpio5, gpio7
+					          and gpio8)
+		    gpio1-gpio10 for pmm8155au-2 (holes on gpio2, gpio5, gpio7)
 		    gpio1-gpio10 for pm8350
 		    gpio1-gpio8 for pm8350b
 		    gpio1-gpio9 for pm8350c
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 3/8] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
  2021-06-07 11:38 ` [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics Bhupesh Sharma
  2021-06-07 11:38 ` [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-11  2:59   ` Bjorn Andersson
  2021-06-07 11:38 ` [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board Bhupesh Sharma
                   ` (4 subsequent siblings)
  7 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

SA8155p-adp board is based on Qualcomm Snapdragon sm8150
SoC.

Add support for the same.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 9b27e991bddc..b5897f1f9695 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -42,11 +42,13 @@ description: |
         sdm660
         sdm845
         sdx55
+        sm8150
         sm8250
         sm8350
 
   The 'board' element must be one of the following strings:
 
+        adp
         cdp
         cp01-c1
         dragonboard
@@ -198,6 +200,12 @@ properties:
               - qcom,ipq6018-cp01-c1
           - const: qcom,ipq6018
 
+      - items:
+          - enum:
+              - qcom,sa8155p-adp
+              - qcom,sm8150-mtp
+          - const: qcom,sm8150
+
       - items:
           - enum:
               - qcom,qrb5165-rb5
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
                   ` (2 preceding siblings ...)
  2021-06-07 11:38 ` [PATCH 3/8] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-07 12:09   ` Andy Shevchenko
  2021-06-07 11:38 ` [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp Bhupesh Sharma
                   ` (3 subsequent siblings)
  7 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

SA8155p-adp board has two new regulator types - pmm8155au_1 and
pmm8155au_2.

The output power management circuits in these regulators include:
- FTS510 smps,
- HFS510 smps, and
- LDO510 linear regulators

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 drivers/regulator/qcom-rpmh-regulator.c | 72 +++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c
index 22fec370fa61..d0a3c6527568 100644
--- a/drivers/regulator/qcom-rpmh-regulator.c
+++ b/drivers/regulator/qcom-rpmh-regulator.c
@@ -883,6 +883,70 @@ static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
 	{},
 };
 
+static const struct rpmh_vreg_init_data pmm8155au_1_vreg_data[] = {
+	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
+	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
+	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
+	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510, "vdd-s4"),
+	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510, "vdd-s5"),
+	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
+	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
+	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
+	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
+	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
+	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l8-l11"),
+	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l10"),
+	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9"),
+	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l1-l8-l11"),
+	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9"),
+	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l2-l10"),
+	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_nldo,      "vdd-l1-l8-l11"),
+	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l13-l16-l17"),
+	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,      "vdd-l13-l16-l17"),
+	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,      "vdd-l13-l16-l17"),
+	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	{},
+};
+
+static const struct rpmh_vreg_init_data pmm8155au_2_vreg_data[] = {
+	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
+	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
+	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
+	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510, "vdd-s4"),
+	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510, "vdd-s5"),
+	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
+	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
+	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
+	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
+	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
+	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l8-l11"),
+	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l10"),
+	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9"),
+	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,	 "vdd-l1-l8-l11"),
+	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9"),
+	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l2-l10"),
+	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_nldo,      "vdd-l1-l8-l11"),
+	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l13-l16-l17"),
+	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
+	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,      "vdd-l13-l16-l17"),
+	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,      "vdd-l13-l16-l17"),
+	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
+	{},
+};
+
 static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
@@ -1143,6 +1207,14 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
 		.compatible = "qcom,pm8150l-rpmh-regulators",
 		.data = pm8150l_vreg_data,
 	},
+	{
+		.compatible = "qcom,pmm8155au-1-rpmh-regulators",
+		.data = pmm8155au_1_vreg_data,
+	},
+	{
+		.compatible = "qcom,pmm8155au-2-rpmh-regulators",
+		.data = pmm8155au_2_vreg_data,
+	},
 	{
 		.compatible = "qcom,pm8350-rpmh-regulators",
 		.data = pm8350_vreg_data,
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
                   ` (3 preceding siblings ...)
  2021-06-07 11:38 ` [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-11  3:00   ` Bjorn Andersson
  2021-06-07 11:38 ` [PATCH 6/8] arm64: dts: qcom: pmm8155au_1: Add base dts file Bhupesh Sharma
                   ` (2 subsequent siblings)
  7 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose
the following PMIC GPIO blocks:

- PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)
- PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)

Add support for the same in the pinctrl driver.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
index 00870da0c94e..890c44b6e198 100644
--- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
+++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
@@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {
 	{ .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },
 	/* pm8150l has 12 GPIOs with holes on 7 */
 	{ .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },
+	/* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */
+	{ .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },
+	/* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */
+	{ .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },
 	{ .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },
 	{ .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },
 	{ .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 6/8] arm64: dts: qcom: pmm8155au_1: Add base dts file
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
                   ` (4 preceding siblings ...)
  2021-06-07 11:38 ` [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-11  3:12   ` Bjorn Andersson
  2021-06-07 11:38 ` [PATCH 7/8] arm64: dts: qcom: pmm8155au_2: " Bhupesh Sharma
  2021-06-07 11:38 ` [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: " Bhupesh Sharma
  7 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

Add base DTS file for pmm8155au_1 along with GPIOs, power-on, rtc and vadc
nodes.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 134 ++++++++++++++++++++++
 1 file changed, 134 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi

diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
new file mode 100644
index 000000000000..2392c742021d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+
+/ {
+	thermal-zones {
+		pmm8155au-1-thermal {
+			polling-delay-passive = <100>;
+			polling-delay = <0>;
+
+			thermal-sensors = <&pmm8155au_1_temp>;
+
+			trips {
+				trip0 {
+					temperature = <95000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+
+				trip1 {
+					temperature = <115000>;
+					hysteresis = <0>;
+					type = "hot";
+				};
+
+				trip2 {
+					temperature = <145000>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+	};
+};
+
+&spmi_bus {
+	pmm8155au_1_0: pmic@0 {
+		compatible = "qcom,pmm8155au-1", "qcom,spmi-pmic";
+		reg = <0x0 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pon: power-on@800 {
+			compatible = "qcom,pm8916-pon";
+			reg = <0x0800>;
+			pwrkey {
+				compatible = "qcom,pm8941-pwrkey";
+				interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
+				debounce = <15625>;
+				bias-pull-up;
+				linux,code = <KEY_POWER>;
+
+				status = "disabled";
+			};
+		};
+
+		pmm8155au_1_temp: temp-alarm@2400 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0x2400>;
+			interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+			io-channels = <&pmm8155au_1_adc ADC5_DIE_TEMP>;
+			io-channel-names = "thermal";
+			#thermal-sensor-cells = <0>;
+		};
+
+		pmm8155au_1_adc: adc@3100 {
+			compatible = "qcom,spmi-adc5";
+			reg = <0x3100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#io-channel-cells = <1>;
+			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+			ref-gnd@0 {
+				reg = <ADC5_REF_GND>;
+				qcom,pre-scaling = <1 1>;
+				label = "ref_gnd";
+			};
+
+			vref-1p25@1 {
+				reg = <ADC5_1P25VREF>;
+				qcom,pre-scaling = <1 1>;
+				label = "vref_1p25";
+			};
+
+			die-temp@6 {
+				reg = <ADC5_DIE_TEMP>;
+				qcom,pre-scaling = <1 1>;
+				label = "die_temp";
+			};
+		};
+
+		pmm8155au_1_adc_tm: adc-tm@3500 {
+			compatible = "qcom,spmi-adc-tm5";
+			reg = <0x3500>;
+			interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+			#thermal-sensor-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		pmm8155au_1_rtc: rtc@6000 {
+			compatible = "qcom,pm8941-rtc";
+			reg = <0x6000>;
+			reg-names = "rtc", "alarm";
+			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+
+			status = "disabled";
+		};
+
+		pmm8155au_1_gpios: gpio@c000 {
+			compatible = "qcom,pmm8155au-1-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	pmic@1 {
+		compatible = "qcom,pmm8155au-1", "qcom,spmi-pmic";
+		reg = <0x1 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 7/8] arm64: dts: qcom: pmm8155au_2: Add base dts file
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
                   ` (5 preceding siblings ...)
  2021-06-07 11:38 ` [PATCH 6/8] arm64: dts: qcom: pmm8155au_1: Add base dts file Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-11  3:13   ` Bjorn Andersson
  2021-06-07 11:38 ` [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: " Bhupesh Sharma
  7 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

Add base DTS file for pmm8155au_2 along with GPIOs, power-on, rtc and vadc
nodes.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++
 1 file changed, 107 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi

diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
new file mode 100644
index 000000000000..11c0c203a4e2
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+/ {
+	thermal-zones {
+		pmm8155au-2-thermal {
+			polling-delay-passive = <100>;
+			polling-delay = <0>;
+
+			thermal-sensors = <&pmm8155au_2_temp>;
+
+			trips {
+				trip0 {
+					temperature = <95000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+
+				trip1 {
+					temperature = <115000>;
+					hysteresis = <0>;
+					type = "hot";
+				};
+
+				trip2 {
+					temperature = <145000>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+	};
+};
+
+&spmi_bus {
+	pmic@4 {
+		compatible = "qcom,pmm8155au-2", "qcom,spmi-pmic";
+		reg = <0x4 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		power-on@800 {
+			compatible = "qcom,pm8916-pon";
+			reg = <0x0800>;
+
+			status = "disabled";
+		};
+
+		pmm8155au_2_temp: temp-alarm@2400 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0x2400>;
+			interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+			io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>;
+			io-channel-names = "thermal";
+			#thermal-sensor-cells = <0>;
+		};
+
+		pmm8155au_2_adc: adc@3100 {
+			compatible = "qcom,spmi-adc5";
+			reg = <0x3100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#io-channel-cells = <1>;
+			interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+			ref-gnd@0 {
+				reg = <ADC5_REF_GND>;
+				qcom,pre-scaling = <1 1>;
+				label = "ref_gnd";
+			};
+
+			vref-1p25@1 {
+				reg = <ADC5_1P25VREF>;
+				qcom,pre-scaling = <1 1>;
+				label = "vref_1p25";
+			};
+
+			die-temp@6 {
+				reg = <ADC5_DIE_TEMP>;
+				qcom,pre-scaling = <1 1>;
+				label = "die_temp";
+			};
+		};
+
+		pmm8155au_2_gpios: gpio@c000 {
+			compatible = "qcom,pmm8155au-2-gpio";
+			reg = <0xc000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	pmic@5 {
+		compatible = "qcom,pmm8155au-2", "qcom,spmi-pmic";
+		reg = <0x5 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: Add base dts file
  2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
                   ` (6 preceding siblings ...)
  2021-06-07 11:38 ` [PATCH 7/8] arm64: dts: qcom: pmm8155au_2: " Bhupesh Sharma
@ 2021-06-07 11:38 ` Bhupesh Sharma
  2021-06-07 15:22   ` Vinod Koul
  2021-06-11  2:25   ` Bjorn Andersson
  7 siblings, 2 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 11:38 UTC (permalink / raw)
  To: linux-arm-msm
  Cc: bhupesh.sharma, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

Add base DTS file for sa8155p-adp and enable boot to console,
tlmm reserved range and also include pmic file(s).

SA8155p-adp board is based on sm8150 Qualcomm Snapdragon SoC.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 363 +++++++++++++++++++++++
 2 files changed, 364 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 456502aeee49..38d3a4728871 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -71,6 +71,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-xiaomi-beryllium.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-hdk.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-hdk.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-mtp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8350-hdk.dtb
diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
new file mode 100644
index 000000000000..470d740e060a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
@@ -0,0 +1,363 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Linaro Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "sm8150.dtsi"
+#include "pmm8155au_1.dtsi"
+#include "pmm8155au_2.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SA8155P ADP";
+	compatible = "qcom,sa8155p-adp";
+
+	aliases {
+		serial0 = &uart2;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	vreg_3p3: vreg_3p3_regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_3p3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	/*
+	 * Apparently RPMh does not provide support for PM8150 S4 because it
+	 * is always-on; model it as a fixed regulator.
+	 */
+	vreg_s4a_1p8: smps4 {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_s4a_1p8";
+
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+
+		regulator-always-on;
+		regulator-boot-on;
+
+		vin-supply = <&vreg_3p3>;
+	};
+};
+
+&apps_rsc {
+	pmm8155au-1-rpmh-regulators {
+		compatible = "qcom,pmm8155au-1-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vdd-s1-supply = <&vreg_3p3>;
+		vdd-s2-supply = <&vreg_3p3>;
+		vdd-s3-supply = <&vreg_3p3>;
+		vdd-s4-supply = <&vreg_3p3>;
+		vdd-s5-supply = <&vreg_3p3>;
+		vdd-s6-supply = <&vreg_3p3>;
+		vdd-s7-supply = <&vreg_3p3>;
+		vdd-s8-supply = <&vreg_3p3>;
+		vdd-s9-supply = <&vreg_3p3>;
+		vdd-s10-supply = <&vreg_3p3>;
+
+		vdd-l1-l8-l11-supply = <&vreg_s6a_0p92>;
+		vdd-l2-l10-supply = <&vreg_3p3>;
+		vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p92>;
+		vdd-l6-l9-supply = <&vreg_s6a_0p92>;
+		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
+		vdd-l13-l16-l17-supply = <&vreg_3p3>;
+
+		vreg_s5a_2p04: smps5 {
+			regulator-min-microvolt = <1904000>;
+			regulator-max-microvolt = <2000000>;
+		};
+
+		vreg_s6a_0p92: smps6 {
+			regulator-min-microvolt = <920000>;
+			regulator-max-microvolt = <1128000>;
+		};
+
+		vdda_wcss_pll:
+		vreg_l1a_0p752: ldo1 {
+			regulator-min-microvolt = <752000>;
+			regulator-max-microvolt = <752000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdda_usb_hs_3p1:
+		vreg_l2a_3p072: ldo2 {
+			regulator-min-microvolt = <3072000>;
+			regulator-max-microvolt = <3072000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3a_0p8: ldo3 {
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdd_usb_hs_core:
+		vdda_pll_hv_cc_ebi01:
+		vdda_pll_hv_cc_ebi23:
+		vdda_ufs_2ln_core:
+		vdda_ufs_2ln_core:
+		vdda_usb_ss_core:
+		vdda_usb_ss_dp_core_1:
+		vdda_usb_ss_dp_core_2:
+		vdda_sp_sensor:
+		vdda_qlink_lv:
+		vdda_qlink_lv_ck:
+		vdda_qrefs_0p875_5:
+		vreg_l5a_0p88: ldo5 {
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a_1p8: ldo7 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10a_2p96: ldo10 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11a_0p8: ldo11 {
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdd_qfprom:
+		vdd_qfprom_sp:
+		vdda_usb_hs_1p8:
+		vdda_apc_cs_1p8:
+		vdda_gfx_cs_1p8:
+		vddpx_11:
+		vreg_l12a_1p8: ldo12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a_2p7: ldo13 {
+			regulator-min-microvolt = <2704000>;
+			regulator-max-microvolt = <2704000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15a_1p7: ldo15 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1704000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16a_2p7: ldo16 {
+			regulator-min-microvolt = <2704000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17a_2p96: ldo17 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	pmm8155au-2-rpmh-regulators {
+		compatible = "qcom,pmm8155au-2-rpmh-regulators";
+		qcom,pmic-id = "c";
+
+		vdd-s1-supply = <&vreg_3p3>;
+		vdd-s2-supply = <&vreg_3p3>;
+		vdd-s3-supply = <&vreg_3p3>;
+		vdd-s4-supply = <&vreg_3p3>;
+		vdd-s5-supply = <&vreg_3p3>;
+		vdd-s6-supply = <&vreg_3p3>;
+		vdd-s7-supply = <&vreg_3p3>;
+		vdd-s8-supply = <&vreg_3p3>;
+		vdd-s9-supply = <&vreg_3p3>;
+		vdd-s10-supply = <&vreg_3p3>;
+
+		vdd-l1-l8-l11-supply = <&vreg_s4c_1p352>;
+		vdd-l2-l10-supply = <&vreg_3p3>;
+		vdd-l3-l4-l5-l18-supply = <&vreg_s4c_1p352>;
+		vdd-l6-l9-supply = <&vreg_s6c_1p128>;
+		vdd-l7-l12-l14-l15-supply = <&vreg_s5c_2p04>;
+		vdd-l13-l16-l17-supply = <&vreg_3p3>;
+
+		vreg_s4c_1p352: smps4 {
+			regulator-min-microvolt = <1352000>;
+			regulator-max-microvolt = <1352000>;
+		};
+
+		vreg_s5c_2p04: smps5 {
+			regulator-min-microvolt = <1904000>;
+			regulator-max-microvolt = <2000000>;
+		};
+
+		vreg_s6c_1p128: smps6 {
+			regulator-min-microvolt = <1128000>;
+			regulator-max-microvolt = <1128000>;
+		};
+
+		vdda_wcss_adcdac_1:
+		vdda_wcss_adcdac_2:
+		vreg_l1c_1p304: ldo1 {
+			regulator-min-microvolt = <1304000>;
+			regulator-max-microvolt = <1304000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_5:
+		vreg_l2c_1p808: ldo2 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <2928000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_10:
+		vreg_l5c_1p2: ldo5 {
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7c_1p8: ldo7 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdda_qlink_hv_ck:
+		vdda_pcie_1ln_pll_1p2:
+		vdda_pcie_2ln_pll_1p2:
+		vdda_hv_refgen0:
+		vdda_ufs_2ln_1p2:
+		vdda_usb_ss_1p2:
+		vdda_usb_ss_dp_1p2:
+		vdda_csi_1p2:
+		vdda_dsi_1p2:
+		vreg_l8c_1p2: ldo8 {
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10c_3p3: ldo10 {
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11c_0p8: ldo11 {
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_6:
+		vreg_l12c_1p808: ldo12 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <2928000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vddpx_2:
+		vreg_l13c_2p96: ldo13 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15c_1p9: ldo15 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <2928000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16c_3p008: ldo16 {
+			regulator-min-microvolt = <3008000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vdda_pcie_1ln_core:
+		vdda_pcie_2ln_core:
+		vdda_csi_0_0p9:
+		vdda_csi_1_0p9:
+		vdda_csi_2_0p9:
+		vdda_csi_3_0p9:
+		vreg_l18c_0p88: ldo18 {
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+};
+
+&tlmm {
+	gpio-reserved-ranges = <0 4>;
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&ufs_mem_hc {
+	status = "okay";
+
+	reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
+
+	vcc-supply = <&vreg_l10a_2p96>;
+	vcc-max-microamp = <750000>;
+	vccq-supply = <&vreg_l5c_1p2>;
+	vccq-max-microamp = <700000>;
+	vccq2-supply = <&vreg_s4a_1p8>;
+	vccq2-max-microamp = <750000>;
+};
+
+&ufs_mem_phy {
+	status = "okay";
+
+	vdda-phy-supply = <&vreg_l8c_1p2>;
+	vdda-max-microamp = <87100>;
+	vdda-pll-supply = <&vreg_l5a_0p88>;
+	vdda-pll-max-microamp = <18300>;
+};
+
+
+&usb_1_hsphy {
+	status = "okay";
+	vdda-pll-supply = <&vdd_usb_hs_core>;
+	vdda33-supply = <&vdda_usb_hs_3p1>;
+	vdda18-supply = <&vdda_usb_hs_1p8>;
+};
+
+&usb_1_qmpphy {
+	status = "okay";
+	vdda-phy-supply = <&vreg_l8c_1p2>;
+	vdda-pll-supply = <&vdda_usb_ss_dp_core_1>;
+};
+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "peripheral";
+};
+
+&qupv3_id_1 {
+	status = "okay";
+};
-- 
2.31.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board
  2021-06-07 11:38 ` [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board Bhupesh Sharma
@ 2021-06-07 12:09   ` Andy Shevchenko
  2021-06-07 12:30     ` Bhupesh Sharma
  0 siblings, 1 reply; 32+ messages in thread
From: Andy Shevchenko @ 2021-06-07 12:09 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon, Jun 7, 2021 at 2:41 PM Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
>
> SA8155p-adp board has two new regulator types - pmm8155au_1 and
> pmm8155au_2.
>
> The output power management circuits in these regulators include:
> - FTS510 smps,
> - HFS510 smps, and
> - LDO510 linear regulators

...

> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com

Use --cc or similar option when run `git send-email`, no need to
pollute the commit message with these.

...

> +static const struct rpmh_vreg_init_data pmm8155au_1_vreg_data[] = {


> +       {},

Comma is not needed in the terminator line.

> +};

-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board
  2021-06-07 12:09   ` Andy Shevchenko
@ 2021-06-07 12:30     ` Bhupesh Sharma
  2021-06-14 16:17       ` Bjorn Andersson
  0 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 12:30 UTC (permalink / raw)
  To: Andy Shevchenko
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon, 7 Jun 2021 at 17:39, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Mon, Jun 7, 2021 at 2:41 PM Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
> >
> > SA8155p-adp board has two new regulator types - pmm8155au_1 and
> > pmm8155au_2.
> >
> > The output power management circuits in these regulators include:
> > - FTS510 smps,
> > - HFS510 smps, and
> > - LDO510 linear regulators
>
> ...
>
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com
>
> Use --cc or similar option when run `git send-email`, no need to
> pollute the commit message with these.

It's just a matter of preference IMO. I prefer to use a Cc list
here.

> > +static const struct rpmh_vreg_init_data pmm8155au_1_vreg_data[] = {
>
>
> > +       {},
>
> Comma is not needed in the terminator line.

Hmm.. it's similar to the syntax already used at several places in this file.
See ' struct rpmh_vreg_init_data pm8150l_vreg_data[] ' for example.

Unless there is an obvious issue with it, let's use the same to keep
things similar from a syntax p-o-v.

Thanks,
Bhupesh

>
> > +};
>
> --
> With Best Regards,
> Andy Shevchenko

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: Add base dts file
  2021-06-07 11:38 ` [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: " Bhupesh Sharma
@ 2021-06-07 15:22   ` Vinod Koul
  2021-06-07 21:22     ` Bhupesh Sharma
  2021-06-11  2:25   ` Bjorn Andersson
  1 sibling, 1 reply; 32+ messages in thread
From: Vinod Koul @ 2021-06-07 15:22 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Rob Herring, Andy Gross, devicetree,
	linux-kernel, linux-gpio, bhupesh.linux

On 07-06-21, 17:08, Bhupesh Sharma wrote:
> Add base DTS file for sa8155p-adp and enable boot to console,
> tlmm reserved range and also include pmic file(s).

I see ufs added too, pls mention that as well

 --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -71,6 +71,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-xiaomi-beryllium.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-hdk.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb

I think this should go before sdm..


> +		vdd_usb_hs_core:
> +		vdda_pll_hv_cc_ebi01:
> +		vdda_pll_hv_cc_ebi23:
> +		vdda_ufs_2ln_core:
> +		vdda_ufs_2ln_core:
> +		vdda_usb_ss_core:
> +		vdda_usb_ss_dp_core_1:
> +		vdda_usb_ss_dp_core_2:
> +		vdda_sp_sensor:
> +		vdda_qlink_lv:
> +		vdda_qlink_lv_ck:
> +		vdda_qrefs_0p875_5:

I didnt find these labels very useful, so maybe remove?
It helped me to understand that a regulator is vreg_l5a_0p88 as it
implies I am using l5a with 0p88V :)

> +		vreg_l5a_0p88: ldo5 {
> +			regulator-min-microvolt = <880000>;
> +			regulator-max-microvolt = <880000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

Pls do add regulator-name property, it helps in understanding which ldo
in logs/debugfs, otherwise ldo5 will comes for both pmics

-- 
~Vinod

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: Add base dts file
  2021-06-07 15:22   ` Vinod Koul
@ 2021-06-07 21:22     ` Bhupesh Sharma
  0 siblings, 0 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-07 21:22 UTC (permalink / raw)
  To: Vinod Koul
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Bjorn Andersson, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

Hi Vinod,

Thanks for your review.

On Mon, 7 Jun 2021 at 20:52, Vinod Koul <vkoul@kernel.org> wrote:
>
> On 07-06-21, 17:08, Bhupesh Sharma wrote:
> > Add base DTS file for sa8155p-adp and enable boot to console,
> > tlmm reserved range and also include pmic file(s).
>
> I see ufs added too, pls mention that as well

Oops, missed that. Will fix it in v2.

>  --- a/arch/arm64/boot/dts/qcom/Makefile
> > +++ b/arch/arm64/boot/dts/qcom/Makefile
> > @@ -71,6 +71,7 @@ dtb-$(CONFIG_ARCH_QCOM)     += sdm845-xiaomi-beryllium.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sdm850-lenovo-yoga-c630.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sm8150-hdk.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sm8150-mtp.dtb
> > +dtb-$(CONFIG_ARCH_QCOM)      += sa8155p-adp.dtb
>
> I think this should go before sdm..

Oh, ok, I thought of keeping all boards based on sm8150 SoC together.
But alphabetically, it makes more sense to put it earlier.

> > +             vdd_usb_hs_core:
> > +             vdda_pll_hv_cc_ebi01:
> > +             vdda_pll_hv_cc_ebi23:
> > +             vdda_ufs_2ln_core:
> > +             vdda_ufs_2ln_core:
> > +             vdda_usb_ss_core:
> > +             vdda_usb_ss_dp_core_1:
> > +             vdda_usb_ss_dp_core_2:
> > +             vdda_sp_sensor:
> > +             vdda_qlink_lv:
> > +             vdda_qlink_lv_ck:
> > +             vdda_qrefs_0p875_5:
>
> I didnt find these labels very useful, so maybe remove?
> It helped me to understand that a regulator is vreg_l5a_0p88 as it
> implies I am using l5a with 0p88V :)

While a few labels like 'vdd_usb_hs_core' are used in this patch (for
example) to denote 'vdda-pll-supply ' of 'usb_1_hsphy', the others
would be required as we enable further on-boards peripherals in the
dts.

I will recheck and limit these further in v2.

> > +             vreg_l5a_0p88: ldo5 {
> > +                     regulator-min-microvolt = <880000>;
> > +                     regulator-max-microvolt = <880000>;
> > +                     regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>
> Pls do add regulator-name property, it helps in understanding which ldo
> in logs/debugfs, otherwise ldo5 will comes for both pmics

That's a good point. Will fix this in v2.

Regards,
Bhupesh

> --
> ~Vinod

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: Add base dts file
  2021-06-07 11:38 ` [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: " Bhupesh Sharma
  2021-06-07 15:22   ` Vinod Koul
@ 2021-06-11  2:25   ` Bjorn Andersson
  2021-06-14  8:19     ` Bhupesh Sharma
  2021-06-15  4:41     ` Bhupesh Sharma
  1 sibling, 2 replies; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-11  2:25 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree, linux-kernel,
	linux-gpio, bhupesh.linux

On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> Add base DTS file for sa8155p-adp and enable boot to console,

Please spell out "sa8155-adp", i.e. "Add base DTS for SA8155p Automotive
Development Platform."

> tlmm reserved range and also include pmic file(s).
> 
> SA8155p-adp board is based on sm8150 Qualcomm Snapdragon SoC.
> 

It's not based on sm8150, it's based on sa8155p, so let's express this
as "The SA8155p platform is similar to the SM8150, so use this as base
for now", to document why we decided to do this.

> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com

This would go into the git history as "I specifically asked for input
from these people", so please keep this list shorter (but for a change
like this it's probably better to omit it completely)

> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/Makefile        |   1 +
>  arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 363 +++++++++++++++++++++++
>  2 files changed, 364 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 456502aeee49..38d3a4728871 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -71,6 +71,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-xiaomi-beryllium.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-hdk.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-hdk.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8350-hdk.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
> new file mode 100644
> index 000000000000..470d740e060a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
> @@ -0,0 +1,363 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, Linaro Limited
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "sm8150.dtsi"
> +#include "pmm8155au_1.dtsi"
> +#include "pmm8155au_2.dtsi"
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. SA8155P ADP";
> +	compatible = "qcom,sa8155p-adp";
> +
> +	aliases {
> +		serial0 = &uart2;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	vreg_3p3: vreg_3p3_regulator {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vreg_3p3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +	};
> +
> +	/*
> +	 * Apparently RPMh does not provide support for PM8150 S4 because it
> +	 * is always-on; model it as a fixed regulator.
> +	 */

You can reduce this to

	/* S4A is always on and not controllable through RPMh */

> +	vreg_s4a_1p8: smps4 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vreg_s4a_1p8";
> +
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +
> +		regulator-always-on;
> +		regulator-boot-on;
> +
> +		vin-supply = <&vreg_3p3>;
> +	};
> +};
> +
> +&apps_rsc {
> +	pmm8155au-1-rpmh-regulators {
> +		compatible = "qcom,pmm8155au-1-rpmh-regulators";
> +		qcom,pmic-id = "a";
> +
> +		vdd-s1-supply = <&vreg_3p3>;
> +		vdd-s2-supply = <&vreg_3p3>;
> +		vdd-s3-supply = <&vreg_3p3>;
> +		vdd-s4-supply = <&vreg_3p3>;
> +		vdd-s5-supply = <&vreg_3p3>;
> +		vdd-s6-supply = <&vreg_3p3>;
> +		vdd-s7-supply = <&vreg_3p3>;
> +		vdd-s8-supply = <&vreg_3p3>;
> +		vdd-s9-supply = <&vreg_3p3>;
> +		vdd-s10-supply = <&vreg_3p3>;
> +
> +		vdd-l1-l8-l11-supply = <&vreg_s6a_0p92>;
> +		vdd-l2-l10-supply = <&vreg_3p3>;
> +		vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p92>;
> +		vdd-l6-l9-supply = <&vreg_s6a_0p92>;
> +		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
> +		vdd-l13-l16-l17-supply = <&vreg_3p3>;
> +
> +		vreg_s5a_2p04: smps5 {
> +			regulator-min-microvolt = <1904000>;
> +			regulator-max-microvolt = <2000000>;
> +		};
> +
> +		vreg_s6a_0p92: smps6 {
> +			regulator-min-microvolt = <920000>;
> +			regulator-max-microvolt = <1128000>;
> +		};
> +
> +		vdda_wcss_pll:

This is the "label" of the pad which the regulator typically is
connected to (rather than a denotion of which regulator it is). So even
though we have these in some of the other boards, I would prefer if you
skip them and only use the vreg_xyz_abc variant.

> +		vreg_l1a_0p752: ldo1 {
> +			regulator-min-microvolt = <752000>;
> +			regulator-max-microvolt = <752000>;
> +			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> +		};
[..]
> +&usb_1_dwc3 {
> +	dr_mode = "peripheral";

We have enough pieces to handle mode switching on this platform, but as
discussed, lets leave it as "peripheral" until your local setup is back
online.

Thanks,
Bjorn

> +};
> +
> +&qupv3_id_1 {
> +	status = "okay";
> +};
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics
  2021-06-07 11:38 ` [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics Bhupesh Sharma
@ 2021-06-11  2:48   ` Bjorn Andersson
  2021-06-14  8:05     ` Bhupesh Sharma
  0 siblings, 1 reply; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-11  2:48 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree, linux-kernel,
	linux-gpio, bhupesh.linux

On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> Add compatible strings for pmm8155au_1 and pmm8155au_2 pmics
> found on SA8155p-adp board.
> 
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml      | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> index e561a5b941e4..ea5cd71aa0c7 100644
> --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> @@ -55,6 +55,8 @@ properties:
>        - qcom,pm8009-1-rpmh-regulators
>        - qcom,pm8150-rpmh-regulators
>        - qcom,pm8150l-rpmh-regulators
> +      - qcom,pmm8155au-1-rpmh-regulators
> +      - qcom,pmm8155au-2-rpmh-regulators

Looking at the component documentation and the schematics I think the
component is "PMM8155AU" and we have two of them.

Unless I'm mistaken we should have the compatible describe the single
component and we should have DT describe the fact that we have 2 of
them.

Regards,
Bjorn

>        - qcom,pm8350-rpmh-regulators
>        - qcom,pm8350c-rpmh-regulators
>        - qcom,pm8998-rpmh-regulators
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp
  2021-06-07 11:38 ` [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp Bhupesh Sharma
@ 2021-06-11  2:51   ` Bjorn Andersson
  2021-06-14  8:13     ` Bhupesh Sharma
  0 siblings, 1 reply; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-11  2:51 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree, linux-kernel,
	linux-gpio, bhupesh.linux

On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> Add pmic-gpio compatible strings for pmm8155au_1 and pmm8155au_2 pmics
> found on SA8155p-adp board.
> 
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> index f6a9760558a6..ee4721f1c477 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> @@ -27,6 +27,8 @@ PMIC's from Qualcomm.
>  		    "qcom,pm660l-gpio"
>  		    "qcom,pm8150-gpio"
>  		    "qcom,pm8150b-gpio"
> +		    "qcom,pmm8155au-1-gpio"
> +		    "qcom,pmm8155au-2-gpio"

As with the regulator this seems to be a single component.

>  		    "qcom,pm8350-gpio"
>  		    "qcom,pm8350b-gpio"
>  		    "qcom,pm8350c-gpio"
> @@ -116,6 +118,9 @@ to specify in a pin configuration subnode:
>  					     and gpio8)
>  		    gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
>  		    gpio1-gpio12 for pm8150l (hole on gpio7)
> +		    gpio1-gpio10 for pmm8155au-1 (holes on gpio2, gpio5, gpio7
> +					          and gpio8)
> +		    gpio1-gpio10 for pmm8155au-2 (holes on gpio2, gpio5, gpio7)

In the schematics all 10 pins are wired on both of these PMICs, so I
don't think there are holes. Please omit the comment.

Thanks,
Bjorn

>  		    gpio1-gpio10 for pm8350
>  		    gpio1-gpio8 for pm8350b
>  		    gpio1-gpio9 for pm8350c
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 3/8] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board
  2021-06-07 11:38 ` [PATCH 3/8] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board Bhupesh Sharma
@ 2021-06-11  2:59   ` Bjorn Andersson
  2021-06-14  8:14     ` Bhupesh Sharma
  0 siblings, 1 reply; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-11  2:59 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree, linux-kernel,
	linux-gpio, bhupesh.linux

On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> SA8155p-adp board is based on Qualcomm Snapdragon sm8150
> SoC.
> 
> Add support for the same.

The SA8155p is similar to SM8150 and we can reuse most things, but I
think we can afford to add qcom,sa8155p in the DT bindings.

> 
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index 9b27e991bddc..b5897f1f9695 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> @@ -42,11 +42,13 @@ description: |
>          sdm660
>          sdm845
>          sdx55
> +        sm8150

Naturally sm8150 should be part of this list, but please also add
sa8155p as well.

>          sm8250
>          sm8350
>  
>    The 'board' element must be one of the following strings:
>  
> +        adp
>          cdp
>          cp01-c1
>          dragonboard
> @@ -198,6 +200,12 @@ properties:
>                - qcom,ipq6018-cp01-c1
>            - const: qcom,ipq6018
>  
> +      - items:
> +          - enum:
> +              - qcom,sa8155p-adp
> +              - qcom,sm8150-mtp
> +          - const: qcom,sm8150

And please split this in two (one qcom,sm8150-mtp and qcom,sm8150, and
one qcom,sa8155p-adp and qcom,sa8155p).

And note that this is saying that your compatible needs to be one of the
enum entries, followed by the const, but in your dts you only specified
qcom,sa8155p-adp. It needs to be:

	compatible = "qcom,sa8155p-adp", "qcom,sa8155p";

Thanks,
Bjorn

> +
>        - items:
>            - enum:
>                - qcom,qrb5165-rb5
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp
  2021-06-07 11:38 ` [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp Bhupesh Sharma
@ 2021-06-11  3:00   ` Bjorn Andersson
  2021-06-14  8:30     ` Bhupesh Sharma
  0 siblings, 1 reply; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-11  3:00 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree, linux-kernel,
	linux-gpio, bhupesh.linux

On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose
> the following PMIC GPIO blocks:
> 
> - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)
> - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)
> 
> Add support for the same in the pinctrl driver.
> 
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> index 00870da0c94e..890c44b6e198 100644
> --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {
>  	{ .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },
>  	/* pm8150l has 12 GPIOs with holes on 7 */
>  	{ .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },
> +	/* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */
> +	{ .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },

As noted in the binding, I think this should be "qcom,pmm8155au-gpio"
and please skip the comment about the holes.

Thanks,
Bjorn

> +	/* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */
> +	{ .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },
>  	{ .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },
>  	{ .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },
>  	{ .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 6/8] arm64: dts: qcom: pmm8155au_1: Add base dts file
  2021-06-07 11:38 ` [PATCH 6/8] arm64: dts: qcom: pmm8155au_1: Add base dts file Bhupesh Sharma
@ 2021-06-11  3:12   ` Bjorn Andersson
  0 siblings, 0 replies; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-11  3:12 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree, linux-kernel,
	linux-gpio, bhupesh.linux

On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> Add base DTS file for pmm8155au_1 along with GPIOs, power-on, rtc and vadc
> nodes.
> 
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 134 ++++++++++++++++++++++
>  1 file changed, 134 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi

As we describe our PMICs by including their definition to the top level
of the .dts I don't see any alternative to duplicating this as _1 and
_2. So let's go with this structure.

[..]
> +
> +&spmi_bus {
> +	pmm8155au_1_0: pmic@0 {

I don't think you need to give this a label.

> +		compatible = "qcom,pmm8155au-1", "qcom,spmi-pmic";

This is a "qcom,pmm8155au", "qcom,spmi-pmic", the labels are used to
differentiate the two instances.

> +		reg = <0x0 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
[..]
> +
> +		pmm8155au_1_gpios: gpio@c000 {
> +			compatible = "qcom,pmm8155au-1-gpio";

"qcom,pmm8155au-gpio"

> +			reg = <0xc000>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +	};
> +
> +	pmic@1 {
> +		compatible = "qcom,pmm8155au-1", "qcom,spmi-pmic";

"qcom,pmm8155au"

Thanks,
Bjorn

> +		reg = <0x1 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +	};
> +};
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 7/8] arm64: dts: qcom: pmm8155au_2: Add base dts file
  2021-06-07 11:38 ` [PATCH 7/8] arm64: dts: qcom: pmm8155au_2: " Bhupesh Sharma
@ 2021-06-11  3:13   ` Bjorn Andersson
  0 siblings, 0 replies; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-11  3:13 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree, linux-kernel,
	linux-gpio, bhupesh.linux

On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> Add base DTS file for pmm8155au_2 along with GPIOs, power-on, rtc and vadc
> nodes.
> 
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-gpio@vger.kernel.org
> Cc: bhupesh.linux@gmail.com
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++
>  1 file changed, 107 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi

As with _1, I approve of this design.

> new file mode 100644
> index 000000000000..11c0c203a4e2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
> @@ -0,0 +1,107 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2021, Linaro Limited
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +
> +/ {
> +	thermal-zones {
> +		pmm8155au-2-thermal {
> +			polling-delay-passive = <100>;
> +			polling-delay = <0>;
> +
> +			thermal-sensors = <&pmm8155au_2_temp>;
> +
> +			trips {
> +				trip0 {
> +					temperature = <95000>;
> +					hysteresis = <0>;
> +					type = "passive";
> +				};
> +
> +				trip1 {
> +					temperature = <115000>;
> +					hysteresis = <0>;
> +					type = "hot";
> +				};
> +
> +				trip2 {
> +					temperature = <145000>;
> +					hysteresis = <0>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&spmi_bus {
> +	pmic@4 {
> +		compatible = "qcom,pmm8155au-2", "qcom,spmi-pmic";

"qcom,pmm8155au", "qcom,spmi-pmic"

> +		reg = <0x4 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		power-on@800 {
> +			compatible = "qcom,pm8916-pon";
> +			reg = <0x0800>;
> +
> +			status = "disabled";
> +		};
> +
> +		pmm8155au_2_temp: temp-alarm@2400 {
> +			compatible = "qcom,spmi-temp-alarm";
> +			reg = <0x2400>;
> +			interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
> +			io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>;
> +			io-channel-names = "thermal";
> +			#thermal-sensor-cells = <0>;
> +		};
> +
> +		pmm8155au_2_adc: adc@3100 {
> +			compatible = "qcom,spmi-adc5";
> +			reg = <0x3100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			#io-channel-cells = <1>;
> +			interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> +			ref-gnd@0 {
> +				reg = <ADC5_REF_GND>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "ref_gnd";
> +			};
> +
> +			vref-1p25@1 {
> +				reg = <ADC5_1P25VREF>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "vref_1p25";
> +			};
> +
> +			die-temp@6 {
> +				reg = <ADC5_DIE_TEMP>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "die_temp";
> +			};
> +		};
> +
> +		pmm8155au_2_gpios: gpio@c000 {
> +			compatible = "qcom,pmm8155au-2-gpio";

"qcom,pmm8155-gpio"

> +			reg = <0xc000>;
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +	};
> +
> +	pmic@5 {
> +		compatible = "qcom,pmm8155au-2", "qcom,spmi-pmic";

"qcom,pmm8155au", "qcom,spmi-pmic"

Regards,
Bjorn

> +		reg = <0x5 SPMI_USID>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +	};
> +};
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics
  2021-06-11  2:48   ` Bjorn Andersson
@ 2021-06-14  8:05     ` Bhupesh Sharma
  2021-06-14 16:28       ` Bjorn Andersson
  0 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-14  8:05 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

Hello Bjorn,

Thanks for the review comments.

On Fri, 11 Jun 2021 at 08:18, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > Add compatible strings for pmm8155au_1 and pmm8155au_2 pmics
> > found on SA8155p-adp board.
> >
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml      | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > index e561a5b941e4..ea5cd71aa0c7 100644
> > --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > @@ -55,6 +55,8 @@ properties:
> >        - qcom,pm8009-1-rpmh-regulators
> >        - qcom,pm8150-rpmh-regulators
> >        - qcom,pm8150l-rpmh-regulators
> > +      - qcom,pmm8155au-1-rpmh-regulators
> > +      - qcom,pmm8155au-2-rpmh-regulators
>
> Looking at the component documentation and the schematics I think the
> component is "PMM8155AU" and we have two of them.
>
> Unless I'm mistaken we should have the compatible describe the single
> component and we should have DT describe the fact that we have 2 of
> them.

If we refer to the PM8155AU device specifications, there are two
regulators mentioned there PMM8155AU_1 and PMM8155AU_2. Although most
parameters of the regulators seem similar the smps regulator summary
for both appear different (Transient Load, mA ratings etc).

Although most of these differences don't probably matter to the Linux
world, others like the gpios on the pmic are different.

So, IMO, it makes sense to mention the different pmic types on the board.

Please let me know your views on the same.

Thanks,
Bhupesh

>
> >        - qcom,pm8350-rpmh-regulators
> >        - qcom,pm8350c-rpmh-regulators
> >        - qcom,pm8998-rpmh-regulators
> > --
> > 2.31.1
> >

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp
  2021-06-11  2:51   ` Bjorn Andersson
@ 2021-06-14  8:13     ` Bhupesh Sharma
  2021-06-14 16:09       ` Bjorn Andersson
  0 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-14  8:13 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

Hi Bjorn,

On Fri, 11 Jun 2021 at 08:21, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > Add pmic-gpio compatible strings for pmm8155au_1 and pmm8155au_2 pmics
> > found on SA8155p-adp board.
> >
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> > index f6a9760558a6..ee4721f1c477 100644
> > --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> > @@ -27,6 +27,8 @@ PMIC's from Qualcomm.
> >                   "qcom,pm660l-gpio"
> >                   "qcom,pm8150-gpio"
> >                   "qcom,pm8150b-gpio"
> > +                 "qcom,pmm8155au-1-gpio"
> > +                 "qcom,pmm8155au-2-gpio"
>
> As with the regulator this seems to be a single component.
>
> >                   "qcom,pm8350-gpio"
> >                   "qcom,pm8350b-gpio"
> >                   "qcom,pm8350c-gpio"
> > @@ -116,6 +118,9 @@ to specify in a pin configuration subnode:
> >                                            and gpio8)
> >                   gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
> >                   gpio1-gpio12 for pm8150l (hole on gpio7)
> > +                 gpio1-gpio10 for pmm8155au-1 (holes on gpio2, gpio5, gpio7
> > +                                               and gpio8)
> > +                 gpio1-gpio10 for pmm8155au-2 (holes on gpio2, gpio5, gpio7)
>
> In the schematics all 10 pins are wired on both of these PMICs, so I
> don't think there are holes. Please omit the comment.

But if we look at the downstream dts (see [1]), we clearly have holes
on gpio 2, 5 and 7 on PMM8155AU_2 whereas if we see [2], we can see
PMM8155AU_1 has holes on gpio 2, 5, 7 and 8.

As I understand, the schematics mention some optional configurations
as well which might not be available depending on the default board
configuration.

[1]. https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi?h=LV.AU.0.1.0.r1-15900-gen3meta.0#n92
[2]. https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi?h=LV.AU.0.1.0.r1-15900-gen3meta.0#n36

Regards,
Bhupesh

>
> >                   gpio1-gpio10 for pm8350
> >                   gpio1-gpio8 for pm8350b
> >                   gpio1-gpio9 for pm8350c
> > --
> > 2.31.1
> >

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 3/8] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board
  2021-06-11  2:59   ` Bjorn Andersson
@ 2021-06-14  8:14     ` Bhupesh Sharma
  0 siblings, 0 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-14  8:14 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

Hello Bjorn,

On Fri, 11 Jun 2021 at 08:29, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > SA8155p-adp board is based on Qualcomm Snapdragon sm8150
> > SoC.
> >
> > Add support for the same.
>
> The SA8155p is similar to SM8150 and we can reuse most things, but I
> think we can afford to add qcom,sa8155p in the DT bindings.

Sure will do the same in v2.

> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> > index 9b27e991bddc..b5897f1f9695 100644
> > --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> > +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> > @@ -42,11 +42,13 @@ description: |
> >          sdm660
> >          sdm845
> >          sdx55
> > +        sm8150
>
> Naturally sm8150 should be part of this list, but please also add
> sa8155p as well.

Ok.

> >          sm8250
> >          sm8350
> >
> >    The 'board' element must be one of the following strings:
> >
> > +        adp
> >          cdp
> >          cp01-c1
> >          dragonboard
> > @@ -198,6 +200,12 @@ properties:
> >                - qcom,ipq6018-cp01-c1
> >            - const: qcom,ipq6018
> >
> > +      - items:
> > +          - enum:
> > +              - qcom,sa8155p-adp
> > +              - qcom,sm8150-mtp
> > +          - const: qcom,sm8150
>
> And please split this in two (one qcom,sm8150-mtp and qcom,sm8150, and
> one qcom,sa8155p-adp and qcom,sa8155p).
>
> And note that this is saying that your compatible needs to be one of the
> enum entries, followed by the const, but in your dts you only specified
> qcom,sa8155p-adp. It needs to be:
>
>         compatible = "qcom,sa8155p-adp", "qcom,sa8155p";

Sure will do the same in v2.

Regards,
Bhupesh

> > +
> >        - items:
> >            - enum:
> >                - qcom,qrb5165-rb5
> > --
> > 2.31.1
> >

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: Add base dts file
  2021-06-11  2:25   ` Bjorn Andersson
@ 2021-06-14  8:19     ` Bhupesh Sharma
  2021-06-15  4:41     ` Bhupesh Sharma
  1 sibling, 0 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-14  8:19 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

Hello Bjorn,

On Fri, 11 Jun 2021 at 07:55, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > Add base DTS file for sa8155p-adp and enable boot to console,
>
> Please spell out "sa8155-adp", i.e. "Add base DTS for SA8155p Automotive
> Development Platform."

Ok, will do.

> > tlmm reserved range and also include pmic file(s).
> >
> > SA8155p-adp board is based on sm8150 Qualcomm Snapdragon SoC.
> >
>
> It's not based on sm8150, it's based on sa8155p, so let's express this
> as "The SA8155p platform is similar to the SM8150, so use this as base
> for now", to document why we decided to do this.
>
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com
>
> This would go into the git history as "I specifically asked for input
> from these people", so please keep this list shorter (but for a change
> like this it's probably better to omit it completely)

Ok, will keep it shorter for future series.

> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  arch/arm64/boot/dts/qcom/Makefile        |   1 +
> >  arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 363 +++++++++++++++++++++++
> >  2 files changed, 364 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts
> >
> > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> > index 456502aeee49..38d3a4728871 100644
> > --- a/arch/arm64/boot/dts/qcom/Makefile
> > +++ b/arch/arm64/boot/dts/qcom/Makefile
> > @@ -71,6 +71,7 @@ dtb-$(CONFIG_ARCH_QCOM)     += sdm845-xiaomi-beryllium.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sdm850-lenovo-yoga-c630.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sm8150-hdk.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sm8150-mtp.dtb
> > +dtb-$(CONFIG_ARCH_QCOM)      += sa8155p-adp.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sm8250-hdk.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sm8250-mtp.dtb
> >  dtb-$(CONFIG_ARCH_QCOM)      += sm8350-hdk.dtb
> > diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
> > new file mode 100644
> > index 000000000000..470d740e060a
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts
> > @@ -0,0 +1,363 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +/*
> > + * Copyright (c) 2021, Linaro Limited
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include "sm8150.dtsi"
> > +#include "pmm8155au_1.dtsi"
> > +#include "pmm8155au_2.dtsi"
> > +
> > +/ {
> > +     model = "Qualcomm Technologies, Inc. SA8155P ADP";
> > +     compatible = "qcom,sa8155p-adp";
> > +
> > +     aliases {
> > +             serial0 = &uart2;
> > +     };
> > +
> > +     chosen {
> > +             stdout-path = "serial0:115200n8";
> > +     };
> > +
> > +     vreg_3p3: vreg_3p3_regulator {
> > +             compatible = "regulator-fixed";
> > +             regulator-name = "vreg_3p3";
> > +             regulator-min-microvolt = <3300000>;
> > +             regulator-max-microvolt = <3300000>;
> > +     };
> > +
> > +     /*
> > +      * Apparently RPMh does not provide support for PM8150 S4 because it
> > +      * is always-on; model it as a fixed regulator.
> > +      */
>
> You can reduce this to
>
>         /* S4A is always on and not controllable through RPMh */
>

Ok, I wanted to keep it similar to the comment we have for sm815o-mtp,
but this is fine as well.

> > +     vreg_s4a_1p8: smps4 {
> > +             compatible = "regulator-fixed";
> > +             regulator-name = "vreg_s4a_1p8";
> > +
> > +             regulator-min-microvolt = <1800000>;
> > +             regulator-max-microvolt = <1800000>;
> > +
> > +             regulator-always-on;
> > +             regulator-boot-on;
> > +
> > +             vin-supply = <&vreg_3p3>;
> > +     };
> > +};
> > +
> > +&apps_rsc {
> > +     pmm8155au-1-rpmh-regulators {
> > +             compatible = "qcom,pmm8155au-1-rpmh-regulators";
> > +             qcom,pmic-id = "a";
> > +
> > +             vdd-s1-supply = <&vreg_3p3>;
> > +             vdd-s2-supply = <&vreg_3p3>;
> > +             vdd-s3-supply = <&vreg_3p3>;
> > +             vdd-s4-supply = <&vreg_3p3>;
> > +             vdd-s5-supply = <&vreg_3p3>;
> > +             vdd-s6-supply = <&vreg_3p3>;
> > +             vdd-s7-supply = <&vreg_3p3>;
> > +             vdd-s8-supply = <&vreg_3p3>;
> > +             vdd-s9-supply = <&vreg_3p3>;
> > +             vdd-s10-supply = <&vreg_3p3>;
> > +
> > +             vdd-l1-l8-l11-supply = <&vreg_s6a_0p92>;
> > +             vdd-l2-l10-supply = <&vreg_3p3>;
> > +             vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p92>;
> > +             vdd-l6-l9-supply = <&vreg_s6a_0p92>;
> > +             vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
> > +             vdd-l13-l16-l17-supply = <&vreg_3p3>;
> > +
> > +             vreg_s5a_2p04: smps5 {
> > +                     regulator-min-microvolt = <1904000>;
> > +                     regulator-max-microvolt = <2000000>;
> > +             };
> > +
> > +             vreg_s6a_0p92: smps6 {
> > +                     regulator-min-microvolt = <920000>;
> > +                     regulator-max-microvolt = <1128000>;
> > +             };
> > +
> > +             vdda_wcss_pll:
>
> This is the "label" of the pad which the regulator typically is
> connected to (rather than a denotion of which regulator it is). So even
> though we have these in some of the other boards, I would prefer if you
> skip them and only use the vreg_xyz_abc variant.

Ok.

> > +             vreg_l1a_0p752: ldo1 {
> > +                     regulator-min-microvolt = <752000>;
> > +                     regulator-max-microvolt = <752000>;
> > +                     regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> > +             };
> [..]
> > +&usb_1_dwc3 {
> > +     dr_mode = "peripheral";
>
> We have enough pieces to handle mode switching on this platform, but as
> discussed, lets leave it as "peripheral" until your local setup is back
> online.

Sure, in later patches, I can try playing more with this configuration.

Regards,
Bhupesh

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp
  2021-06-11  3:00   ` Bjorn Andersson
@ 2021-06-14  8:30     ` Bhupesh Sharma
  2021-06-14 16:12       ` Bjorn Andersson
  0 siblings, 1 reply; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-14  8:30 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

Hi Bjorn,

On Fri, 11 Jun 2021 at 08:30, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose
> > the following PMIC GPIO blocks:
> >
> > - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)
> > - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)
> >
> > Add support for the same in the pinctrl driver.
> >
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > index 00870da0c94e..890c44b6e198 100644
> > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {
> >       { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },
> >       /* pm8150l has 12 GPIOs with holes on 7 */
> >       { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },
> > +     /* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */
> > +     { .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },
>
> As noted in the binding, I think this should be "qcom,pmm8155au-gpio"
> and please skip the comment about the holes.

Similar to what I noted in the binding patch review thread, the pmic
gpio holes seem different as per the downstream dtsi.

So, please let me know and if required, I can make the suggested change in v2.

Thanks,
Bhupesh

> > +     /* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */
> > +     { .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },
> >       { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },
> >       { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },
> >       { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },
> > --
> > 2.31.1
> >

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp
  2021-06-14  8:13     ` Bhupesh Sharma
@ 2021-06-14 16:09       ` Bjorn Andersson
  0 siblings, 0 replies; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-14 16:09 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon 14 Jun 03:13 CDT 2021, Bhupesh Sharma wrote:

> Hi Bjorn,
> 
> On Fri, 11 Jun 2021 at 08:21, Bjorn Andersson
> <bjorn.andersson@linaro.org> wrote:
> >
> > On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
> >
> > > Add pmic-gpio compatible strings for pmm8155au_1 and pmm8155au_2 pmics
> > > found on SA8155p-adp board.
> > >
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > > Cc: Mark Brown <broonie@kernel.org>
> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > Cc: Vinod Koul <vkoul@kernel.org>
> > > Cc: Rob Herring <robh+dt@kernel.org>
> > > Cc: Andy Gross <agross@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org
> > > Cc: linux-gpio@vger.kernel.org
> > > Cc: bhupesh.linux@gmail.com
> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > ---
> > >  Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 5 +++++
> > >  1 file changed, 5 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> > > index f6a9760558a6..ee4721f1c477 100644
> > > --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> > > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt
> > > @@ -27,6 +27,8 @@ PMIC's from Qualcomm.
> > >                   "qcom,pm660l-gpio"
> > >                   "qcom,pm8150-gpio"
> > >                   "qcom,pm8150b-gpio"
> > > +                 "qcom,pmm8155au-1-gpio"
> > > +                 "qcom,pmm8155au-2-gpio"
> >
> > As with the regulator this seems to be a single component.
> >
> > >                   "qcom,pm8350-gpio"
> > >                   "qcom,pm8350b-gpio"
> > >                   "qcom,pm8350c-gpio"
> > > @@ -116,6 +118,9 @@ to specify in a pin configuration subnode:
> > >                                            and gpio8)
> > >                   gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7)
> > >                   gpio1-gpio12 for pm8150l (hole on gpio7)
> > > +                 gpio1-gpio10 for pmm8155au-1 (holes on gpio2, gpio5, gpio7
> > > +                                               and gpio8)
> > > +                 gpio1-gpio10 for pmm8155au-2 (holes on gpio2, gpio5, gpio7)
> >
> > In the schematics all 10 pins are wired on both of these PMICs, so I
> > don't think there are holes. Please omit the comment.
> 
> But if we look at the downstream dts (see [1]), we clearly have holes
> on gpio 2, 5 and 7 on PMM8155AU_2 whereas if we see [2], we can see
> PMM8155AU_1 has holes on gpio 2, 5, 7 and 8.
> 
> As I understand, the schematics mention some optional configurations
> as well which might not be available depending on the default board
> configuration.
> 
> [1]. https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi?h=LV.AU.0.1.0.r1-15900-gen3meta.0#n92
> [2]. https://source.codeaurora.org/quic/la/kernel/msm-4.14/tree/arch/arm64/boot/dts/qcom/sa8155-pmic-overlay.dtsi?h=LV.AU.0.1.0.r1-15900-gen3meta.0#n36
> 

Perhaps these "holes" means that they are reserved for use by one of the
other subsystems in the SoC - similar to how we have
gpio-reserved-ranges in the TLMM. Because according to the PMS8155AU
documentation and the schematics, there's no physical holes there.

As such, the binding and driver should not describe these "holes". If
they aren't used by Linux, then the DT won't reference them - and if
there's reasons for prohibiting Linux from touching the registers we
should use gpio-reserved-ranges, as this will depend on firmware
configuration.

Regards,
Bjorn

> Regards,
> Bhupesh
> 
> >
> > >                   gpio1-gpio10 for pm8350
> > >                   gpio1-gpio8 for pm8350b
> > >                   gpio1-gpio9 for pm8350c
> > > --
> > > 2.31.1
> > >

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp
  2021-06-14  8:30     ` Bhupesh Sharma
@ 2021-06-14 16:12       ` Bjorn Andersson
  0 siblings, 0 replies; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-14 16:12 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon 14 Jun 03:30 CDT 2021, Bhupesh Sharma wrote:

> Hi Bjorn,
> 
> On Fri, 11 Jun 2021 at 08:30, Bjorn Andersson
> <bjorn.andersson@linaro.org> wrote:
> >
> > On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
> >
> > > SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose
> > > the following PMIC GPIO blocks:
> > >
> > > - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)
> > > - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)
> > >
> > > Add support for the same in the pinctrl driver.
> > >
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > > Cc: Mark Brown <broonie@kernel.org>
> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > Cc: Vinod Koul <vkoul@kernel.org>
> > > Cc: Rob Herring <robh+dt@kernel.org>
> > > Cc: Andy Gross <agross@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org
> > > Cc: linux-gpio@vger.kernel.org
> > > Cc: bhupesh.linux@gmail.com
> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > ---
> > >  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > index 00870da0c94e..890c44b6e198 100644
> > > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {
> > >       { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },
> > >       /* pm8150l has 12 GPIOs with holes on 7 */
> > >       { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },
> > > +     /* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */
> > > +     { .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },
> >
> > As noted in the binding, I think this should be "qcom,pmm8155au-gpio"
> > and please skip the comment about the holes.
> 
> Similar to what I noted in the binding patch review thread, the pmic
> gpio holes seem different as per the downstream dtsi.
> 
> So, please let me know and if required, I can make the suggested change in v2.
> 

As noted in the binding, this really seems like software configuration.
So we should deal with this in DT (e.g. by not referencing the gpios
that Linux shouldn't touch), rather than the driver.

Regards,
Bjorn

> Thanks,
> Bhupesh
> 
> > > +     /* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */
> > > +     { .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },
> > >       { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },
> > >       { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },
> > >       { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },
> > > --
> > > 2.31.1
> > >

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board
  2021-06-07 12:30     ` Bhupesh Sharma
@ 2021-06-14 16:17       ` Bjorn Andersson
  2021-06-15  4:47         ` Bhupesh Sharma
  0 siblings, 1 reply; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-14 16:17 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: Andy Shevchenko, linux-arm-msm, Linus Walleij, Liam Girdwood,
	Mark Brown, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon 07 Jun 07:30 CDT 2021, Bhupesh Sharma wrote:

> On Mon, 7 Jun 2021 at 17:39, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> >
> > On Mon, Jun 7, 2021 at 2:41 PM Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
> > >
> > > SA8155p-adp board has two new regulator types - pmm8155au_1 and
> > > pmm8155au_2.
> > >
> > > The output power management circuits in these regulators include:
> > > - FTS510 smps,
> > > - HFS510 smps, and
> > > - LDO510 linear regulators
> >
> > ...
> >
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > > Cc: Mark Brown <broonie@kernel.org>
> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > Cc: Vinod Koul <vkoul@kernel.org>
> > > Cc: Rob Herring <robh+dt@kernel.org>
> > > Cc: Andy Gross <agross@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org
> > > Cc: linux-gpio@vger.kernel.org
> > > Cc: bhupesh.linux@gmail.com
> >
> > Use --cc or similar option when run `git send-email`, no need to
> > pollute the commit message with these.
> 
> It's just a matter of preference IMO. I prefer to use a Cc list
> here.
> 

The Cc list in the commit message will be committed to the git history
and there it carries the information that you specifically made sure
that these people saw the patch. So please limit the use to that
purpose.

> > > +static const struct rpmh_vreg_init_data pmm8155au_1_vreg_data[] = {
> >
> >
> > > +       {},
> >
> > Comma is not needed in the terminator line.
> 
> Hmm.. it's similar to the syntax already used at several places in this file.
> See ' struct rpmh_vreg_init_data pm8150l_vreg_data[] ' for example.
> 
> Unless there is an obvious issue with it, let's use the same to keep
> things similar from a syntax p-o-v.
> 

Those other places shouldn't use the ',' either, so please help set a
better precedence.

Thanks,
Bjorn

> Thanks,
> Bhupesh
> 
> >
> > > +};
> >
> > --
> > With Best Regards,
> > Andy Shevchenko

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics
  2021-06-14  8:05     ` Bhupesh Sharma
@ 2021-06-14 16:28       ` Bjorn Andersson
  2021-06-15  4:43         ` Bhupesh Sharma
  0 siblings, 1 reply; 32+ messages in thread
From: Bjorn Andersson @ 2021-06-14 16:28 UTC (permalink / raw)
  To: Bhupesh Sharma
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon 14 Jun 03:05 CDT 2021, Bhupesh Sharma wrote:

> Hello Bjorn,
> 
> Thanks for the review comments.
> 
> On Fri, 11 Jun 2021 at 08:18, Bjorn Andersson
> <bjorn.andersson@linaro.org> wrote:
> >
> > On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
> >
> > > Add compatible strings for pmm8155au_1 and pmm8155au_2 pmics
> > > found on SA8155p-adp board.
> > >
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > > Cc: Mark Brown <broonie@kernel.org>
> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > Cc: Vinod Koul <vkoul@kernel.org>
> > > Cc: Rob Herring <robh+dt@kernel.org>
> > > Cc: Andy Gross <agross@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org
> > > Cc: linux-gpio@vger.kernel.org
> > > Cc: bhupesh.linux@gmail.com
> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > ---
> > >  .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml      | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > > index e561a5b941e4..ea5cd71aa0c7 100644
> > > --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > > +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > > @@ -55,6 +55,8 @@ properties:
> > >        - qcom,pm8009-1-rpmh-regulators
> > >        - qcom,pm8150-rpmh-regulators
> > >        - qcom,pm8150l-rpmh-regulators
> > > +      - qcom,pmm8155au-1-rpmh-regulators
> > > +      - qcom,pmm8155au-2-rpmh-regulators
> >
> > Looking at the component documentation and the schematics I think the
> > component is "PMM8155AU" and we have two of them.
> >
> > Unless I'm mistaken we should have the compatible describe the single
> > component and we should have DT describe the fact that we have 2 of
> > them.
> 
> If we refer to the PM8155AU device specifications, there are two
> regulators mentioned there PMM8155AU_1 and PMM8155AU_2. Although most
> parameters of the regulators seem similar the smps regulator summary
> for both appear different (Transient Load, mA ratings etc).
> 
> Although most of these differences don't probably matter to the Linux
> world, others like the gpios on the pmic are different.
> 
> So, IMO, it makes sense to mention the different pmic types on the board.
> 
> Please let me know your views on the same.
> 

Afaict, they are both physically the same component, but there is some
configuration differences between them. I don't see any differences that
will show up in Linux, but afaict we would capture those in the DT
anyways.

Let me know if you see anything I'm missing, but I think we should have
a single compatible.

Regards,
Bjorn

> Thanks,
> Bhupesh
> 
> >
> > >        - qcom,pm8350-rpmh-regulators
> > >        - qcom,pm8350c-rpmh-regulators
> > >        - qcom,pm8998-rpmh-regulators
> > > --
> > > 2.31.1
> > >

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: Add base dts file
  2021-06-11  2:25   ` Bjorn Andersson
  2021-06-14  8:19     ` Bhupesh Sharma
@ 2021-06-15  4:41     ` Bhupesh Sharma
  1 sibling, 0 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-15  4:41 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Fri, 11 Jun 2021 at 07:55, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > Add base DTS file for sa8155p-adp and enable boot to console,
>
> Please spell out "sa8155-adp", i.e. "Add base DTS for SA8155p Automotive
> Development Platform."
>
> > tlmm reserved range and also include pmic file(s).
> >
> > SA8155p-adp board is based on sm8150 Qualcomm Snapdragon SoC.
> >
>
> It's not based on sm8150, it's based on sa8155p, so let's express this
> as "The SA8155p platform is similar to the SM8150, so use this as base
> for now", to document why we decided to do this.
>
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com

<..snip..>

> > +&apps_rsc {
> > +     pmm8155au-1-rpmh-regulators {
> > +             compatible = "qcom,pmm8155au-1-rpmh-regulators";
> > +             qcom,pmic-id = "a";
> > +
> > +             vdd-s1-supply = <&vreg_3p3>;
> > +             vdd-s2-supply = <&vreg_3p3>;
> > +             vdd-s3-supply = <&vreg_3p3>;
> > +             vdd-s4-supply = <&vreg_3p3>;
> > +             vdd-s5-supply = <&vreg_3p3>;
> > +             vdd-s6-supply = <&vreg_3p3>;
> > +             vdd-s7-supply = <&vreg_3p3>;
> > +             vdd-s8-supply = <&vreg_3p3>;
> > +             vdd-s9-supply = <&vreg_3p3>;
> > +             vdd-s10-supply = <&vreg_3p3>;
> > +
> > +             vdd-l1-l8-l11-supply = <&vreg_s6a_0p92>;
> > +             vdd-l2-l10-supply = <&vreg_3p3>;
> > +             vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p92>;
> > +             vdd-l6-l9-supply = <&vreg_s6a_0p92>;
> > +             vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
> > +             vdd-l13-l16-l17-supply = <&vreg_3p3>;
> > +
> > +             vreg_s5a_2p04: smps5 {
> > +                     regulator-min-microvolt = <1904000>;
> > +                     regulator-max-microvolt = <2000000>;
> > +             };
> > +
> > +             vreg_s6a_0p92: smps6 {
> > +                     regulator-min-microvolt = <920000>;
> > +                     regulator-max-microvolt = <1128000>;
> > +             };
> > +
> > +             vdda_wcss_pll:
>
> This is the "label" of the pad which the regulator typically is
> connected to (rather than a denotion of which regulator it is). So even
> though we have these in some of the other boards, I would prefer if you
> skip them and only use the vreg_xyz_abc variant.

Lets keep the 'vdd_xx_abc labels' though which are used as input
supply pads for peripherals, for e.g.:

&usb_1_hsphy {
    status = "okay";
    vdda-pll-supply = <&vdd_usb_hs_core>;
    vdda33-supply = <&vdda_usb_hs_3p1>;
    vdda18-supply = <&vdda_usb_hs_1p8>;
};

IMO, here it makes sense to retain labels 'vdda_usb_hs_3p1' and
'vdda_usb_hs_1p8' in the dts (also making it easier to trace the same
in schematics).

I will send the v2 with the other suggested changes shortly.

Regards,
Bhupesh



<..snip..>

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics
  2021-06-14 16:28       ` Bjorn Andersson
@ 2021-06-15  4:43         ` Bhupesh Sharma
  0 siblings, 0 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-15  4:43 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: linux-arm-msm, Linus Walleij, Liam Girdwood, Mark Brown,
	Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon, 14 Jun 2021 at 21:58, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 14 Jun 03:05 CDT 2021, Bhupesh Sharma wrote:
>
> > Hello Bjorn,
> >
> > Thanks for the review comments.
> >
> > On Fri, 11 Jun 2021 at 08:18, Bjorn Andersson
> > <bjorn.andersson@linaro.org> wrote:
> > >
> > > On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
> > >
> > > > Add compatible strings for pmm8155au_1 and pmm8155au_2 pmics
> > > > found on SA8155p-adp board.
> > > >
> > > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > > > Cc: Mark Brown <broonie@kernel.org>
> > > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > > Cc: Vinod Koul <vkoul@kernel.org>
> > > > Cc: Rob Herring <robh+dt@kernel.org>
> > > > Cc: Andy Gross <agross@kernel.org>
> > > > Cc: devicetree@vger.kernel.org
> > > > Cc: linux-kernel@vger.kernel.org
> > > > Cc: linux-gpio@vger.kernel.org
> > > > Cc: bhupesh.linux@gmail.com
> > > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > > ---
> > > >  .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml      | 2 ++
> > > >  1 file changed, 2 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > > > index e561a5b941e4..ea5cd71aa0c7 100644
> > > > --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > > > +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
> > > > @@ -55,6 +55,8 @@ properties:
> > > >        - qcom,pm8009-1-rpmh-regulators
> > > >        - qcom,pm8150-rpmh-regulators
> > > >        - qcom,pm8150l-rpmh-regulators
> > > > +      - qcom,pmm8155au-1-rpmh-regulators
> > > > +      - qcom,pmm8155au-2-rpmh-regulators
> > >
> > > Looking at the component documentation and the schematics I think the
> > > component is "PMM8155AU" and we have two of them.
> > >
> > > Unless I'm mistaken we should have the compatible describe the single
> > > component and we should have DT describe the fact that we have 2 of
> > > them.
> >
> > If we refer to the PM8155AU device specifications, there are two
> > regulators mentioned there PMM8155AU_1 and PMM8155AU_2. Although most
> > parameters of the regulators seem similar the smps regulator summary
> > for both appear different (Transient Load, mA ratings etc).
> >
> > Although most of these differences don't probably matter to the Linux
> > world, others like the gpios on the pmic are different.
> >
> > So, IMO, it makes sense to mention the different pmic types on the board.
> >
> > Please let me know your views on the same.
> >
>
> Afaict, they are both physically the same component, but there is some
> configuration differences between them. I don't see any differences that
> will show up in Linux, but afaict we would capture those in the DT
> anyways.
>
> Let me know if you see anything I'm missing, but I think we should have
> a single compatible.

As discussed on IRC, let's go with the approach you suggested (I can
propose followup patches if I find something amiss). I will send a v2
shortly.

Thanks,
Bhupesh

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board
  2021-06-14 16:17       ` Bjorn Andersson
@ 2021-06-15  4:47         ` Bhupesh Sharma
  0 siblings, 0 replies; 32+ messages in thread
From: Bhupesh Sharma @ 2021-06-15  4:47 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Andy Shevchenko, linux-arm-msm, Linus Walleij, Liam Girdwood,
	Mark Brown, Vinod Koul, Rob Herring, Andy Gross, devicetree,
	Linux Kernel Mailing List, open list:GPIO SUBSYSTEM,
	bhupesh.linux

On Mon, 14 Jun 2021 at 21:47, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 07:30 CDT 2021, Bhupesh Sharma wrote:
>
> > On Mon, 7 Jun 2021 at 17:39, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > >
> > > On Mon, Jun 7, 2021 at 2:41 PM Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote:
> > > >
> > > > SA8155p-adp board has two new regulator types - pmm8155au_1 and
> > > > pmm8155au_2.
> > > >
> > > > The output power management circuits in these regulators include:
> > > > - FTS510 smps,
> > > > - HFS510 smps, and
> > > > - LDO510 linear regulators
> > >
> > > ...
> > >
> > > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > > > Cc: Mark Brown <broonie@kernel.org>
> > > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > > Cc: Vinod Koul <vkoul@kernel.org>
> > > > Cc: Rob Herring <robh+dt@kernel.org>
> > > > Cc: Andy Gross <agross@kernel.org>
> > > > Cc: devicetree@vger.kernel.org
> > > > Cc: linux-kernel@vger.kernel.org
> > > > Cc: linux-gpio@vger.kernel.org
> > > > Cc: bhupesh.linux@gmail.com
> > >
> > > Use --cc or similar option when run `git send-email`, no need to
> > > pollute the commit message with these.
> >
> > It's just a matter of preference IMO. I prefer to use a Cc list
> > here.
> >
>
> The Cc list in the commit message will be committed to the git history
> and there it carries the information that you specifically made sure
> that these people saw the patch. So please limit the use to that
> purpose.

I understand, but different maintainers like different formats here.
Infact, there
are suggestions not to use --cc as some opens-source lists are known to drop
folks from Cc list accidentally (mentioned via --cc) , so some folks
prefer the git log to contain the Cc list instead.

But I can trim the same for v2.

> > > > +static const struct rpmh_vreg_init_data pmm8155au_1_vreg_data[] = {
> > >
> > >
> > > > +       {},
> > >
> > > Comma is not needed in the terminator line.
> >
> > Hmm.. it's similar to the syntax already used at several places in this file.
> > See ' struct rpmh_vreg_init_data pm8150l_vreg_data[] ' for example.
> >
> > Unless there is an obvious issue with it, let's use the same to keep
> > things similar from a syntax p-o-v.
> >
>
> Those other places shouldn't use the ',' either, so please help set a
> better precedence.

Sure, I will send that out as a separate clean-up patch.

Regards,
Bhupesh

^ permalink raw reply	[flat|nested] 32+ messages in thread

end of thread, other threads:[~2021-06-15  4:47 UTC | newest]

Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-07 11:38 [PATCH 0/8] arm64: dts: qcom: Add SA8155p-adp board DTS Bhupesh Sharma
2021-06-07 11:38 ` [PATCH 1/8] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmics Bhupesh Sharma
2021-06-11  2:48   ` Bjorn Andersson
2021-06-14  8:05     ` Bhupesh Sharma
2021-06-14 16:28       ` Bjorn Andersson
2021-06-15  4:43         ` Bhupesh Sharma
2021-06-07 11:38 ` [PATCH 2/8] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp Bhupesh Sharma
2021-06-11  2:51   ` Bjorn Andersson
2021-06-14  8:13     ` Bhupesh Sharma
2021-06-14 16:09       ` Bjorn Andersson
2021-06-07 11:38 ` [PATCH 3/8] dt-bindings: arm: qcom: Add compatible for SA8155p-adp board Bhupesh Sharma
2021-06-11  2:59   ` Bjorn Andersson
2021-06-14  8:14     ` Bhupesh Sharma
2021-06-07 11:38 ` [PATCH 4/8] regulator: qcom-rpmh: Add new regulator types found on SA8155p adp board Bhupesh Sharma
2021-06-07 12:09   ` Andy Shevchenko
2021-06-07 12:30     ` Bhupesh Sharma
2021-06-14 16:17       ` Bjorn Andersson
2021-06-15  4:47         ` Bhupesh Sharma
2021-06-07 11:38 ` [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp Bhupesh Sharma
2021-06-11  3:00   ` Bjorn Andersson
2021-06-14  8:30     ` Bhupesh Sharma
2021-06-14 16:12       ` Bjorn Andersson
2021-06-07 11:38 ` [PATCH 6/8] arm64: dts: qcom: pmm8155au_1: Add base dts file Bhupesh Sharma
2021-06-11  3:12   ` Bjorn Andersson
2021-06-07 11:38 ` [PATCH 7/8] arm64: dts: qcom: pmm8155au_2: " Bhupesh Sharma
2021-06-11  3:13   ` Bjorn Andersson
2021-06-07 11:38 ` [PATCH 8/8] arm64: dts: qcom: sa8155p-adp: " Bhupesh Sharma
2021-06-07 15:22   ` Vinod Koul
2021-06-07 21:22     ` Bhupesh Sharma
2021-06-11  2:25   ` Bjorn Andersson
2021-06-14  8:19     ` Bhupesh Sharma
2021-06-15  4:41     ` Bhupesh Sharma

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