All of lore.kernel.org
 help / color / mirror / Atom feed
From: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org
Cc: computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	marex-ynQEQJNshbs@public.gmane.org,
	linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Subject: [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support
Date: Mon, 28 Apr 2014 11:53:37 +0800	[thread overview]
Message-ID: <1398657227-20721-1-git-send-email-b32955@freescale.com> (raw)

 (0) This patch set depends on the patch:
	http://lists.infradead.org/pipermail/linux-mtd/2014-April/053308.html
  
 (1) This patch set tries to add the DDR quad read support for the SPI
     NOR framework, and it also adds the DDR quad read support for FREESCALE
     quadspi controller driver.

 (2) Test this patch set with Spansion s25fl128s, the performance with mtd_speedtest.ko:
     =================================================
     mtd_speedtest: MTD device: 0
     mtd_speedtest: not NAND flash, assume page size is 512 bytes.
     mtd_speedtest: MTD device size 16777216, eraseblock size 65536, page size 512,
                    count of eraseblocks 256, pages per eraseblock 128, OOB size 0
     mtd_speedtest: testing eraseblock write speed
     mtd_speedtest: eraseblock write speed is 665 KiB/s
     mtd_speedtest: testing eraseblock read speed
     mtd_speedtest: eraseblock read speed is 49799 KiB/s
     mtd_speedtest: testing page write speed
     mtd_speedtest: page write speed is 662 KiB/s
     mtd_speedtest: testing page read speed
     mtd_speedtest: page read speed is 24236 KiB/s
     mtd_speedtest: testing 2 page write speed
     mtd_speedtest: 2 page write speed is 657 KiB/s
     mtd_speedtest: testing 2 page read speed
     mtd_speedtest: 2 page read speed is 32637 KiB/s
     mtd_speedtest: Testing erase speed
     mtd_speedtest: erase speed is 518 KiB/s
     mtd_speedtest: Testing 2x multi-block erase speed
     mtd_speedtest: 2x multi-block erase speed is 506 KiB/s
     mtd_speedtest: Testing 4x multi-block erase speed
     mtd_speedtest: 4x multi-block erase speed is 503 KiB/s
     mtd_speedtest: Testing 8x multi-block erase speed
     mtd_speedtest: 8x multi-block erase speed is 501 KiB/s
     mtd_speedtest: Testing 16x multi-block erase speed
     mtd_speedtest: 16x multi-block erase speed is 498 KiB/s
     mtd_speedtest: Testing 32x multi-block erase speed
     mtd_speedtest: 32x multi-block erase speed is 496 KiB/s
     mtd_speedtest: Testing 64x multi-block erase speed
     mtd_speedtest: 64x multi-block erase speed is 495 KiB/s
     mtd_speedtest: finished
     =================================================

  (3) Add the DDR quad read support for Micron N25Q256A:
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished

  (3) Conclusion:
     The DDR quad read could be 49799 KiB/s for Spansion s25fl128s,
     The DDR quad read could be 32157/s for Micron N25Q256A;
     
Changlog:

v1 --> v2:
  [1] add the new patch: " mtd: spi-nor: add a new field for spi_nor{}"
  [2] remove the patch :
        "mtd: fsl-quadspi: get the dummy cycles for DDR Quad read from the DT
	    property"
  [3] add the DDR quad read for Micron N25Q256A.	    
  [4] fix types.
  [5] others.

before v1:  

  About this patch set:
     For patch 1, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053370.html

     For patch 2, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053374.html


Huang Shijie (10):
  mtd: spi-nor: fix the wrong dummy value
  mtd: spi-nor: add a new field for spi_nor{}
  mtd: spi-nor: add DDR quad read support
  Documentation: mtd: add a new document for SPI NOR flash
  Documentation: fsl-quadspi: update the document
  mtd: fsl-quadspi: use the information stored in spi-nor{}
  mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR
  mtd: spi-nor: add more read transfer flags for n25q256a
  mtd: spi-nor: add DDR quad read support for Micron
  mtd: fsl-quadspi: add DDR quad read support for Micron

 .../devicetree/bindings/mtd/fsl-quadspi.txt        |   16 +++
 .../devicetree/bindings/mtd/spi-nor-flash.txt      |    7 +
 drivers/mtd/devices/m25p80.c                       |    6 +-
 drivers/mtd/spi-nor/fsl-quadspi.c                  |  132 ++++++++++++++------
 drivers/mtd/spi-nor/spi-nor.c                      |   65 +++++++++-
 include/linux/mtd/spi-nor.h                        |   12 ++-
 6 files changed, 189 insertions(+), 49 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mtd/spi-nor-flash.txt

-- 
1.7.2.rc3

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Cc: <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	<marex-ynQEQJNshbs@public.gmane.org>,
	<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	<linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Subject: [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support
Date: Mon, 28 Apr 2014 11:53:37 +0800	[thread overview]
Message-ID: <1398657227-20721-1-git-send-email-b32955@freescale.com> (raw)

 (0) This patch set depends on the patch:
	http://lists.infradead.org/pipermail/linux-mtd/2014-April/053308.html
  
 (1) This patch set tries to add the DDR quad read support for the SPI
     NOR framework, and it also adds the DDR quad read support for FREESCALE
     quadspi controller driver.

 (2) Test this patch set with Spansion s25fl128s, the performance with mtd_speedtest.ko:
     =================================================
     mtd_speedtest: MTD device: 0
     mtd_speedtest: not NAND flash, assume page size is 512 bytes.
     mtd_speedtest: MTD device size 16777216, eraseblock size 65536, page size 512,
                    count of eraseblocks 256, pages per eraseblock 128, OOB size 0
     mtd_speedtest: testing eraseblock write speed
     mtd_speedtest: eraseblock write speed is 665 KiB/s
     mtd_speedtest: testing eraseblock read speed
     mtd_speedtest: eraseblock read speed is 49799 KiB/s
     mtd_speedtest: testing page write speed
     mtd_speedtest: page write speed is 662 KiB/s
     mtd_speedtest: testing page read speed
     mtd_speedtest: page read speed is 24236 KiB/s
     mtd_speedtest: testing 2 page write speed
     mtd_speedtest: 2 page write speed is 657 KiB/s
     mtd_speedtest: testing 2 page read speed
     mtd_speedtest: 2 page read speed is 32637 KiB/s
     mtd_speedtest: Testing erase speed
     mtd_speedtest: erase speed is 518 KiB/s
     mtd_speedtest: Testing 2x multi-block erase speed
     mtd_speedtest: 2x multi-block erase speed is 506 KiB/s
     mtd_speedtest: Testing 4x multi-block erase speed
     mtd_speedtest: 4x multi-block erase speed is 503 KiB/s
     mtd_speedtest: Testing 8x multi-block erase speed
     mtd_speedtest: 8x multi-block erase speed is 501 KiB/s
     mtd_speedtest: Testing 16x multi-block erase speed
     mtd_speedtest: 16x multi-block erase speed is 498 KiB/s
     mtd_speedtest: Testing 32x multi-block erase speed
     mtd_speedtest: 32x multi-block erase speed is 496 KiB/s
     mtd_speedtest: Testing 64x multi-block erase speed
     mtd_speedtest: 64x multi-block erase speed is 495 KiB/s
     mtd_speedtest: finished
     =================================================

  (3) Add the DDR quad read support for Micron N25Q256A:
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished

  (3) Conclusion:
     The DDR quad read could be 49799 KiB/s for Spansion s25fl128s,
     The DDR quad read could be 32157/s for Micron N25Q256A;
     
Changlog:

v1 --> v2:
  [1] add the new patch: " mtd: spi-nor: add a new field for spi_nor{}"
  [2] remove the patch :
        "mtd: fsl-quadspi: get the dummy cycles for DDR Quad read from the DT
	    property"
  [3] add the DDR quad read for Micron N25Q256A.	    
  [4] fix types.
  [5] others.

before v1:  

  About this patch set:
     For patch 1, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053370.html

     For patch 2, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053374.html


Huang Shijie (10):
  mtd: spi-nor: fix the wrong dummy value
  mtd: spi-nor: add a new field for spi_nor{}
  mtd: spi-nor: add DDR quad read support
  Documentation: mtd: add a new document for SPI NOR flash
  Documentation: fsl-quadspi: update the document
  mtd: fsl-quadspi: use the information stored in spi-nor{}
  mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR
  mtd: spi-nor: add more read transfer flags for n25q256a
  mtd: spi-nor: add DDR quad read support for Micron
  mtd: fsl-quadspi: add DDR quad read support for Micron

 .../devicetree/bindings/mtd/fsl-quadspi.txt        |   16 +++
 .../devicetree/bindings/mtd/spi-nor-flash.txt      |    7 +
 drivers/mtd/devices/m25p80.c                       |    6 +-
 drivers/mtd/spi-nor/fsl-quadspi.c                  |  132 ++++++++++++++------
 drivers/mtd/spi-nor/spi-nor.c                      |   65 +++++++++-
 include/linux/mtd/spi-nor.h                        |   12 ++-
 6 files changed, 189 insertions(+), 49 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mtd/spi-nor-flash.txt

-- 
1.7.2.rc3

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Huang Shijie <b32955@freescale.com>
To: <dwmw2@infradead.org>
Cc: marex@denx.de, devicetree@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-spi@vger.kernel.org,
	Huang Shijie <b32955@freescale.com>,
	linux-mtd@lists.infradead.org, computersforpeace@gmail.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support
Date: Mon, 28 Apr 2014 11:53:37 +0800	[thread overview]
Message-ID: <1398657227-20721-1-git-send-email-b32955@freescale.com> (raw)

 (0) This patch set depends on the patch:
	http://lists.infradead.org/pipermail/linux-mtd/2014-April/053308.html
  
 (1) This patch set tries to add the DDR quad read support for the SPI
     NOR framework, and it also adds the DDR quad read support for FREESCALE
     quadspi controller driver.

 (2) Test this patch set with Spansion s25fl128s, the performance with mtd_speedtest.ko:
     =================================================
     mtd_speedtest: MTD device: 0
     mtd_speedtest: not NAND flash, assume page size is 512 bytes.
     mtd_speedtest: MTD device size 16777216, eraseblock size 65536, page size 512,
                    count of eraseblocks 256, pages per eraseblock 128, OOB size 0
     mtd_speedtest: testing eraseblock write speed
     mtd_speedtest: eraseblock write speed is 665 KiB/s
     mtd_speedtest: testing eraseblock read speed
     mtd_speedtest: eraseblock read speed is 49799 KiB/s
     mtd_speedtest: testing page write speed
     mtd_speedtest: page write speed is 662 KiB/s
     mtd_speedtest: testing page read speed
     mtd_speedtest: page read speed is 24236 KiB/s
     mtd_speedtest: testing 2 page write speed
     mtd_speedtest: 2 page write speed is 657 KiB/s
     mtd_speedtest: testing 2 page read speed
     mtd_speedtest: 2 page read speed is 32637 KiB/s
     mtd_speedtest: Testing erase speed
     mtd_speedtest: erase speed is 518 KiB/s
     mtd_speedtest: Testing 2x multi-block erase speed
     mtd_speedtest: 2x multi-block erase speed is 506 KiB/s
     mtd_speedtest: Testing 4x multi-block erase speed
     mtd_speedtest: 4x multi-block erase speed is 503 KiB/s
     mtd_speedtest: Testing 8x multi-block erase speed
     mtd_speedtest: 8x multi-block erase speed is 501 KiB/s
     mtd_speedtest: Testing 16x multi-block erase speed
     mtd_speedtest: 16x multi-block erase speed is 498 KiB/s
     mtd_speedtest: Testing 32x multi-block erase speed
     mtd_speedtest: 32x multi-block erase speed is 496 KiB/s
     mtd_speedtest: Testing 64x multi-block erase speed
     mtd_speedtest: 64x multi-block erase speed is 495 KiB/s
     mtd_speedtest: finished
     =================================================

  (3) Add the DDR quad read support for Micron N25Q256A:
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished

  (3) Conclusion:
     The DDR quad read could be 49799 KiB/s for Spansion s25fl128s,
     The DDR quad read could be 32157/s for Micron N25Q256A;
     
Changlog:

v1 --> v2:
  [1] add the new patch: " mtd: spi-nor: add a new field for spi_nor{}"
  [2] remove the patch :
        "mtd: fsl-quadspi: get the dummy cycles for DDR Quad read from the DT
	    property"
  [3] add the DDR quad read for Micron N25Q256A.	    
  [4] fix types.
  [5] others.

before v1:  

  About this patch set:
     For patch 1, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053370.html

     For patch 2, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053374.html


Huang Shijie (10):
  mtd: spi-nor: fix the wrong dummy value
  mtd: spi-nor: add a new field for spi_nor{}
  mtd: spi-nor: add DDR quad read support
  Documentation: mtd: add a new document for SPI NOR flash
  Documentation: fsl-quadspi: update the document
  mtd: fsl-quadspi: use the information stored in spi-nor{}
  mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR
  mtd: spi-nor: add more read transfer flags for n25q256a
  mtd: spi-nor: add DDR quad read support for Micron
  mtd: fsl-quadspi: add DDR quad read support for Micron

 .../devicetree/bindings/mtd/fsl-quadspi.txt        |   16 +++
 .../devicetree/bindings/mtd/spi-nor-flash.txt      |    7 +
 drivers/mtd/devices/m25p80.c                       |    6 +-
 drivers/mtd/spi-nor/fsl-quadspi.c                  |  132 ++++++++++++++------
 drivers/mtd/spi-nor/spi-nor.c                      |   65 +++++++++-
 include/linux/mtd/spi-nor.h                        |   12 ++-
 6 files changed, 189 insertions(+), 49 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mtd/spi-nor-flash.txt

-- 
1.7.2.rc3

WARNING: multiple messages have this Message-ID (diff)
From: b32955@freescale.com (Huang Shijie)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support
Date: Mon, 28 Apr 2014 11:53:37 +0800	[thread overview]
Message-ID: <1398657227-20721-1-git-send-email-b32955@freescale.com> (raw)

 (0) This patch set depends on the patch:
	http://lists.infradead.org/pipermail/linux-mtd/2014-April/053308.html
  
 (1) This patch set tries to add the DDR quad read support for the SPI
     NOR framework, and it also adds the DDR quad read support for FREESCALE
     quadspi controller driver.

 (2) Test this patch set with Spansion s25fl128s, the performance with mtd_speedtest.ko:
     =================================================
     mtd_speedtest: MTD device: 0
     mtd_speedtest: not NAND flash, assume page size is 512 bytes.
     mtd_speedtest: MTD device size 16777216, eraseblock size 65536, page size 512,
                    count of eraseblocks 256, pages per eraseblock 128, OOB size 0
     mtd_speedtest: testing eraseblock write speed
     mtd_speedtest: eraseblock write speed is 665 KiB/s
     mtd_speedtest: testing eraseblock read speed
     mtd_speedtest: eraseblock read speed is 49799 KiB/s
     mtd_speedtest: testing page write speed
     mtd_speedtest: page write speed is 662 KiB/s
     mtd_speedtest: testing page read speed
     mtd_speedtest: page read speed is 24236 KiB/s
     mtd_speedtest: testing 2 page write speed
     mtd_speedtest: 2 page write speed is 657 KiB/s
     mtd_speedtest: testing 2 page read speed
     mtd_speedtest: 2 page read speed is 32637 KiB/s
     mtd_speedtest: Testing erase speed
     mtd_speedtest: erase speed is 518 KiB/s
     mtd_speedtest: Testing 2x multi-block erase speed
     mtd_speedtest: 2x multi-block erase speed is 506 KiB/s
     mtd_speedtest: Testing 4x multi-block erase speed
     mtd_speedtest: 4x multi-block erase speed is 503 KiB/s
     mtd_speedtest: Testing 8x multi-block erase speed
     mtd_speedtest: 8x multi-block erase speed is 501 KiB/s
     mtd_speedtest: Testing 16x multi-block erase speed
     mtd_speedtest: 16x multi-block erase speed is 498 KiB/s
     mtd_speedtest: Testing 32x multi-block erase speed
     mtd_speedtest: 32x multi-block erase speed is 496 KiB/s
     mtd_speedtest: Testing 64x multi-block erase speed
     mtd_speedtest: 64x multi-block erase speed is 495 KiB/s
     mtd_speedtest: finished
     =================================================

  (3) Add the DDR quad read support for Micron N25Q256A:
    =================================================
    mtd_speedtest: MTD device: 1
    mtd_speedtest: not NAND flash, assume page size is 512 bytes.
    mtd_speedtest: MTD device size 33554432, eraseblock size 65536,
                   page size 512, count of eraseblocks 512, pages per eraseblock 128, OOB size 0
    mtd_speedtest: testing eraseblock write speed
    mtd_speedtest: eraseblock write speed is 2426 KiB/s
    mtd_speedtest: testing eraseblock read speed
    mtd_speedtest: eraseblock read speed is 32157 KiB/s
    mtd_speedtest: testing page write speed
    mtd_speedtest: page write speed is 2362 KiB/s
    mtd_speedtest: testing page read speed
    mtd_speedtest: page read speed is 17741 KiB/s
    mtd_speedtest: testing 2 page write speed
    mtd_speedtest: 2 page write speed is 2384 KiB/s
    mtd_speedtest: testing 2 page read speed
    mtd_speedtest: 2 page read speed is 24058 KiB/s
    mtd_speedtest: Testing erase speed
    mtd_speedtest: erase speed is 1927529 KiB/s
    mtd_speedtest: Testing 2x multi-block erase speed
    mtd_speedtest: 2x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 4x multi-block erase speed
    mtd_speedtest: 4x multi-block erase speed is 2184533 KiB/s
    mtd_speedtest: Testing 8x multi-block erase speed
    mtd_speedtest: 8x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 16x multi-block erase speed
    mtd_speedtest: 16x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 32x multi-block erase speed
    mtd_speedtest: 32x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: Testing 64x multi-block erase speed
    mtd_speedtest: 64x multi-block erase speed is 2340571 KiB/s
    mtd_speedtest: finished

  (3) Conclusion:
     The DDR quad read could be 49799 KiB/s for Spansion s25fl128s,
     The DDR quad read could be 32157/s for Micron N25Q256A;
     
Changlog:

v1 --> v2:
  [1] add the new patch: " mtd: spi-nor: add a new field for spi_nor{}"
  [2] remove the patch :
        "mtd: fsl-quadspi: get the dummy cycles for DDR Quad read from the DT
	    property"
  [3] add the DDR quad read for Micron N25Q256A.	    
  [4] fix types.
  [5] others.

before v1:  

  About this patch set:
     For patch 1, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053370.html

     For patch 2, please see the old discusstion:
     http://lists.infradead.org/pipermail/linux-mtd/2014-April/053374.html


Huang Shijie (10):
  mtd: spi-nor: fix the wrong dummy value
  mtd: spi-nor: add a new field for spi_nor{}
  mtd: spi-nor: add DDR quad read support
  Documentation: mtd: add a new document for SPI NOR flash
  Documentation: fsl-quadspi: update the document
  mtd: fsl-quadspi: use the information stored in spi-nor{}
  mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR
  mtd: spi-nor: add more read transfer flags for n25q256a
  mtd: spi-nor: add DDR quad read support for Micron
  mtd: fsl-quadspi: add DDR quad read support for Micron

 .../devicetree/bindings/mtd/fsl-quadspi.txt        |   16 +++
 .../devicetree/bindings/mtd/spi-nor-flash.txt      |    7 +
 drivers/mtd/devices/m25p80.c                       |    6 +-
 drivers/mtd/spi-nor/fsl-quadspi.c                  |  132 ++++++++++++++------
 drivers/mtd/spi-nor/spi-nor.c                      |   65 +++++++++-
 include/linux/mtd/spi-nor.h                        |   12 ++-
 6 files changed, 189 insertions(+), 49 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mtd/spi-nor-flash.txt

-- 
1.7.2.rc3

             reply	other threads:[~2014-04-28  3:53 UTC|newest]

Thread overview: 95+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-28  3:53 Huang Shijie [this message]
2014-04-28  3:53 ` [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support Huang Shijie
2014-04-28  3:53 ` Huang Shijie
2014-04-28  3:53 ` Huang Shijie
2014-04-28  3:53 ` [PATCH v2 03/10] mtd: spi-nor: add " Huang Shijie
2014-04-28  3:53   ` Huang Shijie
2014-04-28  3:53   ` Huang Shijie
2014-04-28  3:53   ` Huang Shijie
2014-04-28 20:23   ` Marek Vasut
2014-04-28 20:23     ` Marek Vasut
2014-04-28 20:23     ` Marek Vasut
2014-07-30  5:08   ` Brian Norris
2014-07-30  5:08     ` Brian Norris
2014-07-30  5:08     ` Brian Norris
2014-07-30  6:44     ` Huang Shijie
2014-07-30  6:44       ` Huang Shijie
2014-07-30  6:44       ` Huang Shijie
2014-07-30  7:45       ` Brian Norris
2014-07-30  7:45         ` Brian Norris
2014-07-30  7:45         ` Brian Norris
2014-07-30 10:46         ` Mark Brown
2014-07-30 10:46           ` Mark Brown
2014-07-30 10:46           ` Mark Brown
2014-08-02  2:06           ` Brian Norris
2014-08-02  2:06             ` Brian Norris
2014-08-02  2:06             ` Brian Norris
2014-08-02  9:09             ` Geert Uytterhoeven
2014-08-02  9:09               ` Geert Uytterhoeven
2014-08-02  9:09               ` Geert Uytterhoeven
     [not found]               ` <CAMuHMdWxzKG1TTUVgYqfRP0Prp85HPwVxH7NQp7S-pNeLfFqjA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-08-04 14:25                 ` Mark Brown
2014-08-04 14:25                   ` Mark Brown
2014-08-04 14:25                   ` Mark Brown
2015-07-22 18:15                   ` Zhi Li
2015-07-22 18:15                     ` Zhi Li
2015-07-22 18:18                     ` Zhi Li
2015-07-22 18:18                       ` Zhi Li
2014-07-30 15:23         ` Huang Shijie
2014-07-30 15:23           ` Huang Shijie
2014-07-30 15:23           ` Huang Shijie
     [not found] ` <1398657227-20721-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28  3:53   ` [PATCH v2 01/10] mtd: spi-nor: fix the wrong dummy value Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
     [not found]     ` <1398657227-20721-2-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28 20:22       ` Marek Vasut
2014-04-28 20:22         ` Marek Vasut
2014-04-28 20:22         ` Marek Vasut
2014-11-05  8:27       ` Brian Norris
2014-11-05  8:27         ` Brian Norris
2014-11-05  8:27         ` Brian Norris
2014-04-28  3:53   ` [PATCH v2 02/10] mtd: spi-nor: add a new field for spi_nor{} Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
     [not found]     ` <1398657227-20721-3-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-04-28 20:23       ` Marek Vasut
2014-04-28 20:23         ` Marek Vasut
2014-04-28 20:23         ` Marek Vasut
     [not found]         ` <201404282223.26174.marex-ynQEQJNshbs@public.gmane.org>
2014-04-29  5:18           ` Huang Shijie
2014-04-29  5:18             ` Huang Shijie
2014-04-29  5:18             ` Huang Shijie
2014-04-29  5:18             ` Huang Shijie
2014-04-29  6:54             ` Marek Vasut
2014-04-29  6:54               ` Marek Vasut
2014-04-29  6:54               ` Marek Vasut
2014-04-29  6:05               ` Huang Shijie
2014-04-29  6:05                 ` Huang Shijie
2014-04-29  6:05                 ` Huang Shijie
2014-04-29  6:05                 ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 04/10] Documentation: mtd: add a new document for SPI NOR flash Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 05/10] Documentation: fsl-quadspi: update the document Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 06/10] mtd: fsl-quadspi: use the information stored in spi-nor{} Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 07/10] mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 08/10] mtd: spi-nor: add more read transfer flags for n25q256a Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 09/10] mtd: spi-nor: add DDR quad read support for Micron Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53   ` [PATCH v2 10/10] mtd: fsl-quadspi: " Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie
2014-04-28  3:53     ` Huang Shijie

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1398657227-20721-1-git-send-email-b32955@freescale.com \
    --to=b32955-kzfg59tc24xl57midrcfdg@public.gmane.org \
    --cc=computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=marex-ynQEQJNshbs@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.