From: Zhi Li <lznuaa@gmail.com> To: Mark Brown <broonie@kernel.org> Cc: "Geert Uytterhoeven" <geert@linux-m68k.org>, "Marek Vašut" <marex@denx.de>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>, linux-spi <linux-spi@vger.kernel.org>, "Huang Shijie" <b32955@freescale.com>, "MTD Maling List" <linux-mtd@lists.infradead.org>, "Huang Shijie" <shijie.huang@intel.com>, "Brian Norris" <computersforpeace@gmail.com>, "David Woodhouse" <dwmw2@infradead.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v2 03/10] mtd: spi-nor: add DDR quad read support Date: Wed, 22 Jul 2015 13:15:16 -0500 [thread overview] Message-ID: <CAHrpEqQNSgkakXN8kAT1FwPv7Ou_ERkOTJrX-4Vmb=TogzsF2A@mail.gmail.com> (raw) In-Reply-To: <20140804142507.GP30458@sirena.org.uk> On Mon, Aug 4, 2014 at 9:25 AM, Mark Brown <broonie@kernel.org> wrote: > On Sat, Aug 02, 2014 at 11:09:09AM +0200, Geert Uytterhoeven wrote: >> On Sat, Aug 2, 2014 at 4:06 AM, Brian Norris >> > On Wed, Jul 30, 2014 at 11:46:07AM +0100, Mark Brown wrote: > >> >> I don't know what DDR is in this context, sorry. > >> > I think it's just the ability to latch data on both the rising and >> > falling edges of the SPI clock. For SPI flash, it seems to be used for >> > the data portion of the opcode/address/data sequence. > >> > Yeah, I suppose it could be wedged in later if drivers/spi/ ever adopts >> > a solution. > >> I think this can just be another SPI_* spi_device.mode flag. > > Sounds like it yes - I was wondering if this might be one of the modes > with extra clock cycles that I've heard mentioned before which might be > a little more fun. > >> Do we need bindings for this in >> Documentation/devicetree/bindings/spi/spi-bus.txt? >> Unlike Quad SPI transfer support, this doesn't need special wiring, so DDR >> capability is an intrinsic property of the SPI slave, and the mode bit can just >> be set in the SPI slave driver, without any DT magic? > > Right, unless we run into things like board design issues causing > constraints this is something that can be enabled by the two drivers > without needing DT configuration. All: we plan resume this work. I need direction how go ahead further. I go through this email thread. The discussion focus on how to get dummy cycle information. Shijie get it from DT. Brain suggest get from CFI or map id table if I understand correct. Accodring to spec http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf Table 8.10 Dummy cycle depend on frequency, read command. if information saved in driver, it will be huge table. > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >
WARNING: multiple messages have this Message-ID (diff)
From: lznuaa@gmail.com (Zhi Li) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 03/10] mtd: spi-nor: add DDR quad read support Date: Wed, 22 Jul 2015 13:15:16 -0500 [thread overview] Message-ID: <CAHrpEqQNSgkakXN8kAT1FwPv7Ou_ERkOTJrX-4Vmb=TogzsF2A@mail.gmail.com> (raw) In-Reply-To: <20140804142507.GP30458@sirena.org.uk> On Mon, Aug 4, 2014 at 9:25 AM, Mark Brown <broonie@kernel.org> wrote: > On Sat, Aug 02, 2014 at 11:09:09AM +0200, Geert Uytterhoeven wrote: >> On Sat, Aug 2, 2014 at 4:06 AM, Brian Norris >> > On Wed, Jul 30, 2014 at 11:46:07AM +0100, Mark Brown wrote: > >> >> I don't know what DDR is in this context, sorry. > >> > I think it's just the ability to latch data on both the rising and >> > falling edges of the SPI clock. For SPI flash, it seems to be used for >> > the data portion of the opcode/address/data sequence. > >> > Yeah, I suppose it could be wedged in later if drivers/spi/ ever adopts >> > a solution. > >> I think this can just be another SPI_* spi_device.mode flag. > > Sounds like it yes - I was wondering if this might be one of the modes > with extra clock cycles that I've heard mentioned before which might be > a little more fun. > >> Do we need bindings for this in >> Documentation/devicetree/bindings/spi/spi-bus.txt? >> Unlike Quad SPI transfer support, this doesn't need special wiring, so DDR >> capability is an intrinsic property of the SPI slave, and the mode bit can just >> be set in the SPI slave driver, without any DT magic? > > Right, unless we run into things like board design issues causing > constraints this is something that can be enabled by the two drivers > without needing DT configuration. All: we plan resume this work. I need direction how go ahead further. I go through this email thread. The discussion focus on how to get dummy cycle information. Shijie get it from DT. Brain suggest get from CFI or map id table if I understand correct. Accodring to spec http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf Table 8.10 Dummy cycle depend on frequency, read command. if information saved in driver, it will be huge table. > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >
next prev parent reply other threads:[~2015-07-22 18:15 UTC|newest] Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-04-28 3:53 [PATCH v2 00/10] mtd: spi-nor: Add the DDR quad read support Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 03/10] mtd: spi-nor: add " Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 20:23 ` Marek Vasut 2014-04-28 20:23 ` Marek Vasut 2014-04-28 20:23 ` Marek Vasut 2014-07-30 5:08 ` Brian Norris 2014-07-30 5:08 ` Brian Norris 2014-07-30 5:08 ` Brian Norris 2014-07-30 6:44 ` Huang Shijie 2014-07-30 6:44 ` Huang Shijie 2014-07-30 6:44 ` Huang Shijie 2014-07-30 7:45 ` Brian Norris 2014-07-30 7:45 ` Brian Norris 2014-07-30 7:45 ` Brian Norris 2014-07-30 10:46 ` Mark Brown 2014-07-30 10:46 ` Mark Brown 2014-07-30 10:46 ` Mark Brown 2014-08-02 2:06 ` Brian Norris 2014-08-02 2:06 ` Brian Norris 2014-08-02 2:06 ` Brian Norris 2014-08-02 9:09 ` Geert Uytterhoeven 2014-08-02 9:09 ` Geert Uytterhoeven 2014-08-02 9:09 ` Geert Uytterhoeven [not found] ` <CAMuHMdWxzKG1TTUVgYqfRP0Prp85HPwVxH7NQp7S-pNeLfFqjA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2014-08-04 14:25 ` Mark Brown 2014-08-04 14:25 ` Mark Brown 2014-08-04 14:25 ` Mark Brown 2015-07-22 18:15 ` Zhi Li [this message] 2015-07-22 18:15 ` Zhi Li 2015-07-22 18:18 ` Zhi Li 2015-07-22 18:18 ` Zhi Li 2014-07-30 15:23 ` Huang Shijie 2014-07-30 15:23 ` Huang Shijie 2014-07-30 15:23 ` Huang Shijie [not found] ` <1398657227-20721-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org> 2014-04-28 3:53 ` [PATCH v2 01/10] mtd: spi-nor: fix the wrong dummy value Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie [not found] ` <1398657227-20721-2-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org> 2014-04-28 20:22 ` Marek Vasut 2014-04-28 20:22 ` Marek Vasut 2014-04-28 20:22 ` Marek Vasut 2014-11-05 8:27 ` Brian Norris 2014-11-05 8:27 ` Brian Norris 2014-11-05 8:27 ` Brian Norris 2014-04-28 3:53 ` [PATCH v2 02/10] mtd: spi-nor: add a new field for spi_nor{} Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie [not found] ` <1398657227-20721-3-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org> 2014-04-28 20:23 ` Marek Vasut 2014-04-28 20:23 ` Marek Vasut 2014-04-28 20:23 ` Marek Vasut [not found] ` <201404282223.26174.marex-ynQEQJNshbs@public.gmane.org> 2014-04-29 5:18 ` Huang Shijie 2014-04-29 5:18 ` Huang Shijie 2014-04-29 5:18 ` Huang Shijie 2014-04-29 5:18 ` Huang Shijie 2014-04-29 6:54 ` Marek Vasut 2014-04-29 6:54 ` Marek Vasut 2014-04-29 6:54 ` Marek Vasut 2014-04-29 6:05 ` Huang Shijie 2014-04-29 6:05 ` Huang Shijie 2014-04-29 6:05 ` Huang Shijie 2014-04-29 6:05 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 04/10] Documentation: mtd: add a new document for SPI NOR flash Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 05/10] Documentation: fsl-quadspi: update the document Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 06/10] mtd: fsl-quadspi: use the information stored in spi-nor{} Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 07/10] mtd: fsl-quadspi: add the DDR quad read support for Spansion NOR Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 08/10] mtd: spi-nor: add more read transfer flags for n25q256a Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 09/10] mtd: spi-nor: add DDR quad read support for Micron Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` [PATCH v2 10/10] mtd: fsl-quadspi: " Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie 2014-04-28 3:53 ` Huang Shijie
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to='CAHrpEqQNSgkakXN8kAT1FwPv7Ou_ERkOTJrX-4Vmb=TogzsF2A@mail.gmail.com' \ --to=lznuaa@gmail.com \ --cc=b32955@freescale.com \ --cc=broonie@kernel.org \ --cc=computersforpeace@gmail.com \ --cc=devicetree@vger.kernel.org \ --cc=dwmw2@infradead.org \ --cc=geert@linux-m68k.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-doc@vger.kernel.org \ --cc=linux-mtd@lists.infradead.org \ --cc=linux-spi@vger.kernel.org \ --cc=marex@denx.de \ --cc=shijie.huang@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.